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/*
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 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
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 *
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 * Copyright (c) 2004-2007 Fabrice Bellard
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 * Copyright (c) 2007 Jocelyn Mayer
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 *
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 * PCI bus layout on a real G5 (U3 based):
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 *
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 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
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 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
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 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
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 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
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 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
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 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
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 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
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 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
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 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
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 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
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 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
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 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
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 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
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 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
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 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
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 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
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 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
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 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
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 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
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 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
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 *
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 */
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#include "hw.h"
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#include "ppc.h"
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#include "ppc_mac.h"
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#include "mac_dbdma.h"
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#include "nvram.h"
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#include "pc.h"
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#include "pci.h"
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#include "usb-ohci.h"
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#include "net.h"
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#include "sysemu.h"
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#include "boards.h"
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#include "fw_cfg.h"
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#include "escc.h"
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#include "openpic.h"
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#include "ide.h"
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#include "loader.h"
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#include "elf.h"
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#include "kvm.h"
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#include "kvm_ppc.h"
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#include "hw/usb.h"
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#define MAX_IDE_BUS 2
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#define VGA_BIOS_SIZE 65536
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#define CFG_ADDR 0xf0000510
73

    
74
/* debug UniNorth */
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//#define DEBUG_UNIN
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#ifdef DEBUG_UNIN
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#define UNIN_DPRINTF(fmt, ...)                                  \
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    do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define UNIN_DPRINTF(fmt, ...)
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#endif
83

    
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/* UniN device */
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static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
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{
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    UNIN_DPRINTF("writel addr " TARGET_FMT_plx " val %x\n", addr, value);
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}
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static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
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{
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    uint32_t value;
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    value = 0;
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    UNIN_DPRINTF("readl addr " TARGET_FMT_plx " val %x\n", addr, value);
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    return value;
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}
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static CPUWriteMemoryFunc * const unin_write[] = {
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    &unin_writel,
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    &unin_writel,
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    &unin_writel,
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};
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static CPUReadMemoryFunc * const unin_read[] = {
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    &unin_readl,
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    &unin_readl,
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    &unin_readl,
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};
111

    
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static int fw_cfg_boot_set(void *opaque, const char *boot_device)
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{
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    fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
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    return 0;
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}
117

    
118
/* PowerPC Mac99 hardware initialisation */
119
static void ppc_core99_init (ram_addr_t ram_size,
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                             const char *boot_device,
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                             const char *kernel_filename,
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                             const char *kernel_cmdline,
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                             const char *initrd_filename,
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                             const char *cpu_model)
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{
126
    CPUState *env = NULL, *envs[MAX_CPUS];
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    char *filename;
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    qemu_irq *pic, **openpic_irqs;
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    int unin_memory;
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    int linux_boot, i;
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    ram_addr_t ram_offset, bios_offset, vga_bios_offset;
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    uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
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    PCIBus *pci_bus;
134
    MacIONVRAMState *nvr;
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    int nvram_mem_index;
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    int vga_bios_size, bios_size;
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    int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
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    int ide_mem_index[3];
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    int ppc_boot_device;
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    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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    void *fw_cfg;
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    void *dbdma;
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    uint8_t *vga_bios_ptr;
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    int machine_arch;
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    linux_boot = (kernel_filename != NULL);
147

    
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    /* init CPUs */
149
    if (cpu_model == NULL)
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#ifdef TARGET_PPC64
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        cpu_model = "970fx";
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#else
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        cpu_model = "G4";
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#endif
155
    for (i = 0; i < smp_cpus; i++) {
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        env = cpu_init(cpu_model);
157
        if (!env) {
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            fprintf(stderr, "Unable to find PowerPC CPU definition\n");
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            exit(1);
160
        }
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        /* Set time-base frequency to 100 Mhz */
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        cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
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#if 0
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        env->osi_call = vga_osi_call;
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#endif
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        qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
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        envs[i] = env;
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    }
169

    
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    /* allocate RAM */
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    ram_offset = qemu_ram_alloc(ram_size);
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    cpu_register_physical_memory(0, ram_size, ram_offset);
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    /* allocate and load BIOS */
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    bios_offset = qemu_ram_alloc(BIOS_SIZE);
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    if (bios_name == NULL)
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        bios_name = PROM_FILENAME;
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    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
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    cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
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    /* Load OpenBIOS (ELF) */
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    if (filename) {
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        bios_size = load_elf(filename, 0, NULL, NULL, NULL, 1, ELF_MACHINE, 0);
184

    
185
        qemu_free(filename);
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    } else {
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        bios_size = -1;
188
    }
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    if (bios_size < 0 || bios_size > BIOS_SIZE) {
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        hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
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        exit(1);
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    }
193

    
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    /* allocate and load VGA BIOS */
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    vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
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    vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
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    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
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    if (filename) {
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        vga_bios_size = load_image(filename, vga_bios_ptr + 8);
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        qemu_free(filename);
201
    } else {
202
        vga_bios_size = -1;
203
    }
204
    if (vga_bios_size < 0) {
205
        /* if no bios is present, we can still work */
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        fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
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                VGABIOS_FILENAME);
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        vga_bios_size = 0;
209
    } else {
210
        /* set a specific header (XXX: find real Apple format for NDRV
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           drivers) */
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        vga_bios_ptr[0] = 'N';
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        vga_bios_ptr[1] = 'D';
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        vga_bios_ptr[2] = 'R';
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        vga_bios_ptr[3] = 'V';
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        cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
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        vga_bios_size += 8;
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219
        /* Round to page boundary */
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        vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) &
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            TARGET_PAGE_MASK;
222
    }
223

    
224
    if (linux_boot) {
225
        uint64_t lowaddr = 0;
226
        int bswap_needed;
227

    
228
#ifdef BSWAP_NEEDED
229
        bswap_needed = 1;
230
#else
231
        bswap_needed = 0;
232
#endif
233
        kernel_base = KERNEL_LOAD_ADDR;
234

    
235
        /* Now we can load the kernel. The first step tries to load the kernel
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           supposing PhysAddr = 0x00000000. If that was wrong the kernel is
237
           loaded again, the new PhysAddr being computed from lowaddr. */
238
        kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL,
239
                               1, ELF_MACHINE, 0);
240
        if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
241
            kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
242
                                   NULL, NULL, NULL, 1, ELF_MACHINE, 0);
243
        }
244
        if (kernel_size < 0)
245
            kernel_size = load_aout(kernel_filename, kernel_base,
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                                    ram_size - kernel_base, bswap_needed,
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                                    TARGET_PAGE_SIZE);
248
        if (kernel_size < 0)
249
            kernel_size = load_image_targphys(kernel_filename,
250
                                              kernel_base,
251
                                              ram_size - kernel_base);
252
        if (kernel_size < 0) {
253
            hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
254
            exit(1);
255
        }
256
        /* load initrd */
257
        if (initrd_filename) {
258
            initrd_base = INITRD_LOAD_ADDR;
259
            initrd_size = load_image_targphys(initrd_filename, initrd_base,
260
                                              ram_size - initrd_base);
261
            if (initrd_size < 0) {
262
                hw_error("qemu: could not load initial ram disk '%s'\n",
263
                         initrd_filename);
264
                exit(1);
265
            }
266
        } else {
267
            initrd_base = 0;
268
            initrd_size = 0;
269
        }
270
        ppc_boot_device = 'm';
271
    } else {
272
        kernel_base = 0;
273
        kernel_size = 0;
274
        initrd_base = 0;
275
        initrd_size = 0;
276
        ppc_boot_device = '\0';
277
        /* We consider that NewWorld PowerMac never have any floppy drive
278
         * For now, OHW cannot boot from the network.
279
         */
280
        for (i = 0; boot_device[i] != '\0'; i++) {
281
            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
282
                ppc_boot_device = boot_device[i];
283
                break;
284
            }
285
        }
286
        if (ppc_boot_device == '\0') {
287
            fprintf(stderr, "No valid boot device for Mac99 machine\n");
288
            exit(1);
289
        }
290
    }
291

    
292
    isa_mem_base = 0x80000000;
293

    
294
    /* Register 8 MB of ISA IO space */
295
    isa_mmio_init(0xf2000000, 0x00800000);
296

    
297
    /* UniN init */
298
    unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
299
    cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
300

    
301
    openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
302
    openpic_irqs[0] =
303
        qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
304
    for (i = 0; i < smp_cpus; i++) {
305
        /* Mac99 IRQ connection between OpenPIC outputs pins
306
         * and PowerPC input pins
307
         */
308
        switch (PPC_INPUT(env)) {
309
        case PPC_FLAGS_INPUT_6xx:
310
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
311
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
312
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
313
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
314
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
315
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
316
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
317
            /* Not connected ? */
318
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
319
            /* Check this */
320
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
321
                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
322
            break;
323
#if defined(TARGET_PPC64)
324
        case PPC_FLAGS_INPUT_970:
325
            openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
326
            openpic_irqs[i][OPENPIC_OUTPUT_INT] =
327
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
328
            openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
329
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
330
            openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
331
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
332
            /* Not connected ? */
333
            openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
334
            /* Check this */
335
            openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
336
                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
337
            break;
338
#endif /* defined(TARGET_PPC64) */
339
        default:
340
            hw_error("Bus model not supported on mac99 machine\n");
341
            exit(1);
342
        }
343
    }
344
    pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
345
    if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
346
        /* 970 gets a U3 bus */
347
        pci_bus = pci_pmac_u3_init(pic);
348
        machine_arch = ARCH_MAC99_U3;
349
    } else {
350
        pci_bus = pci_pmac_init(pic);
351
        machine_arch = ARCH_MAC99;
352
    }
353
    /* init basic PC hardware */
354
    pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
355

    
356
    escc_mem_index = escc_init(0x80013000, pic[0x25], pic[0x24],
357
                               serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
358

    
359
    for(i = 0; i < nb_nics; i++)
360
        pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
361

    
362
    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
363
        fprintf(stderr, "qemu: too many IDE bus\n");
364
        exit(1);
365
    }
366
    dbdma = DBDMA_init(&dbdma_mem_index);
367

    
368
    /* We only emulate 2 out of 3 IDE controllers for now */
369
    ide_mem_index[0] = -1;
370
    hd[0] = drive_get(IF_IDE, 0, 0);
371
    hd[1] = drive_get(IF_IDE, 0, 1);
372
    ide_mem_index[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
373
    hd[0] = drive_get(IF_IDE, 1, 0);
374
    hd[1] = drive_get(IF_IDE, 1, 1);
375
    ide_mem_index[2] = pmac_ide_init(hd, pic[0x0e], dbdma, 0x1a, pic[0x02]);
376

    
377
    /* cuda also initialize ADB */
378
    if (machine_arch == ARCH_MAC99_U3) {
379
        usb_enabled = 1;
380
    }
381
    cuda_init(&cuda_mem_index, pic[0x19]);
382

    
383
    adb_kbd_init(&adb_bus);
384
    adb_mouse_init(&adb_bus);
385

    
386
    macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
387
               dbdma_mem_index, cuda_mem_index, NULL, 3, ide_mem_index,
388
               escc_mem_index);
389

    
390
    if (usb_enabled) {
391
        usb_ohci_init_pci(pci_bus, -1);
392
    }
393

    
394
    /* U3 needs to use USB for input because Linux doesn't support via-cuda
395
       on PPC64 */
396
    if (machine_arch == ARCH_MAC99_U3) {
397
        usbdevice_create("keyboard");
398
        usbdevice_create("mouse");
399
    }
400

    
401
    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
402
        graphic_depth = 15;
403

    
404
    /* The NewWorld NVRAM is not located in the MacIO device */
405
    nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
406
    pmac_format_nvram_partition(nvr, 0x2000);
407
    macio_nvram_map(nvr, 0xFFF04000);
408
    /* No PCI init: the BIOS will do it */
409

    
410
    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
411
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
412
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
413
    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
414
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
415
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
416
    if (kernel_cmdline) {
417
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
418
        pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
419
    } else {
420
        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
421
    }
422
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
423
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
424
    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
425

    
426
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
427
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
428
    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
429

    
430
    if (kvm_enabled()) {
431
#ifdef CONFIG_KVM
432
        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
433
#endif
434
    } else {
435
        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
436
    }
437

    
438
    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
439
}
440

    
441
static QEMUMachine core99_machine = {
442
    .name = "mac99",
443
    .desc = "Mac99 based PowerMAC",
444
    .init = ppc_core99_init,
445
    .max_cpus = MAX_CPUS,
446
#ifdef TARGET_PPC64
447
    .is_default = 1,
448
#endif
449
};
450

    
451
static void core99_machine_init(void)
452
{
453
    qemu_register_machine(&core99_machine);
454
}
455

    
456
machine_init(core99_machine_init);