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root / target-arm @ ea825eee

Name Size
cpu.h 14.5 kB
exec.h 1.5 kB
helper.c 71.1 kB
helpers.h 15.9 kB
iwmmxt_helper.c 24.7 kB
machine.c 6.6 kB
neon_helper.c 34.4 kB
op_addsub.h 1.8 kB
op_helper.c 10.7 kB
translate.c 312.1 kB

Latest revisions

# Date Author Comment
ea825eee 03/13/2010 01:01 pm Adam Lackorzynski

target-arm: make RFE usable with any register

The rfe instruction can be used with any register, not just sp. Adjust the
condition check accordingly.

Signed-off-by: Adam Lackorzynski <>
Signed-off-by: Aurelien Jarno <>
4fcc562b 03/12/2010 08:34 pm Paul Brook

Remove cpu_get_phys_page_debug from userspace emulation

cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it.

Signed-off-by: Paul Brook <>
52705890 03/12/2010 06:28 pm Richard Henderson

Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.

Removes a set of ifdefs from exec.c.

Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other
than Alpha. This will be used for page_find_alloc, which is
supposed to be using virtual addresses in the first place....
a990f58f 03/07/2010 12:22 am Adam Lackorzynski

target-arm: Fix missing 'return' in SRS handling.

There's a return missing in the srs handling which leads to srs always being
treated an an invalid op.

Signed-off-by: Adam Lackorzynski <>
Signed-off-by: Aurelien Jarno <>
30d11a2a 02/28/2010 08:30 pm Juha Riihimäki

target-arm: neon vshll instruction fix

implementation only widened the 32bit source vector elements into a
64bit destination vector but forgot to perform the actual shifting
operation.

Signed-off-by: Juha Riihimäki <>
Signed-off-by: Riku Voipio <>...
79b0e534 02/28/2010 08:30 pm Riku Voipio

target-arm: neon - fix VRADDHN/VRSUBHN vs VADDHN/VSUBHN

The rounding/truncating options were inverted. truncating
was done when rounding was meant and vice verse.

Signed-off-by: Riku Voipio <>
Acked-by: Laurent Desnogues <>...
c5883be2 02/23/2010 04:45 pm Paul Brook

ARM CP15 tls fix

Fix temporary handling in cp15 tls register load/store.

Signed-off-by: Paul Brook <>
30a8cac1 02/19/2010 05:20 pm Rabin Vincent

target-arm: support thumb exception handlers

When handling an exception, switch to the correct mode based on the
Thumb Exception (TE) bit in the SCTLR.

Signed-off-by: Rabin Vincent <>
b8b45b68 02/19/2010 03:38 pm Rabin Vincent

target-arm: implement Thumb-2 exception return

Support the "subs pc, lr" Thumb-2 exception return instruction.

Signed-off-by: Rabin Vincent <>
Signed-off-by: Paul Brook <>
fa26df03 02/19/2010 03:38 pm Rabin Vincent

target-arm: fix thumb CPS

The Thumb CPS currently does not work correctly: CPSID touches more bits
than the instruction wants to, and CPSIE does nothing. Fix it by
passing the correct mask (the "affect" bits) and value.

Signed-off-by: Rabin Vincent <>

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