Statistics
| Branch: | Revision:

root / target-ppc / exec.h @ eaabeef2

History | View | Annotate | Download (1.3 kB)

# Date Author Comment
eda48c34 03/13/2011 04:44 pm Paolo Bonzini

inline cpu_halted into sole caller

All implementations are now the same, and there is only one caller,
so inline the function there.

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

dd94ad96 01/06/2011 05:10 pm Aurelien Jarno

target-ppc: remove PRECISE_EMULATION define

The PRECISE_EMULATION is "hardcoded" to one in target-ppc/exec.h and not
something easily tunable. Remove it and non-precise emulation code as
it doesn't make a noticeable difference in speed. People wanting speed...

10eb0cc0 07/03/2010 09:48 am Paolo Bonzini

move cpu_pc_from_tb to target-*/exec.h

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Blue Swirl <>

49a945a3 01/20/2010 12:31 am Paolo Bonzini

kill regs_to_env and env_to_regs

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Anthony Liguori <>

636aa200 08/16/2009 12:06 pm Blue Swirl

Replace always_inline with inline

We define inline as always_inline.

Signed-off-by: Blue Swirl <>

8167ee88 07/16/2009 11:47 pm Blue Swirl

Update to a hopefully more future proof FSF address

Signed-off-by: Blue Swirl <>

6a4955a8 04/24/2009 09:03 pm aliguori

qemu: per-arch cpu_has_work (Marcelo Tosatti)

Blue Swirl: fix Sparc32 breakage

Signed-off-by: Marcelo Tosatti <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162

fad6cb1a 01/05/2009 12:05 am aurel32

Update FSF address in GPL/LGPL boilerplate

The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <>
Signed-off-by: Aurelien Jarno <>...

9326a95c 12/19/2008 12:43 am aurel32

target-ppc: fix a typo

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6088 c046a42c-6fe2-441c-8c8c-71466251a162

f9664682 12/16/2008 12:44 pm aurel32

target-ppc: fix a typo introduced in revision 6058

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6068 c046a42c-6fe2-441c-8c8c-71466251a162

ce9ede84 12/15/2008 11:48 pm aurel32

target-ppc: update comment about precise emulation

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6058 c046a42c-6fe2-441c-8c8c-71466251a162

d445bde7 12/15/2008 07:14 pm aurel32

target-ppc: remove dead code

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6055 c046a42c-6fe2-441c-8c8c-71466251a162

196e3422 12/15/2008 07:14 pm aurel32

target-ppc: enable PRECISE_EMULATION by default

With this option enabled, all glibc math tests pass.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6054 c046a42c-6fe2-441c-8c8c-71466251a162

93220573 12/12/2008 12:42 am aurel32

target-ppc: remove remaining warnings

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5991 c046a42c-6fe2-441c-8c8c-71466251a162

e06fcd75 12/12/2008 12:42 am aurel32

target-ppc: rework exception code

... also remove two warnings.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5989 c046a42c-6fe2-441c-8c8c-71466251a162

45d827d2 12/07/2008 03:40 pm aurel32

target-ppc: convert SPR accesses to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5910 c046a42c-6fe2-441c-8c8c-71466251a162

8983da70 12/07/2008 12:01 am aurel32

target-ppc: remove dead code

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5896 c046a42c-6fe2-441c-8c8c-71466251a162

7487953d 12/05/2008 09:21 am aurel32

target-ppc: convert POWER shift instructions to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5882 c046a42c-6fe2-441c-8c8c-71466251a162

01a4afeb 11/27/2008 09:30 pm aurel32

target-ppc: convert POWER2 load/store instructions to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5805 c046a42c-6fe2-441c-8c8c-71466251a162

6a6ae23f 11/27/2008 09:30 pm aurel32

target-ppc: convert SPE load/store to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5804 c046a42c-6fe2-441c-8c8c-71466251a162

fe1e5c53 11/24/2008 10:47 am aurel32

target-ppc: convert altivec load/store to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5787 c046a42c-6fe2-441c-8c8c-71466251a162

64adab3f 11/22/2008 12:09 pm aurel32

target-ppc: convert exceptions generation to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5772 c046a42c-6fe2-441c-8c8c-71466251a162

af12906f 11/19/2008 06:10 pm aurel32

target-ppc: convert fp ops to TCG

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5754 c046a42c-6fe2-441c-8c8c-71466251a162

bd7d9a6d 09/04/2008 08:26 am aurel32

ppc: cleanup register types

- use target_ulong for gpr and dyngen registers
- remove ppc_gpr_t type
- define 64-bit dyngen registers for GPE register on 32-bit targets

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5154 c046a42c-6fe2-441c-8c8c-71466251a162

1cdb9c3d 04/08/2008 12:24 am aurel32

Revert revisions r4168 and r4169. That's work in progress, not ready for trunk yet.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4171 c046a42c-6fe2-441c-8c8c-71466251a162

e755699d 04/08/2008 12:00 am aurel32

Always enable precise emulation when softfloat is used

The patch below changes the way to enable softfloat on the PPC target. It
is now enabled when softfloat is used. The rationale behind this change
is that persons who want precise emulation prefer precision over emulation...

6b542af7 11/24/2007 04:03 am j_mayer

Fix incorrect debug prints (reported by Paul Brook).
Remove obsolete / duplicated debug prints and improve output consistency.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3725 c046a42c-6fe2-441c-8c8c-71466251a162

57c26279 11/14/2007 08:45 pm j_mayer

Fix PowerPC targets compilation on 32 bits hosts:
now that the SPE extension is available for all targets,
we always need to have some 64 bits temporary registers.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3647 c046a42c-6fe2-441c-8c8c-71466251a162

faadf50e 11/03/2007 03:37 pm j_mayer PowerPC MMU and exception fixes:
  • PowerPC 601 (and probably POWER/POWER2) uses a different BAT format than
    later PowerPC implementation.
  • Bugfix in BATs check: must not stop after 4 BATs when more are provided.
  • Enable POWER 'rac' instruction.
  • Fix exception prefix for all supported PowerPC implementations....
0411a972 10/26/2007 12:35 am j_mayer

Gprof prooved the PowerPC emulation spent too much time in MSR load and store
routines. Coming back to a raw MSR storage model then speed-up the emulation.
Improve fast MSR updates (wrtee wrteei and mtriee cases).
Share rfi family instructions helpers code to avoid bug in duplicated code....

6ebbf390 10/14/2007 10:07 am j_mayer

Replace is_user variable with mmu_idx in softmmu core,
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions....

a9d9eb8f 10/07/2007 09:19 pm j_mayer

Implement PowerPC Altivec load & stores, used by Apple firmware for memcpy.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3349 c046a42c-6fe2-441c-8c8c-71466251a162

b068d6a7 10/07/2007 08:13 pm j_mayer

PowerPC target optimisations: make intensive use of always_inline.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3347 c046a42c-6fe2-441c-8c8c-71466251a162

daf4f96e 10/01/2007 04:51 am j_mayer

Avoid op helpers that would just call helpers for TLB & SLB management:
call the helpers directly from the micro-ops.
Avoid duplicated code for tlbsx. implementation.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3302 c046a42c-6fe2-441c-8c8c-71466251a162

a750fc0b 09/27/2007 02:54 am j_mayer Great rework and cleanups to ease PowerPC implementations definitions.
  • cleanup cpu.h, removing definitions used only in translate.c/translate_init.c
  • add new flags to define instructions sets more precisely
  • various changes in MMU models definitions
  • add definitions for PowerPC 440/460 support (insns and SPRs)....
36081602 09/17/2007 11:21 am j_mayer

Coding style fixes in PowerPC related code (no functional change):
- avoid useless blanks at EOL.
- avoid tabs.
- fix wrapping lines on 80 chars terminals.
- add missing ';' at macros EOL to avoid confusing auto-identers.
- fix identation.
- Remove historical macros in micro-ops (PARAM, SPARAM, PPC_OP, regs)...

5fafdf24 09/17/2007 12:08 am ths

find -type f | xargs sed -i 's/[\t ]$//g' # on most files

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162

3c4c9f9f 07/11/2007 01:36 pm ths

Fix PPCEMB for 32bit hosts.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3059 c046a42c-6fe2-441c-8c8c-71466251a162

bfed01fc 06/03/2007 08:44 pm ths

Clean up of some target specifics in exec.c/cpu-exec.c.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162

35cdaad6 04/24/2007 09:50 am j_mayer

Code provision for new PowerPC embedded target support with:
- 1 kB page size
- 64 bits GPR
- 64 bits physical address space
- SPE extension support.
Change TARGET_PPCSPE into TARGET_PPCEMB

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2718 c046a42c-6fe2-441c-8c8c-71466251a162

8ecc7913 04/16/2007 11:09 pm j_mayer

Add callbacks to allow dynamic change of PowerPC clocks (to be improved)
Fix embedded PowerPC watchdog and timers
Fix PowerPC 405 SPR
Add generic PowerPC 405 core instanciation code + resets support.
Implement simple peripherals shared by most PowerPC 405 implementations...

e864cabd 03/23/2007 12:17 am j_mayer

PowerPC bugfixes:
- must clear carry bit when doing addic with a zero immediate value
- fix missing RETURN in micro-operation that would lead to random failures
and crashes
- add USE_PRECISE_EMULATION compilation-time option to choose between
getting exact floating point results and fast but less accurate computation....

0487d6a8 03/21/2007 12:11 am j_mayer

PowerPC 2.03 SPE extension - first pass.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2519 c046a42c-6fe2-441c-8c8c-71466251a162

d9bce9d9 03/17/2007 04:02 pm j_mayer

Make it safe to use 64 bits GPR and/or 64 bits host registers.
For "symetry", add 64 bits versions of all modified functions.
As a side effect, add a lot of code provision for PowerPC 64 support.
Move overflow and carry checks in common routines for simple cases....

76a66253 03/07/2007 10:32 am j_mayer

Great PowerPC emulation code resynchronisation and improvments:
- Add status file to make regression tracking easier
- Move all micro-operations helpers definitions into a separate header:
should never be seen outside of op.c
- Update copyrights
- Add new / missing PowerPC CPU definitions...

70ead434 12/23/2006 02:49 am ths

Use memory barriers in FORCE_RET / RETURN.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2273 c046a42c-6fe2-441c-8c8c-71466251a162

a9049a07 10/30/2005 08:16 pm bellard

moved common softmmu code to common header (Paul Brook)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1580 c046a42c-6fe2-441c-8c8c-71466251a162

fdabc366 07/05/2005 01:17 am bellard

correct split between helper.c and op_helper.c - moved some uops to op_helper.c (Jocelyn Mayer)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1504 c046a42c-6fe2-441c-8c8c-71466251a162

3fc6c082 07/02/2005 11:59 pm bellard

preliminary patch to support more PowerPC CPUs (Jocelyn Mayer)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1489 c046a42c-6fe2-441c-8c8c-71466251a162

4ecc3190 03/13/2005 07:01 pm bellard

fpu fixes (Jocelyn Mayer) - soft float support

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1335 c046a42c-6fe2-441c-8c8c-71466251a162

0fa85d43 01/04/2005 01:43 am bellard

64 bit target support

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1195 c046a42c-6fe2-441c-8c8c-71466251a162

0d1a29f9 10/13/2004 01:01 am bellard

correct handling of saved host registers

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1122 c046a42c-6fe2-441c-8c8c-71466251a162

4b3686fa 05/24/2004 01:18 am bellard

PowerPC merge

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@861 c046a42c-6fe2-441c-8c8c-71466251a162

9fddaa0c 05/21/2004 03:59 pm bellard

PowerPC merge: real time TB and decrementer - faster and simpler exception handling (Jocelyn Mayer)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@841 c046a42c-6fe2-441c-8c8c-71466251a162

1ef59d0a 04/26/2004 10:48 pm bellard

ppc fixes (Jocelyn Mayer)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@765 c046a42c-6fe2-441c-8c8c-71466251a162

a541f297 04/12/2004 11:39 pm bellard

PowerPC system emulation fixes (Jocelyn Mayer)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@722 c046a42c-6fe2-441c-8c8c-71466251a162

9a64fbe4 01/05/2004 12:58 am bellard

PowerPC system emulation (Jocelyn Mayer) - modified patch to use new TLB api

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@528 c046a42c-6fe2-441c-8c8c-71466251a162

fb0eaffc 01/04/2004 04:57 pm bellard

PowerPC fixes (Jocelyn Mayer)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@483 c046a42c-6fe2-441c-8c8c-71466251a162

79aceca5 11/23/2003 04:55 pm bellard

PowerPC support (Jocelyn Mayer)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@472 c046a42c-6fe2-441c-8c8c-71466251a162