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/*
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    NetWinder Floating Point Emulator
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    (c) Rebel.COM, 1998,1999
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    Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
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    This program is free software; you can redistribute it and/or modify
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    it under the terms of the GNU General Public License as published by
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    the Free Software Foundation; either version 2 of the License, or
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    (at your option) any later version.
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    This program is distributed in the hope that it will be useful,
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    but WITHOUT ANY WARRANTY; without even the implied warranty of
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    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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    GNU General Public License for more details.
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    You should have received a copy of the GNU General Public License
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    along with this program; if not, write to the Free Software
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    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include "fpa11.h"
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#include "fpopcode.h"
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//#include "fpmodule.h"
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//#include "fpmodule.inl"
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//#include <asm/system.h>
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#include <stdio.h>
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/* forward declarations */
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unsigned int EmulateCPDO(const unsigned int);
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unsigned int EmulateCPDT(const unsigned int);
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unsigned int EmulateCPRT(const unsigned int);
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FPA11* qemufpa=0;
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CPUARMState* user_registers;
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/* Reset the FPA11 chip.  Called to initialize and reset the emulator. */
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void resetFPA11(void)
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{
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  int i;
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  FPA11 *fpa11 = GET_FPA11();
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  /* initialize the register type array */
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  for (i=0;i<=7;i++)
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  {
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    fpa11->fType[i] = typeNone;
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  }
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  /* FPSR: set system id to FP_EMULATOR, set AC, clear all other bits */
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  fpa11->fpsr = FP_EMULATOR | BIT_AC;
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  /* FPCR: set SB, AB and DA bits, clear all others */
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#ifdef MAINTAIN_FPCR
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  fpa11->fpcr = MASK_RESET;
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#endif
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}
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void SetRoundingMode(const unsigned int opcode)
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{
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    int rounding_mode;
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   FPA11 *fpa11 = GET_FPA11();
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#ifdef MAINTAIN_FPCR
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   fpa11->fpcr &= ~MASK_ROUNDING_MODE;
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#endif
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   switch (opcode & MASK_ROUNDING_MODE)
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   {
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      default:
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      case ROUND_TO_NEAREST:
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         rounding_mode = float_round_nearest_even;
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#ifdef MAINTAIN_FPCR
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         fpa11->fpcr |= ROUND_TO_NEAREST;
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#endif
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      break;
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      case ROUND_TO_PLUS_INFINITY:
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         rounding_mode = float_round_up;
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#ifdef MAINTAIN_FPCR
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         fpa11->fpcr |= ROUND_TO_PLUS_INFINITY;
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#endif
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      break;
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      case ROUND_TO_MINUS_INFINITY:
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         rounding_mode = float_round_down;
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#ifdef MAINTAIN_FPCR
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         fpa11->fpcr |= ROUND_TO_MINUS_INFINITY;
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#endif
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      break;
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      case ROUND_TO_ZERO:
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         rounding_mode = float_round_to_zero;
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#ifdef MAINTAIN_FPCR
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         fpa11->fpcr |= ROUND_TO_ZERO;
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#endif
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      break;
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  }
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   set_float_rounding_mode(rounding_mode, &fpa11->fp_status);
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}
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void SetRoundingPrecision(const unsigned int opcode)
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{
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    int rounding_precision;
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   FPA11 *fpa11 = GET_FPA11();
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#ifdef MAINTAIN_FPCR
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   fpa11->fpcr &= ~MASK_ROUNDING_PRECISION;
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#endif
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   switch (opcode & MASK_ROUNDING_PRECISION)
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   {
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      case ROUND_SINGLE:
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         rounding_precision = 32;
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#ifdef MAINTAIN_FPCR
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         fpa11->fpcr |= ROUND_SINGLE;
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#endif
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      break;
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      case ROUND_DOUBLE:
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         rounding_precision = 64;
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#ifdef MAINTAIN_FPCR
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         fpa11->fpcr |= ROUND_DOUBLE;
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#endif
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      break;
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      case ROUND_EXTENDED:
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         rounding_precision = 80;
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#ifdef MAINTAIN_FPCR
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         fpa11->fpcr |= ROUND_EXTENDED;
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#endif
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      break;
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      default: rounding_precision = 80;
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  }
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   set_floatx80_rounding_precision(rounding_precision, &fpa11->fp_status);
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}
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/* Emulate the instruction in the opcode. */
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/* ??? This is not thread safe.  */
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unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs)
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{
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  unsigned int nRc = 0;
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//  unsigned long flags;
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  FPA11 *fpa11;
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//  save_flags(flags); sti();
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  qemufpa=qfpa;
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  user_registers=qregs;
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#if 0
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  fprintf(stderr,"emulating FP insn 0x%08x, PC=0x%08x\n",
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          opcode, qregs[REG_PC]);
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#endif
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  fpa11 = GET_FPA11();
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  if (fpa11->initflag == 0)                /* good place for __builtin_expect */
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  {
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    resetFPA11();
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    SetRoundingMode(ROUND_TO_NEAREST);
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    SetRoundingPrecision(ROUND_EXTENDED);
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    fpa11->initflag = 1;
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  }
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  set_float_exception_flags(0, &fpa11->fp_status);
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  if (TEST_OPCODE(opcode,MASK_CPRT))
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  {
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    //fprintf(stderr,"emulating CPRT\n");
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    /* Emulate conversion opcodes. */
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    /* Emulate register transfer opcodes. */
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    /* Emulate comparison opcodes. */
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    nRc = EmulateCPRT(opcode);
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  }
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  else if (TEST_OPCODE(opcode,MASK_CPDO))
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  {
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    //fprintf(stderr,"emulating CPDO\n");
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    /* Emulate monadic arithmetic opcodes. */
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    /* Emulate dyadic arithmetic opcodes. */
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    nRc = EmulateCPDO(opcode);
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  }
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  else if (TEST_OPCODE(opcode,MASK_CPDT))
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  {
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    //fprintf(stderr,"emulating CPDT\n");
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    /* Emulate load/store opcodes. */
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    /* Emulate load/store multiple opcodes. */
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    nRc = EmulateCPDT(opcode);
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  }
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  else
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  {
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    /* Invalid instruction detected.  Return FALSE. */
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    nRc = 0;
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  }
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//  restore_flags(flags);
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  if(nRc == 1 && get_float_exception_flags(&fpa11->fp_status))
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  {
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    //printf("fef 0x%x\n",float_exception_flags);
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    nRc=-get_float_exception_flags(&fpa11->fp_status);
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  }
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  //printf("returning %d\n",nRc);
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  return(nRc);
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}
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#if 0
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unsigned int EmulateAll1(unsigned int opcode)
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{
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  switch ((opcode >> 24) & 0xf)
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  {
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     case 0xc:
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     case 0xd:
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       if ((opcode >> 20) & 0x1)
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       {
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          switch ((opcode >> 8) & 0xf)
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          {
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             case 0x1: return PerformLDF(opcode); break;
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             case 0x2: return PerformLFM(opcode); break;
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             default: return 0;
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          }
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       }
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       else
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       {
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          switch ((opcode >> 8) & 0xf)
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          {
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             case 0x1: return PerformSTF(opcode); break;
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             case 0x2: return PerformSFM(opcode); break;
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             default: return 0;
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          }
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      }
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     break;
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     case 0xe:
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       if (opcode & 0x10)
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         return EmulateCPDO(opcode);
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       else
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         return EmulateCPRT(opcode);
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     break;
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     default: return 0;
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  }
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}
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#endif
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