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root / target-ppc @ ec1ac72d

Name Size
STATUS 10.6 kB
cpu.h 58.2 kB
exec.h 3.5 kB
helper.c 96.2 kB
helper.h 82 Bytes
helper_regs.h 3.9 kB
machine.c 418 Bytes
mfrom_table.c 3.3 kB
mfrom_table_gen.c 652 Bytes
op.c 48.2 kB
op_helper.c 74.8 kB
op_helper.h 9.2 kB
op_helper_mem.h 10.9 kB
op_mem.h 36.4 kB
op_mem_access.h 4 kB
op_template.h 1.1 kB
translate.c 229.3 kB
translate_init.c 403.3 kB

Latest revisions

# Date Author Comment
ec1ac72d 09/04/2008 06:49 pm aurel32

ppc: fix fpr TCG registers creation

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5157 c046a42c-6fe2-441c-8c8c-71466251a162

a5e26afa 09/04/2008 05:43 pm aurel32

ppc: Convert FPR moves to TCG

Replace op_{load,store}_fpr with tcg_gen_mov_i64.
Introduce i64 TCG variables cpu_fpr[0..31] and cpu_FT[0..2].

This obsoletes op_template.h for REG > 7.

Signed-off-by: Andreas Faerber <>
Signed-off-by: Aurelien Jarno <>...

1d542695 09/04/2008 05:43 pm aurel32

ppc: Convert Altivec register moves to TCG

Replace op_{load,store}_avr with helpers gen_{load,store}_avr.
Introduce two sets of i64 TCG variables, cpu_avr{h,l}[0..31], and
cpu_AVR{h,l}[0..2].

Signed-off-by: Andreas Faerber <>
Signed-off-by: Aurelien Jarno <>...

bd7d9a6d 09/04/2008 08:26 am aurel32

ppc: cleanup register types

- use target_ulong for gpr and dyngen registers
- remove ppc_gpr_t type
- define 64-bit dyngen registers for GPE register on 32-bit targets

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5154 c046a42c-6fe2-441c-8c8c-71466251a162

f78fb44e 09/04/2008 08:25 am aurel32

ppc: Convert GPR moves to TCG

Replace op_load_gpr_{T0,T1,T2} and op_store_{T0,T1,T2} with tcg_gen_mov_tl.
Introduce TCG variables cpu_gpr[0..31].

For the SPE extension, assure that ppc_gpr_t is only uint64_t for ppc64.
Introduce TCG variables cpu_gprh[0..31] for upper 32 bits on ppc and helpers...

f0413473 09/03/2008 02:26 am aurel32

[ppc] Convert op_moven_T2_T0 to TCG

Signed-off-by: Andreas Faerber <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5143 c046a42c-6fe2-441c-8c8c-71466251a162

86c581dc 09/03/2008 02:26 am aurel32

[ppc] Convert op_reset_T0, op_set_{T0, T1} to TCG

Signed-off-by: Andreas Faerber <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5142 c046a42c-6fe2-441c-8c8c-71466251a162

e55fd934 09/02/2008 07:19 pm aurel32

[ppc] Convert op_move_{T1,T2}_T0 to TCG

Attached patch replaces op_move_T1_T0 and op_move_T2_T0 with
tcg_gen_mov_tl.

Signed-off-by: Andreas Faerber <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5137 c046a42c-6fe2-441c-8c8c-71466251a162

02f4f6c2 09/02/2008 07:18 pm aurel32

[ppc] Convert gen_set_{T0,T1} to TCG

The attached patch replaces gen_set_T0 and gen_set_T1 with
tcg_gen_movi_tl.

Signed-off-by: Andreas Faerber <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5136 c046a42c-6fe2-441c-8c8c-71466251a162

79383c9c 08/30/2008 12:51 pm blueswir1

Fix some warnings that would be generated by gcc -Wredundant-decls

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162

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