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root / target-ppc @ ec5c3e48

Name Size
STATUS 10.6 kB
cpu.h 67.7 kB
exec.h 1.5 kB
helper.c 93.2 kB
helper.h 14.3 kB
helper_regs.h 3.3 kB
kvm.c 6.1 kB
kvm_ppc.c 2.6 kB
kvm_ppc.h 434 Bytes
machine.c 5.7 kB
mfrom_table.c 3.3 kB
mfrom_table_gen.c 652 Bytes
op_helper.c 124 kB
translate.c 335.5 kB
translate_init.c 414.3 kB

Latest revisions

# Date Author Comment
ec5c3e48 01/14/2010 03:42 pm Edgar E. Iglesias

ppc-40x: Correct decoding of zone protection bits.

The 40x MMU has 15 zones in the ZPR register.

Signed-off-by: Edgar E. Iglesias <>

c5b9729a 01/14/2010 03:42 pm Edgar E. Iglesias

ppc-40x: Correct check for Endian swapping TLB entries.

Bailout on 40x TLB entries with endianess swapping only if the entry
is valid.

Signed-off-by: Edgar E. Iglesias <>

f25359cd 01/14/2010 03:41 pm Edgar E. Iglesias

ppc-40x: Get TLB attributes from TLBLO.

The ZSEL was incorrectly beeing decoded from TLBHI. Decode it from
TLBLO instead.

Signed-off-by: Edgar E. Iglesias <>

73b01960 12/21/2009 05:03 pm Alexander Graf

PPC: Make DCR uint32_t

For what I know DCR is always 32 bits wide, so we should also use uint32_t to
pass it along the stacks.

This fixes a warning when compiling qemu-system-ppc64 with KVM enabled, making
it compile without --disable-werror

Signed-off-by: Alexander Graf <>...

b711de95 12/21/2009 02:52 pm Aurelien Jarno

PPC64: Fix alternate timebase

Fix the alternate time base the same way as the default timebase. SPR_ATBL
should return a 64-bit value on 64 bit implementations.

Signed-off-by: Aurelien Jarno <>

e3ea6529 12/21/2009 02:42 pm Alexander Graf

PPC64: Fix timebase

On PPC we have a 64-bit time base. Usually (PPC32) this is accessed using
two separate 32 bit SPR accesses to SPR_TBU and SPR_TBL.

On PPC64 the SPR_TBL register acts as 64 bit though, so we get the full
64 bits as return value. If we only take the lower ones, fine. But Linux...

82c09f2f 12/19/2009 10:30 am Alexander Graf

target-ppc: fix ppc32 kvm build

My segment sync patch broke compilation on PPC32, because it was trying to
sync the SLB even though ppc32 CPUs don't have an SLB.

So let's only sync it when we're on a PP64 one!

Signed-off-by: Alexander Graf <>...

ba5e5090 12/03/2009 09:10 pm Alexander Graf

target-ppc: Get MMU state on register sync

While x86 only needs to sync cr0-4 to know all about its MMU state and enable
qemu to resolve virtual to physical addresses, we need to sync all of the
segment registers on PPC to know which mapping we're in.

So let's grab the segment register contents to be able to use the "x" monitor...

caa5af0f 11/17/2009 04:49 pm Jan Kiszka

kvm: Add arch reset handler

Will be required by succeeding changes.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

812151f2 11/12/2009 07:23 pm Hollis Blanchard

kvm ppc: Remove unused label

Signed-off-by: Hollis Blanchard <>
Signed-off-by: Anthony Liguori <>

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