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/*
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* i386 CPUID helper functions
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdlib.h> |
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#include <stdio.h> |
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#include <string.h> |
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#include <inttypes.h> |
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#include "cpu.h" |
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#include "kvm.h" |
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#include "qemu-option.h" |
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#include "qemu-config.h" |
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/* feature flags taken from "Intel Processor Identification and the CPUID
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* Instruction" and AMD's "CPUID Specification". In cases of disagreement
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* between feature naming conventions, aliases may be added.
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*/
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static const char *feature_name[] = { |
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"fpu", "vme", "de", "pse", |
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"tsc", "msr", "pae", "mce", |
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"cx8", "apic", NULL, "sep", |
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"mtrr", "pge", "mca", "cmov", |
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"pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */, |
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NULL, "ds" /* Intel dts */, "acpi", "mmx", |
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"fxsr", "sse", "sse2", "ss", |
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"ht" /* Intel htt */, "tm", "ia64", "pbe", |
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}; |
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static const char *ext_feature_name[] = { |
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"pni|sse3" /* Intel,AMD sse3 */, "pclmuldq", "dtes64", "monitor", |
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"ds_cpl", "vmx", "smx", "est", |
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"tm2", "ssse3", "cid", NULL, |
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"fma", "cx16", "xtpr", "pdcm", |
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NULL, NULL, "dca", "sse4.1|sse4_1", |
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"sse4.2|sse4_2", "x2apic", "movbe", "popcnt", |
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NULL, "aes", "xsave", "osxsave", |
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"avx", NULL, NULL, "hypervisor", |
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}; |
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static const char *ext2_feature_name[] = { |
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"fpu", "vme", "de", "pse", |
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"tsc", "msr", "pae", "mce", |
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"cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall", |
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"mtrr", "pge", "mca", "cmov", |
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"pat", "pse36", NULL, NULL /* Linux mp */, |
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"nx" /* Intel xd */, NULL, "mmxext", "mmx", |
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"fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp", |
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NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow", |
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}; |
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static const char *ext3_feature_name[] = { |
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"lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */, |
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"cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse", |
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"3dnowprefetch", "osvw", "ibs", "xop", |
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"skinit", "wdt", NULL, NULL, |
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"fma4", NULL, "cvt16", "nodeid_msr", |
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NULL, NULL, NULL, NULL, |
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NULL, NULL, NULL, NULL, |
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NULL, NULL, NULL, NULL, |
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}; |
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static const char *kvm_feature_name[] = { |
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"kvmclock", "kvm_nopiodelay", "kvm_mmu", NULL, NULL, NULL, NULL, NULL, |
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, |
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}; |
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/* collects per-function cpuid data
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*/
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typedef struct model_features_t { |
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uint32_t *guest_feat; |
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uint32_t *host_feat; |
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uint32_t check_feat; |
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const char **flag_names; |
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uint32_t cpuid; |
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} model_features_t; |
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int check_cpuid = 0; |
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int enforce_cpuid = 0; |
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static void host_cpuid(uint32_t function, uint32_t count, |
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uint32_t *eax, uint32_t *ebx, |
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uint32_t *ecx, uint32_t *edx) |
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{ |
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#if defined(CONFIG_KVM)
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uint32_t vec[4];
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#ifdef __x86_64__
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asm volatile("cpuid" |
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: "=a"(vec[0]), "=b"(vec[1]), |
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"=c"(vec[2]), "=d"(vec[3]) |
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: "0"(function), "c"(count) : "cc"); |
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#else
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asm volatile("pusha \n\t" |
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"cpuid \n\t"
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"mov %%eax, 0(%2) \n\t"
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"mov %%ebx, 4(%2) \n\t"
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"mov %%ecx, 8(%2) \n\t"
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"mov %%edx, 12(%2) \n\t"
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"popa"
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: : "a"(function), "c"(count), "S"(vec) |
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: "memory", "cc"); |
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#endif
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if (eax)
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*eax = vec[0];
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if (ebx)
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*ebx = vec[1];
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if (ecx)
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*ecx = vec[2];
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if (edx)
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*edx = vec[3];
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#endif
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} |
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#define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c))) |
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/* general substring compare of *[s1..e1) and *[s2..e2). sx is start of
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* a substring. ex if !NULL points to the first char after a substring,
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* otherwise the string is assumed to sized by a terminating nul.
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* Return lexical ordering of *s1:*s2.
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*/
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static int sstrcmp(const char *s1, const char *e1, const char *s2, |
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const char *e2) |
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{ |
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for (;;) {
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if (!*s1 || !*s2 || *s1 != *s2)
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return (*s1 - *s2);
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++s1, ++s2; |
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if (s1 == e1 && s2 == e2)
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return (0); |
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else if (s1 == e1) |
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return (*s2);
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else if (s2 == e2) |
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return (*s1);
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} |
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} |
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/* compare *[s..e) to *altstr. *altstr may be a simple string or multiple
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* '|' delimited (possibly empty) strings in which case search for a match
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* within the alternatives proceeds left to right. Return 0 for success,
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* non-zero otherwise.
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*/
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static int altcmp(const char *s, const char *e, const char *altstr) |
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{ |
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const char *p, *q; |
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for (q = p = altstr; ; ) {
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while (*p && *p != '|') |
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++p; |
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if ((q == p && !*s) || (q != p && !sstrcmp(s, e, q, p)))
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return (0); |
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if (!*p)
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return (1); |
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else
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q = ++p; |
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} |
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} |
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/* search featureset for flag *[s..e), if found set corresponding bit in
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* *pval and return success, otherwise return zero
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*/
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static int lookup_feature(uint32_t *pval, const char *s, const char *e, |
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const char **featureset) |
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{ |
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uint32_t mask; |
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const char **ppc; |
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for (mask = 1, ppc = featureset; mask; mask <<= 1, ++ppc) |
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if (*ppc && !altcmp(s, e, *ppc)) {
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*pval |= mask; |
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break;
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} |
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return (mask ? 1 : 0); |
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} |
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static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features, |
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uint32_t *ext_features, |
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uint32_t *ext2_features, |
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uint32_t *ext3_features, |
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uint32_t *kvm_features) |
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{ |
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if (!lookup_feature(features, flagname, NULL, feature_name) && |
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!lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
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!lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
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!lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
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!lookup_feature(kvm_features, flagname, NULL, kvm_feature_name))
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fprintf(stderr, "CPU feature %s not found\n", flagname);
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} |
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typedef struct x86_def_t { |
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struct x86_def_t *next;
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const char *name; |
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uint32_t level; |
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uint32_t vendor1, vendor2, vendor3; |
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int family;
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int model;
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int stepping;
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uint32_t features, ext_features, ext2_features, ext3_features, kvm_features; |
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uint32_t xlevel; |
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char model_id[48]; |
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int vendor_override;
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uint32_t flags; |
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} x86_def_t; |
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#define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
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#define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
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CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC) |
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#define PENTIUM2_FEATURES (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | \
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CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \ |
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CPUID_PSE36 | CPUID_FXSR) |
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#define PENTIUM3_FEATURES (PENTIUM2_FEATURES | CPUID_SSE)
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#define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \
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CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \ |
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CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \ |
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CPUID_PAE | CPUID_SEP | CPUID_APIC) |
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#define EXT2_FEATURE_MASK 0x0183F3FF |
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|
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/* maintains list of cpu model definitions
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*/
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static x86_def_t *x86_defs = {NULL}; |
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/* built-in cpu model definitions (deprecated)
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*/
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static x86_def_t builtin_x86_defs[] = {
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#ifdef TARGET_X86_64
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{ |
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.name = "qemu64",
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.level = 4,
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.vendor1 = CPUID_VENDOR_AMD_1, |
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.vendor2 = CPUID_VENDOR_AMD_2, |
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.vendor3 = CPUID_VENDOR_AMD_3, |
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.family = 6,
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.model = 2,
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.stepping = 3,
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.features = PPRO_FEATURES | |
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/* these features are needed for Win64 and aren't fully implemented */
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | |
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/* this feature is needed for Solaris and isn't fully implemented */
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CPUID_PSE36, |
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.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT, |
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.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | |
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CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, |
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.ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | |
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CPUID_EXT3_ABM | CPUID_EXT3_SSE4A, |
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.xlevel = 0x8000000A,
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.model_id = "QEMU Virtual CPU version " QEMU_VERSION,
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}, |
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{ |
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.name = "phenom",
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.level = 5,
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.vendor1 = CPUID_VENDOR_AMD_1, |
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.vendor2 = CPUID_VENDOR_AMD_2, |
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.vendor3 = CPUID_VENDOR_AMD_3, |
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.family = 16,
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.model = 2,
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.stepping = 3,
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/* Missing: CPUID_VME, CPUID_HT */
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.features = PPRO_FEATURES | |
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | |
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CPUID_PSE36, |
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.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 | |
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CPUID_EXT_POPCNT, |
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/* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
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.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | |
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CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX | |
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CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT | |
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CPUID_EXT2_FFXSR, |
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/* Missing: CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
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CPUID_EXT3_CR8LEG,
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CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
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CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
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.ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | |
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CPUID_EXT3_ABM | CPUID_EXT3_SSE4A, |
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.xlevel = 0x8000001A,
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.model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
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}, |
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{ |
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.name = "core2duo",
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.level = 10,
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.family = 6,
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.model = 15,
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.stepping = 11,
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/* The original CPU also implements these features:
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CPUID_VME, CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
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CPUID_TM, CPUID_PBE */
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.features = PPRO_FEATURES | |
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | |
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CPUID_PSE36, |
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/* The original CPU also implements these ext features:
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CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
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CPUID_EXT_TM2, CPUID_EXT_CX16, CPUID_EXT_XTPR, CPUID_EXT_PDCM */
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.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3, |
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.ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, |
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.ext3_features = CPUID_EXT3_LAHF_LM, |
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.xlevel = 0x80000008,
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.model_id = "Intel(R) Core(TM)2 Duo CPU T7700 @ 2.40GHz",
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}, |
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{ |
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.name = "kvm64",
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.level = 5,
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.vendor1 = CPUID_VENDOR_INTEL_1, |
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.vendor2 = CPUID_VENDOR_INTEL_2, |
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.vendor3 = CPUID_VENDOR_INTEL_3, |
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.family = 15,
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.model = 6,
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.stepping = 1,
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/* Missing: CPUID_VME, CPUID_HT */
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.features = PPRO_FEATURES | |
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CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | |
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CPUID_PSE36, |
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/* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
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.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16, |
328 |
/* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
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.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | |
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CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, |
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/* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
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CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
|
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CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
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CPUID_EXT3_OSVW, CPUID_EXT3_IBS, CPUID_EXT3_SVM */
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.ext3_features = 0,
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.xlevel = 0x80000008,
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.model_id = "Common KVM processor"
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}, |
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#endif
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{ |
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.name = "qemu32",
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.level = 4,
|
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.family = 6,
|
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.model = 3,
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.stepping = 3,
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.features = PPRO_FEATURES, |
347 |
.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_POPCNT, |
348 |
.xlevel = 0,
|
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.model_id = "QEMU Virtual CPU version " QEMU_VERSION,
|
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}, |
351 |
{ |
352 |
.name = "coreduo",
|
353 |
.level = 10,
|
354 |
.family = 6,
|
355 |
.model = 14,
|
356 |
.stepping = 8,
|
357 |
/* The original CPU also implements these features:
|
358 |
CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
|
359 |
CPUID_TM, CPUID_PBE */
|
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.features = PPRO_FEATURES | CPUID_VME | |
361 |
CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA, |
362 |
/* The original CPU also implements these ext features:
|
363 |
CPUID_EXT_VMX, CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_XTPR,
|
364 |
CPUID_EXT_PDCM */
|
365 |
.ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR, |
366 |
.ext2_features = CPUID_EXT2_NX, |
367 |
.xlevel = 0x80000008,
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368 |
.model_id = "Genuine Intel(R) CPU T2600 @ 2.16GHz",
|
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}, |
370 |
{ |
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.name = "486",
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.level = 0,
|
373 |
.family = 4,
|
374 |
.model = 0,
|
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.stepping = 0,
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.features = I486_FEATURES, |
377 |
.xlevel = 0,
|
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}, |
379 |
{ |
380 |
.name = "pentium",
|
381 |
.level = 1,
|
382 |
.family = 5,
|
383 |
.model = 4,
|
384 |
.stepping = 3,
|
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.features = PENTIUM_FEATURES, |
386 |
.xlevel = 0,
|
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}, |
388 |
{ |
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.name = "pentium2",
|
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.level = 2,
|
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.family = 6,
|
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.model = 5,
|
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.stepping = 2,
|
394 |
.features = PENTIUM2_FEATURES, |
395 |
.xlevel = 0,
|
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}, |
397 |
{ |
398 |
.name = "pentium3",
|
399 |
.level = 2,
|
400 |
.family = 6,
|
401 |
.model = 7,
|
402 |
.stepping = 3,
|
403 |
.features = PENTIUM3_FEATURES, |
404 |
.xlevel = 0,
|
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}, |
406 |
{ |
407 |
.name = "athlon",
|
408 |
.level = 2,
|
409 |
.vendor1 = CPUID_VENDOR_AMD_1, |
410 |
.vendor2 = CPUID_VENDOR_AMD_2, |
411 |
.vendor3 = CPUID_VENDOR_AMD_3, |
412 |
.family = 6,
|
413 |
.model = 2,
|
414 |
.stepping = 3,
|
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.features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME | CPUID_MTRR | CPUID_MCA, |
416 |
.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT, |
417 |
.xlevel = 0x80000008,
|
418 |
/* XXX: put another string ? */
|
419 |
.model_id = "QEMU Virtual CPU version " QEMU_VERSION,
|
420 |
}, |
421 |
{ |
422 |
.name = "n270",
|
423 |
/* original is on level 10 */
|
424 |
.level = 5,
|
425 |
.family = 6,
|
426 |
.model = 28,
|
427 |
.stepping = 2,
|
428 |
.features = PPRO_FEATURES | |
429 |
CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_VME, |
430 |
/* Missing: CPUID_DTS | CPUID_ACPI | CPUID_SS |
|
431 |
* CPUID_HT | CPUID_TM | CPUID_PBE */
|
432 |
/* Some CPUs got no CPUID_SEP */
|
433 |
.ext_features = CPUID_EXT_MONITOR | |
434 |
CPUID_EXT_SSE3 /* PNI */ | CPUID_EXT_SSSE3,
|
435 |
/* Missing: CPUID_EXT_DSCPL | CPUID_EXT_EST |
|
436 |
* CPUID_EXT_TM2 | CPUID_EXT_XTPR */
|
437 |
.ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX, |
438 |
/* Missing: .ext3_features = CPUID_EXT3_LAHF_LM */
|
439 |
.xlevel = 0x8000000A,
|
440 |
.model_id = "Intel(R) Atom(TM) CPU N270 @ 1.60GHz",
|
441 |
}, |
442 |
}; |
443 |
|
444 |
static int cpu_x86_fill_model_id(char *str) |
445 |
{ |
446 |
uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; |
447 |
int i;
|
448 |
|
449 |
for (i = 0; i < 3; i++) { |
450 |
host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx); |
451 |
memcpy(str + i * 16 + 0, &eax, 4); |
452 |
memcpy(str + i * 16 + 4, &ebx, 4); |
453 |
memcpy(str + i * 16 + 8, &ecx, 4); |
454 |
memcpy(str + i * 16 + 12, &edx, 4); |
455 |
} |
456 |
return 0; |
457 |
} |
458 |
|
459 |
static int cpu_x86_fill_host(x86_def_t *x86_cpu_def) |
460 |
{ |
461 |
uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0; |
462 |
|
463 |
x86_cpu_def->name = "host";
|
464 |
host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx); |
465 |
x86_cpu_def->level = eax; |
466 |
x86_cpu_def->vendor1 = ebx; |
467 |
x86_cpu_def->vendor2 = edx; |
468 |
x86_cpu_def->vendor3 = ecx; |
469 |
|
470 |
host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx); |
471 |
x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF); |
472 |
x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12); |
473 |
x86_cpu_def->stepping = eax & 0x0F;
|
474 |
x86_cpu_def->ext_features = ecx; |
475 |
x86_cpu_def->features = edx; |
476 |
|
477 |
host_cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx); |
478 |
x86_cpu_def->xlevel = eax; |
479 |
|
480 |
host_cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx); |
481 |
x86_cpu_def->ext2_features = edx; |
482 |
x86_cpu_def->ext3_features = ecx; |
483 |
cpu_x86_fill_model_id(x86_cpu_def->model_id); |
484 |
x86_cpu_def->vendor_override = 0;
|
485 |
|
486 |
return 0; |
487 |
} |
488 |
|
489 |
static int unavailable_host_feature(struct model_features_t *f, uint32_t mask) |
490 |
{ |
491 |
int i;
|
492 |
|
493 |
for (i = 0; i < 32; ++i) |
494 |
if (1 << i & mask) { |
495 |
fprintf(stderr, "warning: host cpuid %04x_%04x lacks requested"
|
496 |
" flag '%s' [0x%08x]\n",
|
497 |
f->cpuid >> 16, f->cpuid & 0xffff, |
498 |
f->flag_names[i] ? f->flag_names[i] : "[reserved]", mask);
|
499 |
break;
|
500 |
} |
501 |
return 0; |
502 |
} |
503 |
|
504 |
/* best effort attempt to inform user requested cpu flags aren't making
|
505 |
* their way to the guest. Note: ft[].check_feat ideally should be
|
506 |
* specified via a guest_def field to suppress report of extraneous flags.
|
507 |
*/
|
508 |
static int check_features_against_host(x86_def_t *guest_def) |
509 |
{ |
510 |
x86_def_t host_def; |
511 |
uint32_t mask; |
512 |
int rv, i;
|
513 |
struct model_features_t ft[] = {
|
514 |
{&guest_def->features, &host_def.features, |
515 |
~0, feature_name, 0x00000000}, |
516 |
{&guest_def->ext_features, &host_def.ext_features, |
517 |
~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x00000001},
|
518 |
{&guest_def->ext2_features, &host_def.ext2_features, |
519 |
~PPRO_FEATURES, ext2_feature_name, 0x80000000},
|
520 |
{&guest_def->ext3_features, &host_def.ext3_features, |
521 |
~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001}};
|
522 |
|
523 |
cpu_x86_fill_host(&host_def); |
524 |
for (rv = 0, i = 0; i < sizeof (ft) / sizeof (ft[0]); ++i) |
525 |
for (mask = 1; mask; mask <<= 1) |
526 |
if (ft[i].check_feat & mask && *ft[i].guest_feat & mask &&
|
527 |
!(*ft[i].host_feat & mask)) { |
528 |
unavailable_host_feature(&ft[i], mask); |
529 |
rv = 1;
|
530 |
} |
531 |
return rv;
|
532 |
} |
533 |
|
534 |
static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model) |
535 |
{ |
536 |
unsigned int i; |
537 |
x86_def_t *def; |
538 |
|
539 |
char *s = strdup(cpu_model);
|
540 |
char *featurestr, *name = strtok(s, ","); |
541 |
uint32_t plus_features = 0, plus_ext_features = 0, plus_ext2_features = 0, plus_ext3_features = 0, plus_kvm_features = 0; |
542 |
uint32_t minus_features = 0, minus_ext_features = 0, minus_ext2_features = 0, minus_ext3_features = 0, minus_kvm_features = 0; |
543 |
uint32_t numvalue; |
544 |
|
545 |
for (def = x86_defs; def; def = def->next)
|
546 |
if (!strcmp(name, def->name))
|
547 |
break;
|
548 |
if (kvm_enabled() && strcmp(name, "host") == 0) { |
549 |
cpu_x86_fill_host(x86_cpu_def); |
550 |
} else if (!def) { |
551 |
goto error;
|
552 |
} else {
|
553 |
memcpy(x86_cpu_def, def, sizeof(*def));
|
554 |
} |
555 |
|
556 |
plus_kvm_features = ~0; /* not supported bits will be filtered out later */ |
557 |
|
558 |
add_flagname_to_bitmaps("hypervisor", &plus_features,
|
559 |
&plus_ext_features, &plus_ext2_features, &plus_ext3_features, |
560 |
&plus_kvm_features); |
561 |
|
562 |
featurestr = strtok(NULL, ","); |
563 |
|
564 |
while (featurestr) {
|
565 |
char *val;
|
566 |
if (featurestr[0] == '+') { |
567 |
add_flagname_to_bitmaps(featurestr + 1, &plus_features, &plus_ext_features, &plus_ext2_features, &plus_ext3_features, &plus_kvm_features);
|
568 |
} else if (featurestr[0] == '-') { |
569 |
add_flagname_to_bitmaps(featurestr + 1, &minus_features, &minus_ext_features, &minus_ext2_features, &minus_ext3_features, &minus_kvm_features);
|
570 |
} else if ((val = strchr(featurestr, '='))) { |
571 |
*val = 0; val++;
|
572 |
if (!strcmp(featurestr, "family")) { |
573 |
char *err;
|
574 |
numvalue = strtoul(val, &err, 0);
|
575 |
if (!*val || *err) {
|
576 |
fprintf(stderr, "bad numerical value %s\n", val);
|
577 |
goto error;
|
578 |
} |
579 |
x86_cpu_def->family = numvalue; |
580 |
} else if (!strcmp(featurestr, "model")) { |
581 |
char *err;
|
582 |
numvalue = strtoul(val, &err, 0);
|
583 |
if (!*val || *err || numvalue > 0xff) { |
584 |
fprintf(stderr, "bad numerical value %s\n", val);
|
585 |
goto error;
|
586 |
} |
587 |
x86_cpu_def->model = numvalue; |
588 |
} else if (!strcmp(featurestr, "stepping")) { |
589 |
char *err;
|
590 |
numvalue = strtoul(val, &err, 0);
|
591 |
if (!*val || *err || numvalue > 0xf) { |
592 |
fprintf(stderr, "bad numerical value %s\n", val);
|
593 |
goto error;
|
594 |
} |
595 |
x86_cpu_def->stepping = numvalue ; |
596 |
} else if (!strcmp(featurestr, "level")) { |
597 |
char *err;
|
598 |
numvalue = strtoul(val, &err, 0);
|
599 |
if (!*val || *err) {
|
600 |
fprintf(stderr, "bad numerical value %s\n", val);
|
601 |
goto error;
|
602 |
} |
603 |
x86_cpu_def->level = numvalue; |
604 |
} else if (!strcmp(featurestr, "xlevel")) { |
605 |
char *err;
|
606 |
numvalue = strtoul(val, &err, 0);
|
607 |
if (!*val || *err) {
|
608 |
fprintf(stderr, "bad numerical value %s\n", val);
|
609 |
goto error;
|
610 |
} |
611 |
if (numvalue < 0x80000000) { |
612 |
numvalue += 0x80000000;
|
613 |
} |
614 |
x86_cpu_def->xlevel = numvalue; |
615 |
} else if (!strcmp(featurestr, "vendor")) { |
616 |
if (strlen(val) != 12) { |
617 |
fprintf(stderr, "vendor string must be 12 chars long\n");
|
618 |
goto error;
|
619 |
} |
620 |
x86_cpu_def->vendor1 = 0;
|
621 |
x86_cpu_def->vendor2 = 0;
|
622 |
x86_cpu_def->vendor3 = 0;
|
623 |
for(i = 0; i < 4; i++) { |
624 |
x86_cpu_def->vendor1 |= ((uint8_t)val[i ]) << (8 * i);
|
625 |
x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i); |
626 |
x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i); |
627 |
} |
628 |
x86_cpu_def->vendor_override = 1;
|
629 |
} else if (!strcmp(featurestr, "model_id")) { |
630 |
pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id),
|
631 |
val); |
632 |
} else {
|
633 |
fprintf(stderr, "unrecognized feature %s\n", featurestr);
|
634 |
goto error;
|
635 |
} |
636 |
} else if (!strcmp(featurestr, "check")) { |
637 |
check_cpuid = 1;
|
638 |
} else if (!strcmp(featurestr, "enforce")) { |
639 |
check_cpuid = enforce_cpuid = 1;
|
640 |
} else {
|
641 |
fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
|
642 |
goto error;
|
643 |
} |
644 |
featurestr = strtok(NULL, ","); |
645 |
} |
646 |
x86_cpu_def->features |= plus_features; |
647 |
x86_cpu_def->ext_features |= plus_ext_features; |
648 |
x86_cpu_def->ext2_features |= plus_ext2_features; |
649 |
x86_cpu_def->ext3_features |= plus_ext3_features; |
650 |
x86_cpu_def->kvm_features |= plus_kvm_features; |
651 |
x86_cpu_def->features &= ~minus_features; |
652 |
x86_cpu_def->ext_features &= ~minus_ext_features; |
653 |
x86_cpu_def->ext2_features &= ~minus_ext2_features; |
654 |
x86_cpu_def->ext3_features &= ~minus_ext3_features; |
655 |
x86_cpu_def->kvm_features &= ~minus_kvm_features; |
656 |
if (check_cpuid) {
|
657 |
if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
|
658 |
goto error;
|
659 |
} |
660 |
free(s); |
661 |
return 0; |
662 |
|
663 |
error:
|
664 |
free(s); |
665 |
return -1; |
666 |
} |
667 |
|
668 |
/* generate a composite string into buf of all cpuid names in featureset
|
669 |
* selected by fbits. indicate truncation at bufsize in the event of overflow.
|
670 |
* if flags, suppress names undefined in featureset.
|
671 |
*/
|
672 |
static void listflags(char *buf, int bufsize, uint32_t fbits, |
673 |
const char **featureset, uint32_t flags) |
674 |
{ |
675 |
const char **p = &featureset[31]; |
676 |
char *q, *b, bit;
|
677 |
int nc;
|
678 |
|
679 |
b = 4 <= bufsize ? buf + (bufsize -= 3) - 1 : NULL; |
680 |
*buf = '\0';
|
681 |
for (q = buf, bit = 31; fbits && bufsize; --p, fbits &= ~(1 << bit), --bit) |
682 |
if (fbits & 1 << bit && (*p || !flags)) { |
683 |
if (*p)
|
684 |
nc = snprintf(q, bufsize, "%s%s", q == buf ? "" : " ", *p); |
685 |
else
|
686 |
nc = snprintf(q, bufsize, "%s[%d]", q == buf ? "" : " ", bit); |
687 |
if (bufsize <= nc) {
|
688 |
if (b) {
|
689 |
memcpy(b, "...", sizeof("...")); |
690 |
} |
691 |
return;
|
692 |
} |
693 |
q += nc; |
694 |
bufsize -= nc; |
695 |
} |
696 |
} |
697 |
|
698 |
/* generate CPU information:
|
699 |
* -? list model names
|
700 |
* -?model list model names/IDs
|
701 |
* -?dump output all model (x86_def_t) data
|
702 |
* -?cpuid list all recognized cpuid flag names
|
703 |
*/
|
704 |
void x86_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...), |
705 |
const char *optarg) |
706 |
{ |
707 |
unsigned char model = !strcmp("?model", optarg); |
708 |
unsigned char dump = !strcmp("?dump", optarg); |
709 |
unsigned char cpuid = !strcmp("?cpuid", optarg); |
710 |
x86_def_t *def; |
711 |
char buf[256]; |
712 |
|
713 |
if (cpuid) {
|
714 |
(*cpu_fprintf)(f, "Recognized CPUID flags:\n");
|
715 |
listflags(buf, sizeof (buf), (uint32_t)~0, feature_name, 1); |
716 |
(*cpu_fprintf)(f, " f_edx: %s\n", buf);
|
717 |
listflags(buf, sizeof (buf), (uint32_t)~0, ext_feature_name, 1); |
718 |
(*cpu_fprintf)(f, " f_ecx: %s\n", buf);
|
719 |
listflags(buf, sizeof (buf), (uint32_t)~0, ext2_feature_name, 1); |
720 |
(*cpu_fprintf)(f, " extf_edx: %s\n", buf);
|
721 |
listflags(buf, sizeof (buf), (uint32_t)~0, ext3_feature_name, 1); |
722 |
(*cpu_fprintf)(f, " extf_ecx: %s\n", buf);
|
723 |
return;
|
724 |
} |
725 |
for (def = x86_defs; def; def = def->next) {
|
726 |
snprintf(buf, sizeof (buf), def->flags ? "[%s]": "%s", def->name); |
727 |
if (model || dump) {
|
728 |
(*cpu_fprintf)(f, "x86 %16s %-48s\n", buf, def->model_id);
|
729 |
} else {
|
730 |
(*cpu_fprintf)(f, "x86 %16s\n", buf);
|
731 |
} |
732 |
if (dump) {
|
733 |
memcpy(buf, &def->vendor1, sizeof (def->vendor1));
|
734 |
memcpy(buf + 4, &def->vendor2, sizeof (def->vendor2)); |
735 |
memcpy(buf + 8, &def->vendor3, sizeof (def->vendor3)); |
736 |
buf[12] = '\0'; |
737 |
(*cpu_fprintf)(f, |
738 |
" family %d model %d stepping %d level %d xlevel 0x%x"
|
739 |
" vendor \"%s\"\n",
|
740 |
def->family, def->model, def->stepping, def->level, |
741 |
def->xlevel, buf); |
742 |
listflags(buf, sizeof (buf), def->features, feature_name, 0); |
743 |
(*cpu_fprintf)(f, " feature_edx %08x (%s)\n", def->features,
|
744 |
buf); |
745 |
listflags(buf, sizeof (buf), def->ext_features, ext_feature_name,
|
746 |
0);
|
747 |
(*cpu_fprintf)(f, " feature_ecx %08x (%s)\n", def->ext_features,
|
748 |
buf); |
749 |
listflags(buf, sizeof (buf), def->ext2_features, ext2_feature_name,
|
750 |
0);
|
751 |
(*cpu_fprintf)(f, " extfeature_edx %08x (%s)\n",
|
752 |
def->ext2_features, buf); |
753 |
listflags(buf, sizeof (buf), def->ext3_features, ext3_feature_name,
|
754 |
0);
|
755 |
(*cpu_fprintf)(f, " extfeature_ecx %08x (%s)\n",
|
756 |
def->ext3_features, buf); |
757 |
(*cpu_fprintf)(f, "\n");
|
758 |
} |
759 |
} |
760 |
if (kvm_enabled()) {
|
761 |
(*cpu_fprintf)(f, "x86 %16s\n", "[host]"); |
762 |
} |
763 |
} |
764 |
|
765 |
int cpu_x86_register (CPUX86State *env, const char *cpu_model) |
766 |
{ |
767 |
x86_def_t def1, *def = &def1; |
768 |
|
769 |
if (cpu_x86_find_by_name(def, cpu_model) < 0) |
770 |
return -1; |
771 |
if (def->vendor1) {
|
772 |
env->cpuid_vendor1 = def->vendor1; |
773 |
env->cpuid_vendor2 = def->vendor2; |
774 |
env->cpuid_vendor3 = def->vendor3; |
775 |
} else {
|
776 |
env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1; |
777 |
env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2; |
778 |
env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3; |
779 |
} |
780 |
env->cpuid_vendor_override = def->vendor_override; |
781 |
env->cpuid_level = def->level; |
782 |
if (def->family > 0x0f) |
783 |
env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20); |
784 |
else
|
785 |
env->cpuid_version = def->family << 8;
|
786 |
env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16); |
787 |
env->cpuid_version |= def->stepping; |
788 |
env->cpuid_features = def->features; |
789 |
env->pat = 0x0007040600070406ULL;
|
790 |
env->cpuid_ext_features = def->ext_features; |
791 |
env->cpuid_ext2_features = def->ext2_features; |
792 |
env->cpuid_ext3_features = def->ext3_features; |
793 |
env->cpuid_xlevel = def->xlevel; |
794 |
env->cpuid_kvm_features = def->kvm_features; |
795 |
{ |
796 |
const char *model_id = def->model_id; |
797 |
int c, len, i;
|
798 |
if (!model_id)
|
799 |
model_id = "";
|
800 |
len = strlen(model_id); |
801 |
for(i = 0; i < 48; i++) { |
802 |
if (i >= len)
|
803 |
c = '\0';
|
804 |
else
|
805 |
c = (uint8_t)model_id[i]; |
806 |
env->cpuid_model[i >> 2] |= c << (8 * (i & 3)); |
807 |
} |
808 |
} |
809 |
return 0; |
810 |
} |
811 |
|
812 |
#if !defined(CONFIG_USER_ONLY)
|
813 |
/* copy vendor id string to 32 bit register, nul pad as needed
|
814 |
*/
|
815 |
static void cpyid(const char *s, uint32_t *id) |
816 |
{ |
817 |
char *d = (char *)id; |
818 |
char i;
|
819 |
|
820 |
for (i = sizeof (*id); i--; ) |
821 |
*d++ = *s ? *s++ : '\0';
|
822 |
} |
823 |
|
824 |
/* interpret radix and convert from string to arbitrary scalar,
|
825 |
* otherwise flag failure
|
826 |
*/
|
827 |
#define setscalar(pval, str, perr) \
|
828 |
{ \ |
829 |
char *pend; \
|
830 |
unsigned long ul; \ |
831 |
\ |
832 |
ul = strtoul(str, &pend, 0); \
|
833 |
*str && !*pend ? (*pval = ul) : (*perr = 1); \
|
834 |
} |
835 |
|
836 |
/* map cpuid options to feature bits, otherwise return failure
|
837 |
* (option tags in *str are delimited by whitespace)
|
838 |
*/
|
839 |
static void setfeatures(uint32_t *pval, const char *str, |
840 |
const char **featureset, int *perr) |
841 |
{ |
842 |
const char *p, *q; |
843 |
|
844 |
for (q = p = str; *p || *q; q = p) {
|
845 |
while (iswhite(*p))
|
846 |
q = ++p; |
847 |
while (*p && !iswhite(*p))
|
848 |
++p; |
849 |
if (!*q && !*p)
|
850 |
return;
|
851 |
if (!lookup_feature(pval, q, p, featureset)) {
|
852 |
fprintf(stderr, "error: feature \"%.*s\" not available in set\n",
|
853 |
(int)(p - q), q);
|
854 |
*perr = 1;
|
855 |
return;
|
856 |
} |
857 |
} |
858 |
} |
859 |
|
860 |
/* map config file options to x86_def_t form
|
861 |
*/
|
862 |
static int cpudef_setfield(const char *name, const char *str, void *opaque) |
863 |
{ |
864 |
x86_def_t *def = opaque; |
865 |
int err = 0; |
866 |
|
867 |
if (!strcmp(name, "name")) { |
868 |
def->name = strdup(str); |
869 |
} else if (!strcmp(name, "model_id")) { |
870 |
strncpy(def->model_id, str, sizeof (def->model_id));
|
871 |
} else if (!strcmp(name, "level")) { |
872 |
setscalar(&def->level, str, &err) |
873 |
} else if (!strcmp(name, "vendor")) { |
874 |
cpyid(&str[0], &def->vendor1);
|
875 |
cpyid(&str[4], &def->vendor2);
|
876 |
cpyid(&str[8], &def->vendor3);
|
877 |
} else if (!strcmp(name, "family")) { |
878 |
setscalar(&def->family, str, &err) |
879 |
} else if (!strcmp(name, "model")) { |
880 |
setscalar(&def->model, str, &err) |
881 |
} else if (!strcmp(name, "stepping")) { |
882 |
setscalar(&def->stepping, str, &err) |
883 |
} else if (!strcmp(name, "feature_edx")) { |
884 |
setfeatures(&def->features, str, feature_name, &err); |
885 |
} else if (!strcmp(name, "feature_ecx")) { |
886 |
setfeatures(&def->ext_features, str, ext_feature_name, &err); |
887 |
} else if (!strcmp(name, "extfeature_edx")) { |
888 |
setfeatures(&def->ext2_features, str, ext2_feature_name, &err); |
889 |
} else if (!strcmp(name, "extfeature_ecx")) { |
890 |
setfeatures(&def->ext3_features, str, ext3_feature_name, &err); |
891 |
} else if (!strcmp(name, "xlevel")) { |
892 |
setscalar(&def->xlevel, str, &err) |
893 |
} else {
|
894 |
fprintf(stderr, "error: unknown option [%s = %s]\n", name, str);
|
895 |
return (1); |
896 |
} |
897 |
if (err) {
|
898 |
fprintf(stderr, "error: bad option value [%s = %s]\n", name, str);
|
899 |
return (1); |
900 |
} |
901 |
return (0); |
902 |
} |
903 |
|
904 |
/* register config file entry as x86_def_t
|
905 |
*/
|
906 |
static int cpudef_register(QemuOpts *opts, void *opaque) |
907 |
{ |
908 |
x86_def_t *def = qemu_mallocz(sizeof (x86_def_t));
|
909 |
|
910 |
qemu_opt_foreach(opts, cpudef_setfield, def, 1);
|
911 |
def->next = x86_defs; |
912 |
x86_defs = def; |
913 |
return (0); |
914 |
} |
915 |
#endif /* !CONFIG_USER_ONLY */ |
916 |
|
917 |
/* register "cpudef" models defined in configuration file. Here we first
|
918 |
* preload any built-in definitions
|
919 |
*/
|
920 |
void x86_cpudef_setup(void) |
921 |
{ |
922 |
int i;
|
923 |
|
924 |
for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) { |
925 |
builtin_x86_defs[i].next = x86_defs; |
926 |
builtin_x86_defs[i].flags = 1;
|
927 |
x86_defs = &builtin_x86_defs[i]; |
928 |
} |
929 |
#if !defined(CONFIG_USER_ONLY)
|
930 |
qemu_opts_foreach(&qemu_cpudef_opts, cpudef_register, NULL, 0); |
931 |
#endif
|
932 |
} |
933 |
|
934 |
static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx, |
935 |
uint32_t *ecx, uint32_t *edx) |
936 |
{ |
937 |
*ebx = env->cpuid_vendor1; |
938 |
*edx = env->cpuid_vendor2; |
939 |
*ecx = env->cpuid_vendor3; |
940 |
|
941 |
/* sysenter isn't supported on compatibility mode on AMD, syscall
|
942 |
* isn't supported in compatibility mode on Intel.
|
943 |
* Normally we advertise the actual cpu vendor, but you can override
|
944 |
* this if you want to use KVM's sysenter/syscall emulation
|
945 |
* in compatibility mode and when doing cross vendor migration
|
946 |
*/
|
947 |
if (kvm_enabled() && env->cpuid_vendor_override) {
|
948 |
host_cpuid(0, 0, NULL, ebx, ecx, edx); |
949 |
} |
950 |
} |
951 |
|
952 |
void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
|
953 |
uint32_t *eax, uint32_t *ebx, |
954 |
uint32_t *ecx, uint32_t *edx) |
955 |
{ |
956 |
/* test if maximum index reached */
|
957 |
if (index & 0x80000000) { |
958 |
if (index > env->cpuid_xlevel)
|
959 |
index = env->cpuid_level; |
960 |
} else {
|
961 |
if (index > env->cpuid_level)
|
962 |
index = env->cpuid_level; |
963 |
} |
964 |
|
965 |
switch(index) {
|
966 |
case 0: |
967 |
*eax = env->cpuid_level; |
968 |
get_cpuid_vendor(env, ebx, ecx, edx); |
969 |
break;
|
970 |
case 1: |
971 |
*eax = env->cpuid_version; |
972 |
*ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */ |
973 |
*ecx = env->cpuid_ext_features; |
974 |
*edx = env->cpuid_features; |
975 |
if (env->nr_cores * env->nr_threads > 1) { |
976 |
*ebx |= (env->nr_cores * env->nr_threads) << 16;
|
977 |
*edx |= 1 << 28; /* HTT bit */ |
978 |
} |
979 |
break;
|
980 |
case 2: |
981 |
/* cache info: needed for Pentium Pro compatibility */
|
982 |
*eax = 1;
|
983 |
*ebx = 0;
|
984 |
*ecx = 0;
|
985 |
*edx = 0x2c307d;
|
986 |
break;
|
987 |
case 4: |
988 |
/* cache info: needed for Core compatibility */
|
989 |
if (env->nr_cores > 1) { |
990 |
*eax = (env->nr_cores - 1) << 26; |
991 |
} else {
|
992 |
*eax = 0;
|
993 |
} |
994 |
switch (count) {
|
995 |
case 0: /* L1 dcache info */ |
996 |
*eax |= 0x0000121;
|
997 |
*ebx = 0x1c0003f;
|
998 |
*ecx = 0x000003f;
|
999 |
*edx = 0x0000001;
|
1000 |
break;
|
1001 |
case 1: /* L1 icache info */ |
1002 |
*eax |= 0x0000122;
|
1003 |
*ebx = 0x1c0003f;
|
1004 |
*ecx = 0x000003f;
|
1005 |
*edx = 0x0000001;
|
1006 |
break;
|
1007 |
case 2: /* L2 cache info */ |
1008 |
*eax |= 0x0000143;
|
1009 |
if (env->nr_threads > 1) { |
1010 |
*eax |= (env->nr_threads - 1) << 14; |
1011 |
} |
1012 |
*ebx = 0x3c0003f;
|
1013 |
*ecx = 0x0000fff;
|
1014 |
*edx = 0x0000001;
|
1015 |
break;
|
1016 |
default: /* end of info */ |
1017 |
*eax = 0;
|
1018 |
*ebx = 0;
|
1019 |
*ecx = 0;
|
1020 |
*edx = 0;
|
1021 |
break;
|
1022 |
} |
1023 |
break;
|
1024 |
case 5: |
1025 |
/* mwait info: needed for Core compatibility */
|
1026 |
*eax = 0; /* Smallest monitor-line size in bytes */ |
1027 |
*ebx = 0; /* Largest monitor-line size in bytes */ |
1028 |
*ecx = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE; |
1029 |
*edx = 0;
|
1030 |
break;
|
1031 |
case 6: |
1032 |
/* Thermal and Power Leaf */
|
1033 |
*eax = 0;
|
1034 |
*ebx = 0;
|
1035 |
*ecx = 0;
|
1036 |
*edx = 0;
|
1037 |
break;
|
1038 |
case 9: |
1039 |
/* Direct Cache Access Information Leaf */
|
1040 |
*eax = 0; /* Bits 0-31 in DCA_CAP MSR */ |
1041 |
*ebx = 0;
|
1042 |
*ecx = 0;
|
1043 |
*edx = 0;
|
1044 |
break;
|
1045 |
case 0xA: |
1046 |
/* Architectural Performance Monitoring Leaf */
|
1047 |
*eax = 0;
|
1048 |
*ebx = 0;
|
1049 |
*ecx = 0;
|
1050 |
*edx = 0;
|
1051 |
break;
|
1052 |
case 0x80000000: |
1053 |
*eax = env->cpuid_xlevel; |
1054 |
*ebx = env->cpuid_vendor1; |
1055 |
*edx = env->cpuid_vendor2; |
1056 |
*ecx = env->cpuid_vendor3; |
1057 |
break;
|
1058 |
case 0x80000001: |
1059 |
*eax = env->cpuid_version; |
1060 |
*ebx = 0;
|
1061 |
*ecx = env->cpuid_ext3_features; |
1062 |
*edx = env->cpuid_ext2_features; |
1063 |
|
1064 |
/* The Linux kernel checks for the CMPLegacy bit and
|
1065 |
* discards multiple thread information if it is set.
|
1066 |
* So dont set it here for Intel to make Linux guests happy.
|
1067 |
*/
|
1068 |
if (env->nr_cores * env->nr_threads > 1) { |
1069 |
uint32_t tebx, tecx, tedx; |
1070 |
get_cpuid_vendor(env, &tebx, &tecx, &tedx); |
1071 |
if (tebx != CPUID_VENDOR_INTEL_1 ||
|
1072 |
tedx != CPUID_VENDOR_INTEL_2 || |
1073 |
tecx != CPUID_VENDOR_INTEL_3) { |
1074 |
*ecx |= 1 << 1; /* CmpLegacy bit */ |
1075 |
} |
1076 |
} |
1077 |
|
1078 |
if (kvm_enabled()) {
|
1079 |
/* Nested SVM not yet supported in upstream QEMU */
|
1080 |
*ecx &= ~CPUID_EXT3_SVM; |
1081 |
} |
1082 |
break;
|
1083 |
case 0x80000002: |
1084 |
case 0x80000003: |
1085 |
case 0x80000004: |
1086 |
*eax = env->cpuid_model[(index - 0x80000002) * 4 + 0]; |
1087 |
*ebx = env->cpuid_model[(index - 0x80000002) * 4 + 1]; |
1088 |
*ecx = env->cpuid_model[(index - 0x80000002) * 4 + 2]; |
1089 |
*edx = env->cpuid_model[(index - 0x80000002) * 4 + 3]; |
1090 |
break;
|
1091 |
case 0x80000005: |
1092 |
/* cache info (L1 cache) */
|
1093 |
*eax = 0x01ff01ff;
|
1094 |
*ebx = 0x01ff01ff;
|
1095 |
*ecx = 0x40020140;
|
1096 |
*edx = 0x40020140;
|
1097 |
break;
|
1098 |
case 0x80000006: |
1099 |
/* cache info (L2 cache) */
|
1100 |
*eax = 0;
|
1101 |
*ebx = 0x42004200;
|
1102 |
*ecx = 0x02008140;
|
1103 |
*edx = 0;
|
1104 |
break;
|
1105 |
case 0x80000008: |
1106 |
/* virtual & phys address size in low 2 bytes. */
|
1107 |
/* XXX: This value must match the one used in the MMU code. */
|
1108 |
if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
|
1109 |
/* 64 bit processor */
|
1110 |
/* XXX: The physical address space is limited to 42 bits in exec.c. */
|
1111 |
*eax = 0x00003028; /* 48 bits virtual, 40 bits physical */ |
1112 |
} else {
|
1113 |
if (env->cpuid_features & CPUID_PSE36)
|
1114 |
*eax = 0x00000024; /* 36 bits physical */ |
1115 |
else
|
1116 |
*eax = 0x00000020; /* 32 bits physical */ |
1117 |
} |
1118 |
*ebx = 0;
|
1119 |
*ecx = 0;
|
1120 |
*edx = 0;
|
1121 |
if (env->nr_cores * env->nr_threads > 1) { |
1122 |
*ecx |= (env->nr_cores * env->nr_threads) - 1;
|
1123 |
} |
1124 |
break;
|
1125 |
case 0x8000000A: |
1126 |
*eax = 0x00000001; /* SVM Revision */ |
1127 |
*ebx = 0x00000010; /* nr of ASIDs */ |
1128 |
*ecx = 0;
|
1129 |
*edx = 0; /* optional features */ |
1130 |
break;
|
1131 |
default:
|
1132 |
/* reserved values: zero */
|
1133 |
*eax = 0;
|
1134 |
*ebx = 0;
|
1135 |
*ecx = 0;
|
1136 |
*edx = 0;
|
1137 |
break;
|
1138 |
} |
1139 |
} |