Revision ee951a37
| b/hw/hpet.c | ||
|---|---|---|
| 713 | 713 |
s->capability |= (s->num_timers - 1) << HPET_ID_NUM_TIM_SHIFT; |
| 714 | 714 |
s->capability |= ((HPET_CLK_PERIOD) << 32); |
| 715 | 715 |
|
| 716 |
isa_reserve_irq(RTC_ISA_IRQ); |
|
| 717 | 716 |
qdev_init_gpio_in(&dev->qdev, hpet_handle_rtc_irq, 1); |
| 718 | 717 |
|
| 719 | 718 |
/* HPET Area */ |
| b/hw/i8254.c | ||
|---|---|---|
| 514 | 514 |
s = &pit->channels[0]; |
| 515 | 515 |
/* the timer 0 is connected to an IRQ */ |
| 516 | 516 |
s->irq_timer = qemu_new_timer(vm_clock, pit_irq_timer, s); |
| 517 |
s->irq = isa_reserve_irq(pit->irq);
|
|
| 517 |
s->irq = isa_get_irq(pit->irq);
|
|
| 518 | 518 |
|
| 519 | 519 |
register_ioport_write(pit->iobase, 4, 1, pit_ioport_write, pit); |
| 520 | 520 |
register_ioport_read(pit->iobase, 3, 1, pit_ioport_read, pit); |
| b/hw/ide/piix.c | ||
|---|---|---|
| 122 | 122 |
for (i = 0; i < 2; i++) {
|
| 123 | 123 |
ide_bus_new(&d->bus[i], &d->dev.qdev, i); |
| 124 | 124 |
ide_init_ioport(&d->bus[i], port_info[i].iobase, port_info[i].iobase2); |
| 125 |
ide_init2(&d->bus[i], isa_reserve_irq(port_info[i].isairq));
|
|
| 125 |
ide_init2(&d->bus[i], isa_get_irq(port_info[i].isairq));
|
|
| 126 | 126 |
|
| 127 | 127 |
bmdma_init(&d->bus[i], &d->bmdma[i]); |
| 128 | 128 |
d->bmdma[i].bus = &d->bus[i]; |
| b/hw/ide/via.c | ||
|---|---|---|
| 145 | 145 |
for (i = 0; i < 2; i++) {
|
| 146 | 146 |
ide_bus_new(&d->bus[i], &d->dev.qdev, i); |
| 147 | 147 |
ide_init_ioport(&d->bus[i], port_info[i].iobase, port_info[i].iobase2); |
| 148 |
ide_init2(&d->bus[i], isa_reserve_irq(port_info[i].isairq));
|
|
| 148 |
ide_init2(&d->bus[i], isa_get_irq(port_info[i].isairq));
|
|
| 149 | 149 |
|
| 150 | 150 |
bmdma_init(&d->bus[i], &d->bmdma[i]); |
| 151 | 151 |
d->bmdma[i].bus = &d->bus[i]; |
| b/hw/isa-bus.c | ||
|---|---|---|
| 25 | 25 |
struct ISABus {
|
| 26 | 26 |
BusState qbus; |
| 27 | 27 |
qemu_irq *irqs; |
| 28 |
uint32_t assigned; |
|
| 29 | 28 |
}; |
| 30 | 29 |
static ISABus *isabus; |
| 31 | 30 |
target_phys_addr_t isa_mem_base = 0; |
| ... | ... | |
| 61 | 60 |
} |
| 62 | 61 |
|
| 63 | 62 |
/* |
| 64 |
* isa_reserve_irq() reserves the ISA irq and returns the corresponding |
|
| 65 |
* qemu_irq entry for the i8259. |
|
| 63 |
* isa_get_irq() returns the corresponding qemu_irq entry for the i8259. |
|
| 66 | 64 |
* |
| 67 | 65 |
* This function is only for special cases such as the 'ferr', and |
| 68 | 66 |
* temporary use for normal devices until they are converted to qdev. |
| 69 | 67 |
*/ |
| 70 |
qemu_irq isa_reserve_irq(int isairq)
|
|
| 68 |
qemu_irq isa_get_irq(int isairq)
|
|
| 71 | 69 |
{
|
| 72 | 70 |
if (isairq < 0 || isairq > 15) {
|
| 73 | 71 |
hw_error("isa irq %d invalid", isairq);
|
| 74 | 72 |
} |
| 75 |
if (isabus->assigned & (1 << isairq)) {
|
|
| 76 |
hw_error("isa irq %d already assigned", isairq);
|
|
| 77 |
} |
|
| 78 |
isabus->assigned |= (1 << isairq); |
|
| 79 | 73 |
return isabus->irqs[isairq]; |
| 80 | 74 |
} |
| 81 | 75 |
|
| 82 | 76 |
void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq) |
| 83 | 77 |
{
|
| 84 | 78 |
assert(dev->nirqs < ARRAY_SIZE(dev->isairq)); |
| 85 |
if (isabus->assigned & (1 << isairq)) {
|
|
| 86 |
hw_error("isa irq %d already assigned", isairq);
|
|
| 87 |
} |
|
| 88 |
isabus->assigned |= (1 << isairq); |
|
| 89 | 79 |
dev->isairq[dev->nirqs] = isairq; |
| 90 |
*p = isabus->irqs[isairq];
|
|
| 80 |
*p = isa_get_irq(isairq);
|
|
| 91 | 81 |
dev->nirqs++; |
| 92 | 82 |
} |
| 93 | 83 |
|
| b/hw/isa.h | ||
|---|---|---|
| 26 | 26 |
|
| 27 | 27 |
ISABus *isa_bus_new(DeviceState *dev); |
| 28 | 28 |
void isa_bus_irqs(qemu_irq *irqs); |
| 29 |
qemu_irq isa_reserve_irq(int isairq);
|
|
| 29 |
qemu_irq isa_get_irq(int isairq);
|
|
| 30 | 30 |
void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq); |
| 31 | 31 |
void isa_init_ioport(ISADevice *dev, uint16_t ioport); |
| 32 | 32 |
void isa_init_ioport_range(ISADevice *dev, uint16_t start, uint16_t length); |
| b/hw/mips_malta.c | ||
|---|---|---|
| 919 | 919 |
isa_bus_irqs(i8259); |
| 920 | 920 |
pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1); |
| 921 | 921 |
usb_uhci_piix4_init(pci_bus, piix4_devfn + 2); |
| 922 |
smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_reserve_irq(9),
|
|
| 922 |
smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100, isa_get_irq(9),
|
|
| 923 | 923 |
NULL, NULL, 0); |
| 924 | 924 |
eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ |
| 925 | 925 |
for (i = 0; i < 8; i++) {
|
| b/hw/pc_piix.c | ||
|---|---|---|
| 113 | 113 |
} |
| 114 | 114 |
isa_bus_irqs(isa_irq); |
| 115 | 115 |
|
| 116 |
pc_register_ferr_irq(isa_reserve_irq(13));
|
|
| 116 |
pc_register_ferr_irq(isa_get_irq(13));
|
|
| 117 | 117 |
|
| 118 | 118 |
pc_vga_init(pci_enabled? pci_bus: NULL); |
| 119 | 119 |
|
| ... | ... | |
| 169 | 169 |
smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1); |
| 170 | 170 |
/* TODO: Populate SPD eeprom data. */ |
| 171 | 171 |
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, |
| 172 |
isa_reserve_irq(9), *cmos_s3, *smi_irq,
|
|
| 172 |
isa_get_irq(9), *cmos_s3, *smi_irq,
|
|
| 173 | 173 |
kvm_enabled()); |
| 174 | 174 |
for (i = 0; i < 8; i++) {
|
| 175 | 175 |
DeviceState *eeprom; |
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