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Revision eec8972a

IDeec8972a5bc744eda695a86a984d746c240dff90

Added by Petar Jovanovic over 11 years ago

target-mips: Fix incorrect reads and writes to DSPControl register

Upper 4 bits of ccond (bits 31..28 ) of DSPControl register are not used in
the MIPS32 architecture. They are used in the MIPS64 architecture. For MIPS32
these bits must be written as zero, and return zero on read.

The change fixes writes (WRDSP) and reads (RDDSP) to the register. It also fixes
the tests that use these instructions, and makes them smaller and simpler.

Signed-off-by: Petar Jovanovic <>
Signed-off-by: Aurelien Jarno <>

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