Revision f0513d2c
b/MAINTAINERS | ||
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644 | 644 |
F: include/qemu/cpu.h |
645 | 645 |
F: target-i386/cpu.c |
646 | 646 |
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ICC Bus |
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M: Igor Mammedov <imammedo@redhat.com> |
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S: Supported |
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F: include/hw/cpu/icc_bus.h |
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F: hw/cpu/icc_bus.c |
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647 | 653 |
Device Tree |
648 | 654 |
M: Peter Crosthwaite <peter.crosthwaite@petalogix.com> |
649 | 655 |
M: Alexander Graf <agraf@suse.de> |
b/default-configs/i386-softmmu.mak | ||
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44 | 44 |
CONFIG_PCI_Q35=y |
45 | 45 |
CONFIG_APIC=y |
46 | 46 |
CONFIG_IOAPIC=y |
47 |
CONFIG_ICC_BUS=y |
|
47 | 48 |
CONFIG_PVPANIC=y |
b/default-configs/x86_64-softmmu.mak | ||
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44 | 44 |
CONFIG_PCI_Q35=y |
45 | 45 |
CONFIG_APIC=y |
46 | 46 |
CONFIG_IOAPIC=y |
47 |
CONFIG_ICC_BUS=y |
|
47 | 48 |
CONFIG_PVPANIC=y |
b/hw/cpu/Makefile.objs | ||
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1 | 1 |
obj-$(CONFIG_ARM11MPCORE) += arm11mpcore.o |
2 | 2 |
obj-$(CONFIG_ARM9MPCORE) += a9mpcore.o |
3 | 3 |
obj-$(CONFIG_ARM15MPCORE) += a15mpcore.o |
4 |
obj-$(CONFIG_ICC_BUS) += icc_bus.o |
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4 | 5 |
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b/hw/cpu/icc_bus.c | ||
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1 |
/* icc_bus.c |
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* emulate x86 ICC (Interrupt Controller Communications) bus |
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* |
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* Copyright (c) 2013 Red Hat, Inc |
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* |
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* Authors: |
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* Igor Mammedov <imammedo@redhat.com> |
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* |
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* This library is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU Lesser General Public |
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* License as published by the Free Software Foundation; either |
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* version 2 of the License, or (at your option) any later version. |
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* |
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* This library is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public |
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* License along with this library; if not, see <http://www.gnu.org/licenses/> |
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*/ |
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#include "hw/cpu/icc_bus.h" |
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#include "hw/sysbus.h" |
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|
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/* icc-bridge implementation */ |
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static void icc_bus_init(Object *obj) |
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{ |
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BusState *b = BUS(obj); |
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b->allow_hotplug = true; |
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} |
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static const TypeInfo icc_bus_info = { |
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.name = TYPE_ICC_BUS, |
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.parent = TYPE_BUS, |
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.instance_size = sizeof(ICCBus), |
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.instance_init = icc_bus_init, |
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}; |
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/* icc-device implementation */ |
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static void icc_device_realize(DeviceState *dev, Error **errp) |
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{ |
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ICCDevice *id = ICC_DEVICE(dev); |
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ICCDeviceClass *idc = ICC_DEVICE_GET_CLASS(id); |
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if (idc->init) { |
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if (idc->init(id) < 0) { |
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error_setg(errp, "%s initialization failed.", |
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object_get_typename(OBJECT(dev))); |
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} |
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} |
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} |
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static void icc_device_class_init(ObjectClass *oc, void *data) |
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{ |
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DeviceClass *dc = DEVICE_CLASS(oc); |
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dc->realize = icc_device_realize; |
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dc->bus_type = TYPE_ICC_BUS; |
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} |
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static const TypeInfo icc_device_info = { |
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.name = TYPE_ICC_DEVICE, |
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.parent = TYPE_DEVICE, |
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.abstract = true, |
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.instance_size = sizeof(ICCDevice), |
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.class_size = sizeof(ICCDeviceClass), |
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.class_init = icc_device_class_init, |
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}; |
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/* icc-bridge implementation */ |
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typedef struct ICCBridgeState { |
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/*< private >*/ |
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SysBusDevice parent_obj; |
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/*< public >*/ |
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ICCBus icc_bus; |
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} ICCBridgeState; |
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#define ICC_BRIGDE(obj) OBJECT_CHECK(ICCBridgeState, (obj), TYPE_ICC_BRIDGE) |
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static void icc_bridge_init(Object *obj) |
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{ |
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ICCBridgeState *s = ICC_BRIGDE(obj); |
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qbus_create_inplace(&s->icc_bus, TYPE_ICC_BUS, DEVICE(s), "icc"); |
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} |
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static const TypeInfo icc_bridge_info = { |
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.name = TYPE_ICC_BRIDGE, |
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.parent = TYPE_SYS_BUS_DEVICE, |
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.instance_init = icc_bridge_init, |
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.instance_size = sizeof(ICCBridgeState), |
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}; |
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static void icc_bus_register_types(void) |
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{ |
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type_register_static(&icc_bus_info); |
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type_register_static(&icc_device_info); |
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type_register_static(&icc_bridge_info); |
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} |
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type_init(icc_bus_register_types) |
b/hw/i386/pc_piix.c | ||
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37 | 37 |
#include "hw/kvm/clock.h" |
38 | 38 |
#include "sysemu/sysemu.h" |
39 | 39 |
#include "hw/sysbus.h" |
40 |
#include "hw/cpu/icc_bus.h" |
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40 | 41 |
#include "sysemu/arch_init.h" |
41 | 42 |
#include "sysemu/blockdev.h" |
42 | 43 |
#include "hw/i2c/smbus.h" |
... | ... | |
87 | 88 |
MemoryRegion *ram_memory; |
88 | 89 |
MemoryRegion *pci_memory; |
89 | 90 |
MemoryRegion *rom_memory; |
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DeviceState *icc_bridge; |
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90 | 92 |
void *fw_cfg = NULL; |
91 | 93 |
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icc_bridge = qdev_create(NULL, TYPE_ICC_BRIDGE); |
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object_property_add_child(qdev_get_machine(), "icc-bridge", |
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OBJECT(icc_bridge), NULL); |
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92 | 98 |
pc_cpus_init(cpu_model); |
93 | 99 |
pc_acpi_init("acpi-dsdt.aml"); |
94 | 100 |
|
... | ... | |
163 | 169 |
if (pci_enabled) { |
164 | 170 |
ioapic_init_gsi(gsi_state, "i440fx"); |
165 | 171 |
} |
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qdev_init_nofail(icc_bridge); |
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166 | 173 |
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167 | 174 |
pc_register_ferr_irq(gsi[13]); |
168 | 175 |
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b/hw/i386/pc_q35.c | ||
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41 | 41 |
#include "hw/ide/pci.h" |
42 | 42 |
#include "hw/ide/ahci.h" |
43 | 43 |
#include "hw/usb.h" |
44 |
#include "hw/cpu/icc_bus.h" |
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44 | 45 |
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45 | 46 |
/* ICH9 AHCI has 6 ports */ |
46 | 47 |
#define MAX_SATA_PORTS 6 |
... | ... | |
75 | 76 |
int i; |
76 | 77 |
ICH9LPCState *ich9_lpc; |
77 | 78 |
PCIDevice *ahci; |
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DeviceState *icc_bridge; |
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icc_bridge = qdev_create(NULL, TYPE_ICC_BRIDGE); |
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object_property_add_child(qdev_get_machine(), "icc-bridge", |
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OBJECT(icc_bridge), NULL); |
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78 | 84 |
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79 | 85 |
pc_cpus_init(cpu_model); |
80 | 86 |
pc_acpi_init("q35-acpi-dsdt.aml"); |
... | ... | |
158 | 164 |
if (pci_enabled) { |
159 | 165 |
ioapic_init_gsi(gsi_state, NULL); |
160 | 166 |
} |
167 |
qdev_init_nofail(icc_bridge); |
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161 | 168 |
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162 | 169 |
pc_register_ferr_irq(gsi[13]); |
163 | 170 |
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b/include/hw/cpu/icc_bus.h | ||
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1 |
/* icc_bus.h |
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* emulate x86 ICC (Interrupt Controller Communications) bus |
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3 |
* |
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4 |
* Copyright (c) 2013 Red Hat, Inc |
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* |
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6 |
* Authors: |
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* Igor Mammedov <imammedo@redhat.com> |
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8 |
* |
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9 |
* This library is free software; you can redistribute it and/or |
|
10 |
* modify it under the terms of the GNU Lesser General Public |
|
11 |
* License as published by the Free Software Foundation; either |
|
12 |
* version 2 of the License, or (at your option) any later version. |
|
13 |
* |
|
14 |
* This library is distributed in the hope that it will be useful, |
|
15 |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
16 |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
|
17 |
* Lesser General Public License for more details. |
|
18 |
* |
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19 |
* You should have received a copy of the GNU Lesser General Public |
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* License along with this library; if not, see <http://www.gnu.org/licenses/> |
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*/ |
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#ifndef ICC_BUS_H |
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#define ICC_BUS_H |
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#include "hw/qdev-core.h" |
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#define TYPE_ICC_BUS "icc-bus" |
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#ifndef CONFIG_USER_ONLY |
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/** |
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* ICCBus: |
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* |
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* ICC bus |
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*/ |
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typedef struct ICCBus { |
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/*< private >*/ |
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BusState parent_obj; |
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/*< public >*/ |
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} ICCBus; |
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#define ICC_BUS(obj) OBJECT_CHECK(ICCBus, (obj), TYPE_ICC_BUS) |
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/** |
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* ICCDevice: |
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* |
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* ICC device |
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*/ |
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typedef struct ICCDevice { |
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/*< private >*/ |
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DeviceState qdev; |
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/*< public >*/ |
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} ICCDevice; |
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/** |
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* ICCDeviceClass: |
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* @init: Initialization callback for derived classes. |
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* |
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* ICC device class |
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*/ |
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typedef struct ICCDeviceClass { |
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/*< private >*/ |
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DeviceClass parent_class; |
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/*< public >*/ |
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int (*init)(ICCDevice *dev); /* TODO replace with QOM realize */ |
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} ICCDeviceClass; |
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#define TYPE_ICC_DEVICE "icc-device" |
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#define ICC_DEVICE(obj) OBJECT_CHECK(ICCDevice, (obj), TYPE_ICC_DEVICE) |
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#define ICC_DEVICE_CLASS(klass) \ |
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OBJECT_CLASS_CHECK(ICCDeviceClass, (klass), TYPE_ICC_DEVICE) |
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#define ICC_DEVICE_GET_CLASS(obj) \ |
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OBJECT_GET_CLASS(ICCDeviceClass, (obj), TYPE_ICC_DEVICE) |
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#define TYPE_ICC_BRIDGE "icc-bridge" |
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#endif /* CONFIG_USER_ONLY */ |
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#endif |
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