/target-alpha/translate.c - Diff - qemu - Greek Research and Technology Network's projects

Revision f071b4d3 target-alpha/translate.c

b/target-alpha/translate.c
59	59
60	60	#include "gen-op.h"
61	61
62		static inline void gen_op_nop (void)
	62	static always_inline void gen_op_nop (void)
63	63	{
64	64	#if defined(GENERATE_NOP)
65	65	gen_op_no_op();
...	...
77	77	NAME ## 24, NAME ## 25, NAME ## 26, NAME ## 27, \
78	78	NAME ## 28, NAME ## 29, NAME ## 30, NAME ## 31, \
79	79	}; \
80		static inline void func(int n) \
	80	static always_inline void func (int n) \
81	81	{ \
82	82	NAME ## _table[n](); \
83	83	}
...	...
99	99	GEN32(gen_op_store_T2_ir, gen_op_store_T2_ir);
100	100	GEN32(gen_op_cmov_ir, gen_op_cmov_ir);
101	101
102		static inline void gen_load_ir (DisasContext *ctx, int irn, int Tn)
	102	static always_inline void gen_load_ir (DisasContext *ctx, int irn, int Tn)
103	103	{
104	104	switch (Tn) {
105	105	case 0:
...	...
114	114	}
115	115	}
116	116
117		static inline void gen_store_ir (DisasContext *ctx, int irn, int Tn)
	117	static always_inline void gen_store_ir (DisasContext *ctx, int irn, int Tn)
118	118	{
119	119	switch (Tn) {
120	120	case 0:
...	...
146	146	GEN32(gen_op_store_FT2_fir, gen_op_store_FT2_fir);
147	147	GEN32(gen_op_cmov_fir, gen_op_cmov_fir);
148	148
149		static inline void gen_load_fir (DisasContext *ctx, int firn, int Tn)
	149	static always_inline void gen_load_fir (DisasContext *ctx, int firn, int Tn)
150	150	{
151	151	switch (Tn) {
152	152	case 0:
...	...
161	161	}
162	162	}
163	163
164		static inline void gen_store_fir (DisasContext *ctx, int firn, int Tn)
	164	static always_inline void gen_store_fir (DisasContext *ctx, int firn, int Tn)
165	165	{
166	166	switch (Tn) {
167	167	case 0:
...	...
205	205
206	206	#define GEN_LD(width) \
207	207	OP_LD_TABLE(width); \
208		static void gen_ld##width (DisasContext *ctx) \
	208	static always_inline void gen_ld##width (DisasContext *ctx) \
209	209	{ \
210	210	(*gen_op_ld##width[ctx->mem_idx])(); \
211	211	}
212	212
213	213	#define GEN_ST(width) \
214	214	OP_ST_TABLE(width); \
215		static void gen_st##width (DisasContext *ctx) \
	215	static always_inline void gen_st##width (DisasContext *ctx) \
216	216	{ \
217	217	(*gen_op_st##width[ctx->mem_idx])(); \
218	218	}
...	...
244	244	GEN_ST(t);
245	245
246	246	#if defined(__i386__) \|\| defined(__x86_64__)
247		static inline void gen_op_set_s16_T0 (int16_t imm)
	247	static always_inline void gen_op_set_s16_T0 (int16_t imm)
248	248	{
249	249	gen_op_set_s32_T0((int32_t)imm);
250	250	}
251	251
252		static inline void gen_op_set_s16_T1 (int16_t imm)
	252	static always_inline void gen_op_set_s16_T1 (int16_t imm)
253	253	{
254	254	gen_op_set_s32_T1((int32_t)imm);
255	255	}
256	256
257		static inline void gen_op_set_u16_T0 (uint16_t imm)
	257	static always_inline void gen_op_set_u16_T0 (uint16_t imm)
258	258	{
259	259	gen_op_set_s32_T0((uint32_t)imm);
260	260	}
261	261
262		static inline void gen_op_set_u16_T1 (uint16_t imm)
	262	static always_inline void gen_op_set_u16_T1 (uint16_t imm)
263	263	{
264	264	gen_op_set_s32_T1((uint32_t)imm);
265	265	}
266	266	#endif
267	267
268		static inline void gen_set_sT0 (DisasContext *ctx, int64_t imm)
	268	static always_inline void gen_set_sT0 (DisasContext *ctx, int64_t imm)
269	269	{
270	270	int32_t imm32;
271	271	int16_t imm16;
...	...
291	291	}
292	292	}
293	293
294		static inline void gen_set_sT1 (DisasContext *ctx, int64_t imm)
	294	static always_inline void gen_set_sT1 (DisasContext *ctx, int64_t imm)
295	295	{
296	296	int32_t imm32;
297	297	int16_t imm16;
...	...
317	317	}
318	318	}
319	319
320		static inline void gen_set_uT0 (DisasContext *ctx, uint64_t imm)
	320	static always_inline void gen_set_uT0 (DisasContext *ctx, uint64_t imm)
321	321	{
322	322	if (!(imm >> 32)) {
323	323	if ((!imm >> 16)) {
...	...
337	337	}
338	338	}
339	339
340		static inline void gen_set_uT1 (DisasContext *ctx, uint64_t imm)
	340	static always_inline void gen_set_uT1 (DisasContext *ctx, uint64_t imm)
341	341	{
342	342	if (!(imm >> 32)) {
343	343	if ((!imm >> 16)) {
...	...
357	357	}
358	358	}
359	359
360		static inline void gen_update_pc (DisasContext *ctx)
	360	static always_inline void gen_update_pc (DisasContext *ctx)
361	361	{
362	362	if (!(ctx->pc >> 32)) {
363	363	gen_op_update_pc32(ctx->pc);
...	...
370	370	}
371	371	}
372	372
373		static inline void _gen_op_bcond (DisasContext *ctx)
	373	static always_inline void _gen_op_bcond (DisasContext *ctx)
374	374	{
375	375	#if 0 // Qemu does not know how to do this...
376	376	gen_op_bcond(ctx->pc);
...	...
379	379	#endif
380	380	}
381	381
382		static inline void gen_excp (DisasContext *ctx, int exception, int error_code)
	382	static always_inline void gen_excp (DisasContext *ctx,
	383	int exception, int error_code)
383	384	{
384	385	gen_update_pc(ctx);
385	386	gen_op_excp(exception, error_code);
386	387	}
387	388
388		static inline void gen_invalid (DisasContext *ctx)
	389	static always_inline void gen_invalid (DisasContext *ctx)
389	390	{
390	391	gen_excp(ctx, EXCP_OPCDEC, 0);
391	392	}
392	393
393		static void gen_load_mem (DisasContext *ctx,
394		void (gen_load_op)(DisasContext ctx),
395		int ra, int rb, int32_t disp16, int clear)
	394	static always_inline void gen_load_mem (DisasContext *ctx,
	395	void (gen_load_op)(DisasContext ctx),
	396	int ra, int rb, int32_t disp16,
	397	int clear)
396	398	{
397	399	if (ra == 31 && disp16 == 0) {
398	400	/* UNOP */
...	...
410	412	}
411	413	}
412	414
413		static void gen_store_mem (DisasContext *ctx,
414		void (gen_store_op)(DisasContext ctx),
415		int ra, int rb, int32_t disp16, int clear)
	415	static always_inline void gen_store_mem (DisasContext *ctx,
	416	void (gen_store_op)(DisasContext ctx),
	417	int ra, int rb, int32_t disp16,
	418	int clear)
416	419	{
417	420	gen_load_ir(ctx, rb, 0);
418	421	if (disp16 != 0) {
...	...
425	428	(*gen_store_op)(ctx);
426	429	}
427	430
428		static void gen_load_fmem (DisasContext *ctx,
429		void (gen_load_fop)(DisasContext ctx),
430		int ra, int rb, int32_t disp16)
	431	static always_inline void gen_load_fmem (DisasContext *ctx,
	432	void (gen_load_fop)(DisasContext ctx),
	433	int ra, int rb, int32_t disp16)
431	434	{
432	435	gen_load_ir(ctx, rb, 0);
433	436	if (disp16 != 0) {
...	...
438	441	gen_store_fir(ctx, ra, 1);
439	442	}
440	443
441		static void gen_store_fmem (DisasContext *ctx,
442		void (gen_store_fop)(DisasContext ctx),
443		int ra, int rb, int32_t disp16)
	444	static always_inline void gen_store_fmem (DisasContext *ctx,
	445	void (gen_store_fop)(DisasContext ctx),
	446	int ra, int rb, int32_t disp16)
444	447	{
445	448	gen_load_ir(ctx, rb, 0);
446	449	if (disp16 != 0) {
...	...
451	454	(*gen_store_fop)(ctx);
452	455	}
453	456
454		static void gen_bcond (DisasContext ctx, void (gen_test_op)(void),
455		int ra, int32_t disp16)
	457	static always_inline void gen_bcond (DisasContext *ctx,
	458	void (*gen_test_op)(void),
	459	int ra, int32_t disp16)
456	460	{
457	461	if (disp16 != 0) {
458	462	gen_set_uT0(ctx, ctx->pc);
...	...
466	470	_gen_op_bcond(ctx);
467	471	}
468	472
469		static void gen_fbcond (DisasContext ctx, void (gen_test_op)(void),
470		int ra, int32_t disp16)
	473	static always_inline void gen_fbcond (DisasContext *ctx,
	474	void (*gen_test_op)(void),
	475	int ra, int32_t disp16)
471	476	{
472	477	if (disp16 != 0) {
473	478	gen_set_uT0(ctx, ctx->pc);
...	...
481	486	_gen_op_bcond(ctx);
482	487	}
483	488
484		static void gen_arith2 (DisasContext ctx, void (gen_arith_op)(void),
485		int rb, int rc, int islit, int8_t lit)
	489	static always_inline void gen_arith2 (DisasContext *ctx,
	490	void (*gen_arith_op)(void),
	491	int rb, int rc, int islit, int8_t lit)
486	492	{
487	493	if (islit)
488	494	gen_set_sT0(ctx, lit);
...	...
492	498	gen_store_ir(ctx, rc, 0);
493	499	}
494	500
495		static void gen_arith3 (DisasContext ctx, void (gen_arith_op)(void),
496		int ra, int rb, int rc, int islit, int8_t lit)
	501	static always_inline void gen_arith3 (DisasContext *ctx,
	502	void (*gen_arith_op)(void),
	503	int ra, int rb, int rc,
	504	int islit, int8_t lit)
497	505	{
498	506	gen_load_ir(ctx, ra, 0);
499	507	if (islit)
...	...
504	512	gen_store_ir(ctx, rc, 0);
505	513	}
506	514
507		static void gen_cmov (DisasContext ctx, void (gen_test_op)(void),
508		int ra, int rb, int rc, int islit, int8_t lit)
	515	static always_inline void gen_cmov (DisasContext *ctx,
	516	void (*gen_test_op)(void),
	517	int ra, int rb, int rc,
	518	int islit, int8_t lit)
509	519	{
510	520	gen_load_ir(ctx, ra, 1);
511	521	if (islit)
...	...
516	526	gen_op_cmov_ir(rc);
517	527	}
518	528
519		static void gen_farith2 (DisasContext ctx, void (gen_arith_fop)(void),
520		int rb, int rc)
	529	static always_inline void gen_farith2 (DisasContext *ctx,
	530	void (*gen_arith_fop)(void),
	531	int rb, int rc)
521	532	{
522	533	gen_load_fir(ctx, rb, 0);
523	534	(*gen_arith_fop)();
524	535	gen_store_fir(ctx, rc, 0);
525	536	}
526	537
527		static void gen_farith3 (DisasContext ctx, void (gen_arith_fop)(void),
528		int ra, int rb, int rc)
	538	static always_inline void gen_farith3 (DisasContext *ctx,
	539	void (*gen_arith_fop)(void),
	540	int ra, int rb, int rc)
529	541	{
530	542	gen_load_fir(ctx, ra, 0);
531	543	gen_load_fir(ctx, rb, 1);
...	...
533	545	gen_store_fir(ctx, rc, 0);
534	546	}
535	547
536		static void gen_fcmov (DisasContext ctx, void (gen_test_fop)(void),
537		int ra, int rb, int rc)
	548	static always_inline void gen_fcmov (DisasContext *ctx,
	549	void (*gen_test_fop)(void),
	550	int ra, int rb, int rc)
538	551	{
539	552	gen_load_fir(ctx, ra, 0);
540	553	gen_load_fir(ctx, rb, 1);
...	...
542	555	gen_op_cmov_fir(rc);
543	556	}
544	557
545		static void gen_fti (DisasContext ctx, void (gen_move_fop)(void),
546		int ra, int rc)
	558	static always_inline void gen_fti (DisasContext *ctx,
	559	void (*gen_move_fop)(void),
	560	int ra, int rc)
547	561	{
548	562	gen_load_fir(ctx, rc, 0);
549	563	(*gen_move_fop)();
550	564	gen_store_ir(ctx, ra, 0);
551	565	}
552	566
553		static void gen_itf (DisasContext ctx, void (gen_move_fop)(void),
554		int ra, int rc)
	567	static always_inline void gen_itf (DisasContext *ctx,
	568	void (*gen_move_fop)(void),
	569	int ra, int rc)
555	570	{
556	571	gen_load_ir(ctx, ra, 0);
557	572	(*gen_move_fop)();
558	573	gen_store_fir(ctx, rc, 0);
559	574	}
560	575
561		static void gen_s4addl (void)
	576	static always_inline void gen_s4addl (void)
562	577	{
563	578	gen_op_s4();
564	579	gen_op_addl();
565	580	}
566	581
567		static void gen_s4subl (void)
	582	static always_inline void gen_s4subl (void)
568	583	{
569	584	gen_op_s4();
570	585	gen_op_subl();
571	586	}
572	587
573		static void gen_s8addl (void)
	588	static always_inline void gen_s8addl (void)
574	589	{
575	590	gen_op_s8();
576	591	gen_op_addl();
577	592	}
578	593
579		static void gen_s8subl (void)
	594	static always_inline void gen_s8subl (void)
580	595	{
581	596	gen_op_s8();
582	597	gen_op_subl();
583	598	}
584	599
585		static void gen_s4addq (void)
	600	static always_inline void gen_s4addq (void)
586	601	{
587	602	gen_op_s4();
588	603	gen_op_addq();
589	604	}
590	605
591		static void gen_s4subq (void)
	606	static always_inline void gen_s4subq (void)
592	607	{
593	608	gen_op_s4();
594	609	gen_op_subq();
595	610	}
596	611
597		static void gen_s8addq (void)
	612	static always_inline void gen_s8addq (void)
598	613	{
599	614	gen_op_s8();
600	615	gen_op_addq();
601	616	}
602	617
603		static void gen_s8subq (void)
	618	static always_inline void gen_s8subq (void)
604	619	{
605	620	gen_op_s8();
606	621	gen_op_subq();
607	622	}
608	623
609		static void gen_amask (void)
	624	static always_inline void gen_amask (void)
610	625	{
611	626	gen_op_load_amask();
612	627	gen_op_bic();
613	628	}
614	629
615		static int translate_one (DisasContext *ctx, uint32_t insn)
	630	static always_inline int translate_one (DisasContext *ctx, uint32_t insn)
616	631	{
617	632	uint32_t palcode;
618	633	int32_t disp21, disp16, disp12;
...	...
1958	1973	return ret;
1959	1974	}
1960	1975
1961		int gen_intermediate_code_internal (CPUState env, TranslationBlock tb,
1962		int search_pc)
	1976	static always_inline int gen_intermediate_code_internal (CPUState *env,
	1977	TranslationBlock *tb,
	1978	int search_pc)
1963	1979	{
1964	1980	#if defined ALPHA_DEBUG_DISAS
1965	1981	static int insn_count;

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Revision f071b4d3 target-alpha/translate.c