Revision f08b32fe
b/hw/apb_pci.c | ||
---|---|---|
236 | 236 |
pci_apb_iowrite, s); |
237 | 237 |
sysbus_init_mmio(dev, 0x10000ULL, pci_ioport); |
238 | 238 |
/* mem_config */ |
239 |
pci_mem_config = pci_host_config_register_io_memory(&s->host_state);
|
|
239 |
pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
|
|
240 | 240 |
sysbus_init_mmio(dev, 0x10ULL, pci_mem_config); |
241 | 241 |
/* mem_data */ |
242 |
pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
|
|
242 |
pci_mem_data = pci_host_data_register_mmio(&s->host_state);
|
|
243 | 243 |
sysbus_init_mmio(dev, 0x10000000ULL, pci_mem_data); |
244 | 244 |
return 0; |
245 | 245 |
} |
b/hw/grackle_pci.c | ||
---|---|---|
108 | 108 |
|
109 | 109 |
s = FROM_SYSBUS(GrackleState, dev); |
110 | 110 |
|
111 |
pci_mem_config = pci_host_config_register_io_memory(&s->host_state);
|
|
112 |
pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
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|
111 |
pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
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|
112 |
pci_mem_data = pci_host_data_register_mmio(&s->host_state);
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|
113 | 113 |
sysbus_init_mmio(dev, 0x1000, pci_mem_config); |
114 | 114 |
sysbus_init_mmio(dev, 0x1000, pci_mem_data); |
115 | 115 |
|
... | ... | |
126 | 126 |
|
127 | 127 |
s = FROM_SYSBUS(GrackleState, dev); |
128 | 128 |
|
129 |
pci_mem_config = pci_host_config_register_io_memory(&s->host_state);
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|
130 |
pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
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|
129 |
pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
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|
130 |
pci_mem_data = pci_host_data_register_mmio(&s->host_state);
|
|
131 | 131 |
sysbus_init_mmio(dev, 0x1000, pci_mem_config); |
132 | 132 |
sysbus_init_mmio(dev, 0x1000, pci_mem_data); |
133 | 133 |
return 0; |
b/hw/pci_host.c | ||
---|---|---|
116 | 116 |
&pci_host_config_readl, |
117 | 117 |
}; |
118 | 118 |
|
119 |
int pci_host_config_register_io_memory(PCIHostState *s)
|
|
119 |
int pci_host_conf_register_mmio(PCIHostState *s)
|
|
120 | 120 |
{ |
121 | 121 |
return cpu_register_io_memory(pci_host_config_read, |
122 | 122 |
pci_host_config_write, s); |
... | ... | |
156 | 156 |
&pci_host_config_readl_noswap, |
157 | 157 |
}; |
158 | 158 |
|
159 |
int pci_host_config_register_io_memory_noswap(PCIHostState *s)
|
|
159 |
int pci_host_conf_register_mmio_noswap(PCIHostState *s)
|
|
160 | 160 |
{ |
161 | 161 |
return cpu_register_io_memory(pci_host_config_read_noswap, |
162 | 162 |
pci_host_config_write_noswap, s); |
... | ... | |
180 | 180 |
return val; |
181 | 181 |
} |
182 | 182 |
|
183 |
void pci_host_config_register_ioport(pio_addr_t ioport, PCIHostState *s)
|
|
183 |
void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s) |
|
184 | 184 |
{ |
185 | 185 |
register_ioport_write(ioport, 4, 4, pci_host_config_writel_ioport, s); |
186 | 186 |
register_ioport_read(ioport, 4, 4, pci_host_config_readl_ioport, s); |
... | ... | |
203 | 203 |
pci_host_data_readl_mmio, |
204 | 204 |
}; |
205 | 205 |
|
206 |
int pci_host_data_register_io_memory(PCIHostState *s)
|
|
206 |
int pci_host_data_register_mmio(PCIHostState *s)
|
|
207 | 207 |
{ |
208 | 208 |
return cpu_register_io_memory(pci_host_data_read_mmio, |
209 | 209 |
pci_host_data_write_mmio, |
b/hw/pci_host.h | ||
---|---|---|
40 | 40 |
uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len); |
41 | 41 |
|
42 | 42 |
/* for mmio */ |
43 |
int pci_host_config_register_io_memory(PCIHostState *s);
|
|
44 |
int pci_host_config_register_io_memory_noswap(PCIHostState *s);
|
|
45 |
int pci_host_data_register_io_memory(PCIHostState *s);
|
|
43 |
int pci_host_conf_register_mmio(PCIHostState *s);
|
|
44 |
int pci_host_conf_register_mmio_noswap(PCIHostState *s);
|
|
45 |
int pci_host_data_register_mmio(PCIHostState *s);
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|
46 | 46 |
|
47 | 47 |
/* for ioio */ |
48 |
void pci_host_config_register_ioport(pio_addr_t ioport, PCIHostState *s);
|
|
48 |
void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s); |
|
49 | 49 |
void pci_host_data_register_ioport(pio_addr_t ioport, PCIHostState *s); |
50 | 50 |
|
51 | 51 |
#endif /* PCI_HOST_H */ |
b/hw/piix_pci.c | ||
---|---|---|
180 | 180 |
{ |
181 | 181 |
I440FXState *s = FROM_SYSBUS(I440FXState, dev); |
182 | 182 |
|
183 |
pci_host_config_register_ioport(0xcf8, s);
|
|
183 |
pci_host_conf_register_ioport(0xcf8, s); |
|
184 | 184 |
|
185 | 185 |
pci_host_data_register_ioport(0xcfc, s); |
186 | 186 |
return 0; |
b/hw/ppc4xx_pci.c | ||
---|---|---|
378 | 378 |
cpu_register_physical_memory(config_space + PCIC0_CFGADDR, 4, index); |
379 | 379 |
|
380 | 380 |
/* CFGDATA */ |
381 |
index = pci_host_data_register_io_memory(&controller->pci_state);
|
|
381 |
index = pci_host_data_register_mmio(&controller->pci_state);
|
|
382 | 382 |
if (index < 0) |
383 | 383 |
goto free; |
384 | 384 |
cpu_register_physical_memory(config_space + PCIC0_CFGDATA, 4, index); |
b/hw/ppce500_pci.c | ||
---|---|---|
293 | 293 |
controller->pci_dev = d; |
294 | 294 |
|
295 | 295 |
/* CFGADDR */ |
296 |
index = pci_host_config_register_io_memory_noswap(&controller->pci_state);
|
|
296 |
index = pci_host_conf_register_mmio_noswap(&controller->pci_state);
|
|
297 | 297 |
if (index < 0) |
298 | 298 |
goto free; |
299 | 299 |
cpu_register_physical_memory(registers + PCIE500_CFGADDR, 4, index); |
300 | 300 |
|
301 | 301 |
/* CFGDATA */ |
302 |
index = pci_host_data_register_io_memory(&controller->pci_state);
|
|
302 |
index = pci_host_data_register_mmio(&controller->pci_state);
|
|
303 | 303 |
if (index < 0) |
304 | 304 |
goto free; |
305 | 305 |
cpu_register_physical_memory(registers + PCIE500_CFGDATA, 4, index); |
b/hw/prep_pci.c | ||
---|---|---|
128 | 128 |
s->bus = pci_register_bus(NULL, "pci", |
129 | 129 |
prep_set_irq, prep_map_irq, pic, 0, 4); |
130 | 130 |
|
131 |
pci_host_config_register_ioport(0xcf8, s);
|
|
131 |
pci_host_conf_register_ioport(0xcf8, s); |
|
132 | 132 |
|
133 | 133 |
pci_host_data_register_ioport(0xcfc, s); |
134 | 134 |
|
b/hw/unin_pci.c | ||
---|---|---|
84 | 84 |
/* Uninorth main bus */ |
85 | 85 |
s = FROM_SYSBUS(UNINState, dev); |
86 | 86 |
|
87 |
pci_mem_config = pci_host_config_register_io_memory(&s->host_state);
|
|
88 |
pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
|
|
87 |
pci_mem_config = pci_host_conf_register_mmio(&s->host_state);
|
|
88 |
pci_mem_data = pci_host_data_register_mmio(&s->host_state);
|
|
89 | 89 |
sysbus_init_mmio(dev, 0x1000, pci_mem_config); |
90 | 90 |
sysbus_init_mmio(dev, 0x1000, pci_mem_data); |
91 | 91 |
|
... | ... | |
103 | 103 |
s = FROM_SYSBUS(UNINState, dev); |
104 | 104 |
|
105 | 105 |
// XXX: s = &pci_bridge[2]; |
106 |
pci_mem_config = pci_host_config_register_io_memory_noswap(&s->host_state);
|
|
107 |
pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
|
|
106 |
pci_mem_config = pci_host_conf_register_mmio_noswap(&s->host_state);
|
|
107 |
pci_mem_data = pci_host_data_register_mmio(&s->host_state);
|
|
108 | 108 |
sysbus_init_mmio(dev, 0x1000, pci_mem_config); |
109 | 109 |
sysbus_init_mmio(dev, 0x1000, pci_mem_data); |
110 | 110 |
return 0; |
... | ... | |
118 | 118 |
/* Uninorth AGP bus */ |
119 | 119 |
s = FROM_SYSBUS(UNINState, dev); |
120 | 120 |
|
121 |
pci_mem_config = pci_host_config_register_io_memory_noswap(&s->host_state);
|
|
122 |
pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
|
|
121 |
pci_mem_config = pci_host_conf_register_mmio_noswap(&s->host_state);
|
|
122 |
pci_mem_data = pci_host_data_register_mmio(&s->host_state);
|
|
123 | 123 |
sysbus_init_mmio(dev, 0x1000, pci_mem_config); |
124 | 124 |
sysbus_init_mmio(dev, 0x1000, pci_mem_data); |
125 | 125 |
return 0; |
... | ... | |
133 | 133 |
/* Uninorth internal bus */ |
134 | 134 |
s = FROM_SYSBUS(UNINState, dev); |
135 | 135 |
|
136 |
pci_mem_config = pci_host_config_register_io_memory_noswap(&s->host_state);
|
|
137 |
pci_mem_data = pci_host_data_register_io_memory(&s->host_state);
|
|
136 |
pci_mem_config = pci_host_conf_register_mmio_noswap(&s->host_state);
|
|
137 |
pci_mem_data = pci_host_data_register_mmio(&s->host_state);
|
|
138 | 138 |
sysbus_init_mmio(dev, 0x1000, pci_mem_config); |
139 | 139 |
sysbus_init_mmio(dev, 0x1000, pci_mem_data); |
140 | 140 |
return 0; |
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