root / target-sh4 / op_helper.c @ f24f381b
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1 | fdf9b3e8 | bellard | /*
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2 | fdf9b3e8 | bellard | * SH4 emulation
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3 | 5fafdf24 | ths | *
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4 | fdf9b3e8 | bellard | * Copyright (c) 2005 Samuel Tardieu
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5 | fdf9b3e8 | bellard | *
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6 | fdf9b3e8 | bellard | * This library is free software; you can redistribute it and/or
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7 | fdf9b3e8 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | fdf9b3e8 | bellard | * License as published by the Free Software Foundation; either
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9 | fdf9b3e8 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | fdf9b3e8 | bellard | *
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11 | fdf9b3e8 | bellard | * This library is distributed in the hope that it will be useful,
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12 | fdf9b3e8 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | fdf9b3e8 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | fdf9b3e8 | bellard | * Lesser General Public License for more details.
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15 | fdf9b3e8 | bellard | *
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16 | fdf9b3e8 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | fdf9b3e8 | bellard | * License along with this library; if not, write to the Free Software
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18 | fdf9b3e8 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | fdf9b3e8 | bellard | */
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20 | fdf9b3e8 | bellard | #include <assert.h> |
21 | fdf9b3e8 | bellard | #include "exec.h" |
22 | fdf9b3e8 | bellard | |
23 | fdf9b3e8 | bellard | #ifndef CONFIG_USER_ONLY
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24 | fdf9b3e8 | bellard | |
25 | fdf9b3e8 | bellard | #define MMUSUFFIX _mmu
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26 | fdf9b3e8 | bellard | |
27 | fdf9b3e8 | bellard | #define SHIFT 0 |
28 | fdf9b3e8 | bellard | #include "softmmu_template.h" |
29 | fdf9b3e8 | bellard | |
30 | fdf9b3e8 | bellard | #define SHIFT 1 |
31 | fdf9b3e8 | bellard | #include "softmmu_template.h" |
32 | fdf9b3e8 | bellard | |
33 | fdf9b3e8 | bellard | #define SHIFT 2 |
34 | fdf9b3e8 | bellard | #include "softmmu_template.h" |
35 | fdf9b3e8 | bellard | |
36 | fdf9b3e8 | bellard | #define SHIFT 3 |
37 | fdf9b3e8 | bellard | #include "softmmu_template.h" |
38 | fdf9b3e8 | bellard | |
39 | 6ebbf390 | j_mayer | void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr) |
40 | fdf9b3e8 | bellard | { |
41 | fdf9b3e8 | bellard | TranslationBlock *tb; |
42 | fdf9b3e8 | bellard | CPUState *saved_env; |
43 | fdf9b3e8 | bellard | unsigned long pc; |
44 | fdf9b3e8 | bellard | int ret;
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45 | fdf9b3e8 | bellard | |
46 | fdf9b3e8 | bellard | /* XXX: hack to restore env in all cases, even if not called from
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47 | fdf9b3e8 | bellard | generated code */
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48 | fdf9b3e8 | bellard | saved_env = env; |
49 | fdf9b3e8 | bellard | env = cpu_single_env; |
50 | 6ebbf390 | j_mayer | ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
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51 | fdf9b3e8 | bellard | if (ret) {
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52 | fdf9b3e8 | bellard | if (retaddr) {
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53 | fdf9b3e8 | bellard | /* now we have a real cpu fault */
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54 | fdf9b3e8 | bellard | pc = (unsigned long) retaddr; |
55 | fdf9b3e8 | bellard | tb = tb_find_pc(pc); |
56 | fdf9b3e8 | bellard | if (tb) {
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57 | fdf9b3e8 | bellard | /* the PC is inside the translated code. It means that we have
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58 | fdf9b3e8 | bellard | a virtual CPU fault */
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59 | fdf9b3e8 | bellard | cpu_restore_state(tb, env, pc, NULL);
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60 | fdf9b3e8 | bellard | } |
61 | fdf9b3e8 | bellard | } |
62 | e6afc2f4 | aurel32 | cpu_loop_exit(); |
63 | fdf9b3e8 | bellard | } |
64 | fdf9b3e8 | bellard | env = saved_env; |
65 | fdf9b3e8 | bellard | } |
66 | fdf9b3e8 | bellard | |
67 | fdf9b3e8 | bellard | #endif
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68 | fdf9b3e8 | bellard | |
69 | ea2b542a | aurel32 | void helper_ldtlb(void) |
70 | ea2b542a | aurel32 | { |
71 | ea2b542a | aurel32 | #ifdef CONFIG_USER_ONLY
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72 | ea2b542a | aurel32 | /* XXXXX */
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73 | ea2b542a | aurel32 | assert(0);
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74 | ea2b542a | aurel32 | #else
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75 | ea2b542a | aurel32 | cpu_load_tlb(env); |
76 | ea2b542a | aurel32 | #endif
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77 | ea2b542a | aurel32 | } |
78 | ea2b542a | aurel32 | |
79 | e6afc2f4 | aurel32 | void helper_raise_illegal_instruction(void) |
80 | e6afc2f4 | aurel32 | { |
81 | e6afc2f4 | aurel32 | env->exception_index = 0x180;
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82 | e6afc2f4 | aurel32 | cpu_loop_exit(); |
83 | e6afc2f4 | aurel32 | } |
84 | e6afc2f4 | aurel32 | |
85 | e6afc2f4 | aurel32 | void helper_raise_slot_illegal_instruction(void) |
86 | e6afc2f4 | aurel32 | { |
87 | e6afc2f4 | aurel32 | env->exception_index = 0x1a0;
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88 | e6afc2f4 | aurel32 | cpu_loop_exit(); |
89 | e6afc2f4 | aurel32 | } |
90 | e6afc2f4 | aurel32 | |
91 | e6afc2f4 | aurel32 | void helper_debug(void) |
92 | e6afc2f4 | aurel32 | { |
93 | e6afc2f4 | aurel32 | env->exception_index = EXCP_DEBUG; |
94 | e6afc2f4 | aurel32 | cpu_loop_exit(); |
95 | e6afc2f4 | aurel32 | } |
96 | e6afc2f4 | aurel32 | |
97 | f24f381b | aurel32 | void helper_sleep(uint32_t next_pc)
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98 | e6afc2f4 | aurel32 | { |
99 | e6afc2f4 | aurel32 | env->halted = 1;
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100 | e6afc2f4 | aurel32 | env->exception_index = EXCP_HLT; |
101 | f24f381b | aurel32 | env->pc = next_pc; |
102 | e6afc2f4 | aurel32 | cpu_loop_exit(); |
103 | e6afc2f4 | aurel32 | } |
104 | e6afc2f4 | aurel32 | |
105 | e6afc2f4 | aurel32 | void helper_trapa(uint32_t tra)
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106 | e6afc2f4 | aurel32 | { |
107 | e6afc2f4 | aurel32 | env->tra = tra << 2;
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108 | e6afc2f4 | aurel32 | env->exception_index = 0x160;
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109 | e6afc2f4 | aurel32 | cpu_loop_exit(); |
110 | e6afc2f4 | aurel32 | } |
111 | e6afc2f4 | aurel32 | |
112 | 6f06939b | aurel32 | uint32_t helper_addc(uint32_t arg0, uint32_t arg1) |
113 | fdf9b3e8 | bellard | { |
114 | fdf9b3e8 | bellard | uint32_t tmp0, tmp1; |
115 | fdf9b3e8 | bellard | |
116 | 6f06939b | aurel32 | tmp1 = arg0 + arg1; |
117 | 6f06939b | aurel32 | tmp0 = arg1; |
118 | 6f06939b | aurel32 | arg1 = tmp1 + (env->sr & 1);
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119 | fdf9b3e8 | bellard | if (tmp0 > tmp1)
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120 | fdf9b3e8 | bellard | env->sr |= SR_T; |
121 | fdf9b3e8 | bellard | else
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122 | fdf9b3e8 | bellard | env->sr &= ~SR_T; |
123 | 6f06939b | aurel32 | if (tmp1 > arg1)
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124 | fdf9b3e8 | bellard | env->sr |= SR_T; |
125 | 6f06939b | aurel32 | return arg1;
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126 | fdf9b3e8 | bellard | } |
127 | fdf9b3e8 | bellard | |
128 | 6f06939b | aurel32 | uint32_t helper_addv(uint32_t arg0, uint32_t arg1) |
129 | fdf9b3e8 | bellard | { |
130 | fdf9b3e8 | bellard | uint32_t dest, src, ans; |
131 | fdf9b3e8 | bellard | |
132 | 6f06939b | aurel32 | if ((int32_t) arg1 >= 0) |
133 | fdf9b3e8 | bellard | dest = 0;
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134 | fdf9b3e8 | bellard | else
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135 | fdf9b3e8 | bellard | dest = 1;
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136 | 6f06939b | aurel32 | if ((int32_t) arg0 >= 0) |
137 | fdf9b3e8 | bellard | src = 0;
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138 | fdf9b3e8 | bellard | else
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139 | fdf9b3e8 | bellard | src = 1;
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140 | fdf9b3e8 | bellard | src += dest; |
141 | 6f06939b | aurel32 | arg1 += arg0; |
142 | 6f06939b | aurel32 | if ((int32_t) arg1 >= 0) |
143 | fdf9b3e8 | bellard | ans = 0;
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144 | fdf9b3e8 | bellard | else
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145 | fdf9b3e8 | bellard | ans = 1;
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146 | fdf9b3e8 | bellard | ans += dest; |
147 | fdf9b3e8 | bellard | if (src == 0 || src == 2) { |
148 | fdf9b3e8 | bellard | if (ans == 1) |
149 | fdf9b3e8 | bellard | env->sr |= SR_T; |
150 | fdf9b3e8 | bellard | else
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151 | fdf9b3e8 | bellard | env->sr &= ~SR_T; |
152 | fdf9b3e8 | bellard | } else
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153 | fdf9b3e8 | bellard | env->sr &= ~SR_T; |
154 | 6f06939b | aurel32 | return arg1;
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155 | fdf9b3e8 | bellard | } |
156 | fdf9b3e8 | bellard | |
157 | fdf9b3e8 | bellard | #define T (env->sr & SR_T)
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158 | fdf9b3e8 | bellard | #define Q (env->sr & SR_Q ? 1 : 0) |
159 | fdf9b3e8 | bellard | #define M (env->sr & SR_M ? 1 : 0) |
160 | fdf9b3e8 | bellard | #define SETT env->sr |= SR_T
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161 | fdf9b3e8 | bellard | #define CLRT env->sr &= ~SR_T
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162 | fdf9b3e8 | bellard | #define SETQ env->sr |= SR_Q
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163 | fdf9b3e8 | bellard | #define CLRQ env->sr &= ~SR_Q
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164 | fdf9b3e8 | bellard | #define SETM env->sr |= SR_M
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165 | fdf9b3e8 | bellard | #define CLRM env->sr &= ~SR_M
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166 | fdf9b3e8 | bellard | |
167 | 69d6275b | aurel32 | uint32_t helper_div1(uint32_t arg0, uint32_t arg1) |
168 | fdf9b3e8 | bellard | { |
169 | fdf9b3e8 | bellard | uint32_t tmp0, tmp2; |
170 | fdf9b3e8 | bellard | uint8_t old_q, tmp1 = 0xff;
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171 | fdf9b3e8 | bellard | |
172 | 69d6275b | aurel32 | //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
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173 | fdf9b3e8 | bellard | old_q = Q; |
174 | 69d6275b | aurel32 | if ((0x80000000 & arg1) != 0) |
175 | fdf9b3e8 | bellard | SETQ; |
176 | fdf9b3e8 | bellard | else
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177 | fdf9b3e8 | bellard | CLRQ; |
178 | 69d6275b | aurel32 | tmp2 = arg0; |
179 | 69d6275b | aurel32 | arg1 <<= 1;
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180 | 69d6275b | aurel32 | arg1 |= T; |
181 | fdf9b3e8 | bellard | switch (old_q) {
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182 | fdf9b3e8 | bellard | case 0: |
183 | fdf9b3e8 | bellard | switch (M) {
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184 | fdf9b3e8 | bellard | case 0: |
185 | 69d6275b | aurel32 | tmp0 = arg1; |
186 | 69d6275b | aurel32 | arg1 -= tmp2; |
187 | 69d6275b | aurel32 | tmp1 = arg1 > tmp0; |
188 | fdf9b3e8 | bellard | switch (Q) {
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189 | fdf9b3e8 | bellard | case 0: |
190 | fdf9b3e8 | bellard | if (tmp1)
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191 | fdf9b3e8 | bellard | SETQ; |
192 | fdf9b3e8 | bellard | else
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193 | fdf9b3e8 | bellard | CLRQ; |
194 | fdf9b3e8 | bellard | break;
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195 | fdf9b3e8 | bellard | case 1: |
196 | fdf9b3e8 | bellard | if (tmp1 == 0) |
197 | fdf9b3e8 | bellard | SETQ; |
198 | fdf9b3e8 | bellard | else
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199 | fdf9b3e8 | bellard | CLRQ; |
200 | fdf9b3e8 | bellard | break;
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201 | fdf9b3e8 | bellard | } |
202 | fdf9b3e8 | bellard | break;
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203 | fdf9b3e8 | bellard | case 1: |
204 | 69d6275b | aurel32 | tmp0 = arg1; |
205 | 69d6275b | aurel32 | arg1 += tmp2; |
206 | 69d6275b | aurel32 | tmp1 = arg1 < tmp0; |
207 | fdf9b3e8 | bellard | switch (Q) {
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208 | fdf9b3e8 | bellard | case 0: |
209 | fdf9b3e8 | bellard | if (tmp1 == 0) |
210 | fdf9b3e8 | bellard | SETQ; |
211 | fdf9b3e8 | bellard | else
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212 | fdf9b3e8 | bellard | CLRQ; |
213 | fdf9b3e8 | bellard | break;
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214 | fdf9b3e8 | bellard | case 1: |
215 | fdf9b3e8 | bellard | if (tmp1)
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216 | fdf9b3e8 | bellard | SETQ; |
217 | fdf9b3e8 | bellard | else
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218 | fdf9b3e8 | bellard | CLRQ; |
219 | fdf9b3e8 | bellard | break;
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220 | fdf9b3e8 | bellard | } |
221 | fdf9b3e8 | bellard | break;
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222 | fdf9b3e8 | bellard | } |
223 | fdf9b3e8 | bellard | break;
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224 | fdf9b3e8 | bellard | case 1: |
225 | fdf9b3e8 | bellard | switch (M) {
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226 | fdf9b3e8 | bellard | case 0: |
227 | 69d6275b | aurel32 | tmp0 = arg1; |
228 | 69d6275b | aurel32 | arg1 += tmp2; |
229 | 69d6275b | aurel32 | tmp1 = arg1 < tmp0; |
230 | fdf9b3e8 | bellard | switch (Q) {
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231 | fdf9b3e8 | bellard | case 0: |
232 | fdf9b3e8 | bellard | if (tmp1)
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233 | fdf9b3e8 | bellard | SETQ; |
234 | fdf9b3e8 | bellard | else
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235 | fdf9b3e8 | bellard | CLRQ; |
236 | fdf9b3e8 | bellard | break;
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237 | fdf9b3e8 | bellard | case 1: |
238 | fdf9b3e8 | bellard | if (tmp1 == 0) |
239 | fdf9b3e8 | bellard | SETQ; |
240 | fdf9b3e8 | bellard | else
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241 | fdf9b3e8 | bellard | CLRQ; |
242 | fdf9b3e8 | bellard | break;
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243 | fdf9b3e8 | bellard | } |
244 | fdf9b3e8 | bellard | break;
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245 | fdf9b3e8 | bellard | case 1: |
246 | 69d6275b | aurel32 | tmp0 = arg1; |
247 | 69d6275b | aurel32 | arg1 -= tmp2; |
248 | 69d6275b | aurel32 | tmp1 = arg1 > tmp0; |
249 | fdf9b3e8 | bellard | switch (Q) {
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250 | fdf9b3e8 | bellard | case 0: |
251 | fdf9b3e8 | bellard | if (tmp1 == 0) |
252 | fdf9b3e8 | bellard | SETQ; |
253 | fdf9b3e8 | bellard | else
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254 | fdf9b3e8 | bellard | CLRQ; |
255 | fdf9b3e8 | bellard | break;
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256 | fdf9b3e8 | bellard | case 1: |
257 | fdf9b3e8 | bellard | if (tmp1)
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258 | fdf9b3e8 | bellard | SETQ; |
259 | fdf9b3e8 | bellard | else
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260 | fdf9b3e8 | bellard | CLRQ; |
261 | fdf9b3e8 | bellard | break;
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262 | fdf9b3e8 | bellard | } |
263 | fdf9b3e8 | bellard | break;
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264 | fdf9b3e8 | bellard | } |
265 | fdf9b3e8 | bellard | break;
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266 | fdf9b3e8 | bellard | } |
267 | fdf9b3e8 | bellard | if (Q == M)
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268 | fdf9b3e8 | bellard | SETT; |
269 | fdf9b3e8 | bellard | else
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270 | fdf9b3e8 | bellard | CLRT; |
271 | 69d6275b | aurel32 | //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
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272 | 69d6275b | aurel32 | return arg1;
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273 | fdf9b3e8 | bellard | } |
274 | fdf9b3e8 | bellard | |
275 | 6f06939b | aurel32 | void helper_macl(uint32_t arg0, uint32_t arg1)
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276 | fdf9b3e8 | bellard | { |
277 | fdf9b3e8 | bellard | int64_t res; |
278 | fdf9b3e8 | bellard | |
279 | fdf9b3e8 | bellard | res = ((uint64_t) env->mach << 32) | env->macl;
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280 | 6f06939b | aurel32 | res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1; |
281 | fdf9b3e8 | bellard | env->mach = (res >> 32) & 0xffffffff; |
282 | fdf9b3e8 | bellard | env->macl = res & 0xffffffff;
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283 | fdf9b3e8 | bellard | if (env->sr & SR_S) {
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284 | fdf9b3e8 | bellard | if (res < 0) |
285 | fdf9b3e8 | bellard | env->mach |= 0xffff0000;
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286 | fdf9b3e8 | bellard | else
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287 | fdf9b3e8 | bellard | env->mach &= 0x00007fff;
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288 | fdf9b3e8 | bellard | } |
289 | fdf9b3e8 | bellard | } |
290 | fdf9b3e8 | bellard | |
291 | 6f06939b | aurel32 | void helper_macw(uint32_t arg0, uint32_t arg1)
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292 | fdf9b3e8 | bellard | { |
293 | fdf9b3e8 | bellard | int64_t res; |
294 | fdf9b3e8 | bellard | |
295 | fdf9b3e8 | bellard | res = ((uint64_t) env->mach << 32) | env->macl;
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296 | 6f06939b | aurel32 | res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1; |
297 | fdf9b3e8 | bellard | env->mach = (res >> 32) & 0xffffffff; |
298 | fdf9b3e8 | bellard | env->macl = res & 0xffffffff;
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299 | fdf9b3e8 | bellard | if (env->sr & SR_S) {
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300 | fdf9b3e8 | bellard | if (res < -0x80000000) { |
301 | fdf9b3e8 | bellard | env->mach = 1;
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302 | fdf9b3e8 | bellard | env->macl = 0x80000000;
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303 | fdf9b3e8 | bellard | } else if (res > 0x000000007fffffff) { |
304 | fdf9b3e8 | bellard | env->mach = 1;
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305 | fdf9b3e8 | bellard | env->macl = 0x7fffffff;
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306 | fdf9b3e8 | bellard | } |
307 | fdf9b3e8 | bellard | } |
308 | fdf9b3e8 | bellard | } |
309 | fdf9b3e8 | bellard | |
310 | 6f06939b | aurel32 | uint32_t helper_negc(uint32_t arg) |
311 | fdf9b3e8 | bellard | { |
312 | fdf9b3e8 | bellard | uint32_t temp; |
313 | fdf9b3e8 | bellard | |
314 | 6f06939b | aurel32 | temp = -arg; |
315 | 6f06939b | aurel32 | arg = temp - (env->sr & SR_T); |
316 | fdf9b3e8 | bellard | if (0 < temp) |
317 | fdf9b3e8 | bellard | env->sr |= SR_T; |
318 | fdf9b3e8 | bellard | else
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319 | fdf9b3e8 | bellard | env->sr &= ~SR_T; |
320 | 6f06939b | aurel32 | if (temp < arg)
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321 | fdf9b3e8 | bellard | env->sr |= SR_T; |
322 | 6f06939b | aurel32 | return arg;
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323 | fdf9b3e8 | bellard | } |
324 | fdf9b3e8 | bellard | |
325 | 6f06939b | aurel32 | uint32_t helper_subc(uint32_t arg0, uint32_t arg1) |
326 | fdf9b3e8 | bellard | { |
327 | fdf9b3e8 | bellard | uint32_t tmp0, tmp1; |
328 | fdf9b3e8 | bellard | |
329 | 6f06939b | aurel32 | tmp1 = arg1 - arg0; |
330 | 6f06939b | aurel32 | tmp0 = arg1; |
331 | 6f06939b | aurel32 | arg1 = tmp1 - (env->sr & SR_T); |
332 | fdf9b3e8 | bellard | if (tmp0 < tmp1)
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333 | fdf9b3e8 | bellard | env->sr |= SR_T; |
334 | fdf9b3e8 | bellard | else
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335 | fdf9b3e8 | bellard | env->sr &= ~SR_T; |
336 | 6f06939b | aurel32 | if (tmp1 < arg1)
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337 | fdf9b3e8 | bellard | env->sr |= SR_T; |
338 | 6f06939b | aurel32 | return arg1;
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339 | fdf9b3e8 | bellard | } |
340 | fdf9b3e8 | bellard | |
341 | 6f06939b | aurel32 | uint32_t helper_subv(uint32_t arg0, uint32_t arg1) |
342 | fdf9b3e8 | bellard | { |
343 | fdf9b3e8 | bellard | int32_t dest, src, ans; |
344 | fdf9b3e8 | bellard | |
345 | 6f06939b | aurel32 | if ((int32_t) arg1 >= 0) |
346 | fdf9b3e8 | bellard | dest = 0;
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347 | fdf9b3e8 | bellard | else
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348 | fdf9b3e8 | bellard | dest = 1;
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349 | 6f06939b | aurel32 | if ((int32_t) arg0 >= 0) |
350 | fdf9b3e8 | bellard | src = 0;
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351 | fdf9b3e8 | bellard | else
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352 | fdf9b3e8 | bellard | src = 1;
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353 | fdf9b3e8 | bellard | src += dest; |
354 | 6f06939b | aurel32 | arg1 -= arg0; |
355 | 6f06939b | aurel32 | if ((int32_t) arg1 >= 0) |
356 | fdf9b3e8 | bellard | ans = 0;
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357 | fdf9b3e8 | bellard | else
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358 | fdf9b3e8 | bellard | ans = 1;
|
359 | fdf9b3e8 | bellard | ans += dest; |
360 | fdf9b3e8 | bellard | if (src == 1) { |
361 | fdf9b3e8 | bellard | if (ans == 1) |
362 | fdf9b3e8 | bellard | env->sr |= SR_T; |
363 | fdf9b3e8 | bellard | else
|
364 | fdf9b3e8 | bellard | env->sr &= ~SR_T; |
365 | fdf9b3e8 | bellard | } else
|
366 | fdf9b3e8 | bellard | env->sr &= ~SR_T; |
367 | 6f06939b | aurel32 | return arg1;
|
368 | fdf9b3e8 | bellard | } |
369 | fdf9b3e8 | bellard | |
370 | cc4ba6a9 | aurel32 | static inline void set_t(void) |
371 | cc4ba6a9 | aurel32 | { |
372 | cc4ba6a9 | aurel32 | env->sr |= SR_T; |
373 | cc4ba6a9 | aurel32 | } |
374 | cc4ba6a9 | aurel32 | |
375 | cc4ba6a9 | aurel32 | static inline void clr_t(void) |
376 | cc4ba6a9 | aurel32 | { |
377 | cc4ba6a9 | aurel32 | env->sr &= ~SR_T; |
378 | cc4ba6a9 | aurel32 | } |
379 | cc4ba6a9 | aurel32 | |
380 | 390af821 | aurel32 | void helper_ld_fpscr(uint32_t val)
|
381 | 390af821 | aurel32 | { |
382 | 390af821 | aurel32 | env->fpscr = val & 0x003fffff;
|
383 | 390af821 | aurel32 | if (val & 0x01) |
384 | 390af821 | aurel32 | set_float_rounding_mode(float_round_to_zero, &env->fp_status); |
385 | 390af821 | aurel32 | else
|
386 | 390af821 | aurel32 | set_float_rounding_mode(float_round_nearest_even, &env->fp_status); |
387 | 390af821 | aurel32 | } |
388 | cc4ba6a9 | aurel32 | |
389 | cc4ba6a9 | aurel32 | uint32_t helper_fabs_FT(uint32_t t0) |
390 | cc4ba6a9 | aurel32 | { |
391 | cc4ba6a9 | aurel32 | float32 ret = float32_abs(*(float32*)&t0); |
392 | cc4ba6a9 | aurel32 | return *(uint32_t*)(&ret);
|
393 | cc4ba6a9 | aurel32 | } |
394 | cc4ba6a9 | aurel32 | |
395 | cc4ba6a9 | aurel32 | uint64_t helper_fabs_DT(uint64_t t0) |
396 | cc4ba6a9 | aurel32 | { |
397 | cc4ba6a9 | aurel32 | float64 ret = float64_abs(*(float64*)&t0); |
398 | cc4ba6a9 | aurel32 | return *(uint64_t*)(&ret);
|
399 | cc4ba6a9 | aurel32 | } |
400 | cc4ba6a9 | aurel32 | |
401 | cc4ba6a9 | aurel32 | uint32_t helper_fadd_FT(uint32_t t0, uint32_t t1) |
402 | cc4ba6a9 | aurel32 | { |
403 | cc4ba6a9 | aurel32 | float32 ret = float32_add(*(float32*)&t0, *(float32*)&t1, &env->fp_status); |
404 | cc4ba6a9 | aurel32 | return *(uint32_t*)(&ret);
|
405 | cc4ba6a9 | aurel32 | } |
406 | cc4ba6a9 | aurel32 | |
407 | cc4ba6a9 | aurel32 | uint64_t helper_fadd_DT(uint64_t t0, uint64_t t1) |
408 | cc4ba6a9 | aurel32 | { |
409 | cc4ba6a9 | aurel32 | float64 ret = float64_add(*(float64*)&t0, *(float64*)&t1, &env->fp_status); |
410 | cc4ba6a9 | aurel32 | return *(uint64_t*)(&ret);
|
411 | cc4ba6a9 | aurel32 | } |
412 | cc4ba6a9 | aurel32 | |
413 | cc4ba6a9 | aurel32 | void helper_fcmp_eq_FT(uint32_t t0, uint32_t t1)
|
414 | cc4ba6a9 | aurel32 | { |
415 | cc4ba6a9 | aurel32 | if (float32_compare(*(float32*)&t0, *(float32*)&t1, &env->fp_status) == 0) |
416 | cc4ba6a9 | aurel32 | set_t(); |
417 | cc4ba6a9 | aurel32 | else
|
418 | cc4ba6a9 | aurel32 | clr_t(); |
419 | cc4ba6a9 | aurel32 | } |
420 | cc4ba6a9 | aurel32 | |
421 | cc4ba6a9 | aurel32 | void helper_fcmp_eq_DT(uint64_t t0, uint64_t t1)
|
422 | cc4ba6a9 | aurel32 | { |
423 | cc4ba6a9 | aurel32 | if (float64_compare(*(float64*)&t0, *(float64*)&t1, &env->fp_status) == 0) |
424 | cc4ba6a9 | aurel32 | set_t(); |
425 | cc4ba6a9 | aurel32 | else
|
426 | cc4ba6a9 | aurel32 | clr_t(); |
427 | cc4ba6a9 | aurel32 | } |
428 | cc4ba6a9 | aurel32 | |
429 | cc4ba6a9 | aurel32 | void helper_fcmp_gt_FT(uint32_t t0, uint32_t t1)
|
430 | cc4ba6a9 | aurel32 | { |
431 | cc4ba6a9 | aurel32 | if (float32_compare(*(float32*)&t0, *(float32*)&t1, &env->fp_status) == 1) |
432 | cc4ba6a9 | aurel32 | set_t(); |
433 | cc4ba6a9 | aurel32 | else
|
434 | cc4ba6a9 | aurel32 | clr_t(); |
435 | cc4ba6a9 | aurel32 | } |
436 | cc4ba6a9 | aurel32 | |
437 | cc4ba6a9 | aurel32 | void helper_fcmp_gt_DT(uint64_t t0, uint64_t t1)
|
438 | cc4ba6a9 | aurel32 | { |
439 | cc4ba6a9 | aurel32 | if (float64_compare(*(float64*)&t0, *(float64*)&t1, &env->fp_status) == 1) |
440 | cc4ba6a9 | aurel32 | set_t(); |
441 | cc4ba6a9 | aurel32 | else
|
442 | cc4ba6a9 | aurel32 | clr_t(); |
443 | cc4ba6a9 | aurel32 | } |
444 | cc4ba6a9 | aurel32 | |
445 | cc4ba6a9 | aurel32 | uint64_t helper_fcnvsd_FT_DT(uint32_t t0) |
446 | cc4ba6a9 | aurel32 | { |
447 | cc4ba6a9 | aurel32 | float64 ret = float32_to_float64(*(float32*)&t0, &env->fp_status); |
448 | cc4ba6a9 | aurel32 | return *(uint64_t*)(&ret);
|
449 | cc4ba6a9 | aurel32 | } |
450 | cc4ba6a9 | aurel32 | |
451 | cc4ba6a9 | aurel32 | uint32_t helper_fcnvds_DT_FT(uint64_t t0) |
452 | cc4ba6a9 | aurel32 | { |
453 | cc4ba6a9 | aurel32 | float32 ret = float64_to_float32(*(float64*)&t0, &env->fp_status); |
454 | cc4ba6a9 | aurel32 | return *(uint32_t*)(&ret);
|
455 | cc4ba6a9 | aurel32 | } |
456 | cc4ba6a9 | aurel32 | |
457 | cc4ba6a9 | aurel32 | uint32_t helper_fdiv_FT(uint32_t t0, uint32_t t1) |
458 | cc4ba6a9 | aurel32 | { |
459 | cc4ba6a9 | aurel32 | float32 ret = float32_div(*(float32*)&t0, *(float32*)&t1, &env->fp_status); |
460 | cc4ba6a9 | aurel32 | return *(uint32_t*)(&ret);
|
461 | cc4ba6a9 | aurel32 | } |
462 | cc4ba6a9 | aurel32 | |
463 | cc4ba6a9 | aurel32 | uint64_t helper_fdiv_DT(uint64_t t0, uint64_t t1) |
464 | cc4ba6a9 | aurel32 | { |
465 | cc4ba6a9 | aurel32 | float64 ret = float64_div(*(float64*)&t0, *(float64*)&t1, &env->fp_status); |
466 | cc4ba6a9 | aurel32 | return *(uint64_t*)(&ret);
|
467 | cc4ba6a9 | aurel32 | } |
468 | cc4ba6a9 | aurel32 | |
469 | cc4ba6a9 | aurel32 | uint32_t helper_float_FT(uint32_t t0) |
470 | cc4ba6a9 | aurel32 | { |
471 | cc4ba6a9 | aurel32 | float32 ret = int32_to_float32(t0, &env->fp_status); |
472 | cc4ba6a9 | aurel32 | return *(uint32_t*)(&ret);
|
473 | cc4ba6a9 | aurel32 | } |
474 | cc4ba6a9 | aurel32 | |
475 | cc4ba6a9 | aurel32 | uint64_t helper_float_DT(uint32_t t0) |
476 | cc4ba6a9 | aurel32 | { |
477 | cc4ba6a9 | aurel32 | float64 ret = int32_to_float64(t0, &env->fp_status); |
478 | cc4ba6a9 | aurel32 | return *(uint64_t*)(&ret);
|
479 | cc4ba6a9 | aurel32 | } |
480 | cc4ba6a9 | aurel32 | |
481 | cc4ba6a9 | aurel32 | uint32_t helper_fmul_FT(uint32_t t0, uint32_t t1) |
482 | cc4ba6a9 | aurel32 | { |
483 | cc4ba6a9 | aurel32 | float32 ret = float32_mul(*(float32*)&t0, *(float32*)&t1, &env->fp_status); |
484 | cc4ba6a9 | aurel32 | return *(uint32_t*)(&ret);
|
485 | cc4ba6a9 | aurel32 | } |
486 | cc4ba6a9 | aurel32 | |
487 | cc4ba6a9 | aurel32 | uint64_t helper_fmul_DT(uint64_t t0, uint64_t t1) |
488 | cc4ba6a9 | aurel32 | { |
489 | cc4ba6a9 | aurel32 | float64 ret = float64_mul(*(float64*)&t0, *(float64*)&t1, &env->fp_status); |
490 | cc4ba6a9 | aurel32 | return *(uint64_t*)(&ret);
|
491 | cc4ba6a9 | aurel32 | } |
492 | cc4ba6a9 | aurel32 | |
493 | 7fdf924f | aurel32 | uint32_t helper_fneg_T(uint32_t t0) |
494 | 7fdf924f | aurel32 | { |
495 | 7fdf924f | aurel32 | float32 ret = float32_chs(*(float32*)&t0); |
496 | 7fdf924f | aurel32 | return *(uint32_t*)(&ret);
|
497 | 7fdf924f | aurel32 | } |
498 | 7fdf924f | aurel32 | |
499 | cc4ba6a9 | aurel32 | uint32_t helper_fsqrt_FT(uint32_t t0) |
500 | cc4ba6a9 | aurel32 | { |
501 | cc4ba6a9 | aurel32 | float32 ret = float32_sqrt(*(float32*)&t0, &env->fp_status); |
502 | cc4ba6a9 | aurel32 | return *(uint32_t*)(&ret);
|
503 | cc4ba6a9 | aurel32 | } |
504 | cc4ba6a9 | aurel32 | |
505 | cc4ba6a9 | aurel32 | uint64_t helper_fsqrt_DT(uint64_t t0) |
506 | cc4ba6a9 | aurel32 | { |
507 | cc4ba6a9 | aurel32 | float64 ret = float64_sqrt(*(float64*)&t0, &env->fp_status); |
508 | cc4ba6a9 | aurel32 | return *(uint64_t*)(&ret);
|
509 | cc4ba6a9 | aurel32 | } |
510 | cc4ba6a9 | aurel32 | |
511 | cc4ba6a9 | aurel32 | uint32_t helper_fsub_FT(uint32_t t0, uint32_t t1) |
512 | cc4ba6a9 | aurel32 | { |
513 | cc4ba6a9 | aurel32 | float32 ret = float32_sub(*(float32*)&t0, *(float32*)&t1, &env->fp_status); |
514 | cc4ba6a9 | aurel32 | return *(uint32_t*)(&ret);
|
515 | cc4ba6a9 | aurel32 | } |
516 | cc4ba6a9 | aurel32 | |
517 | cc4ba6a9 | aurel32 | uint64_t helper_fsub_DT(uint64_t t0, uint64_t t1) |
518 | cc4ba6a9 | aurel32 | { |
519 | cc4ba6a9 | aurel32 | float64 ret = float64_sub(*(float64*)&t0, *(float64*)&t1, &env->fp_status); |
520 | cc4ba6a9 | aurel32 | return *(uint64_t*)(&ret);
|
521 | cc4ba6a9 | aurel32 | } |
522 | cc4ba6a9 | aurel32 | |
523 | cc4ba6a9 | aurel32 | uint32_t helper_ftrc_FT(uint32_t t0) |
524 | cc4ba6a9 | aurel32 | { |
525 | cc4ba6a9 | aurel32 | return float32_to_int32_round_to_zero(*(float32*)&t0, &env->fp_status);
|
526 | cc4ba6a9 | aurel32 | } |
527 | cc4ba6a9 | aurel32 | |
528 | cc4ba6a9 | aurel32 | uint32_t helper_ftrc_DT(uint64_t t0) |
529 | cc4ba6a9 | aurel32 | { |
530 | cc4ba6a9 | aurel32 | return float64_to_int32_round_to_zero(*(float64*)&t0, &env->fp_status);
|
531 | cc4ba6a9 | aurel32 | } |