Revision f41c52f1 target-mips/op.c
| b/target-mips/op.c | ||
|---|---|---|
| 1360 | 1360 |
no 64bit addressing implemented. */ |
| 1361 | 1361 |
val = (int32_t)T0 & 0xF878FF17; |
| 1362 | 1362 |
old = env->CP0_Status; |
| 1363 |
if (!(val & (1 << CP0St_EXL)) && |
|
| 1364 |
!(val & (1 << CP0St_ERL)) && |
|
| 1365 |
!(env->hflags & MIPS_HFLAG_DM) && |
|
| 1366 |
(val & (1 << CP0St_UM))) |
|
| 1367 |
env->hflags |= MIPS_HFLAG_UM; |
|
| 1363 | 1368 |
env->CP0_Status = val; |
| 1364 |
if (loglevel & CPU_LOG_TB_IN_ASM)
|
|
| 1365 |
CALL_FROM_TB2(do_mtc0_status_debug, old, val); |
|
| 1369 |
if (loglevel & CPU_LOG_EXEC)
|
|
| 1370 |
CALL_FROM_TB2(do_mtc0_status_debug, old, val);
|
|
| 1366 | 1371 |
CALL_FROM_TB1(cpu_mips_update_irq, env); |
| 1367 | 1372 |
RETURN(); |
| 1368 | 1373 |
} |
| ... | ... | |
| 2077 | 2082 |
RETURN(); |
| 2078 | 2083 |
} |
| 2079 | 2084 |
|
| 2080 |
void debug_eret (void); |
|
| 2085 |
void debug_pre_eret (void); |
|
| 2086 |
void debug_post_eret (void); |
|
| 2081 | 2087 |
void op_eret (void) |
| 2082 | 2088 |
{
|
| 2083 |
CALL_FROM_TB0(debug_eret); |
|
| 2089 |
if (loglevel & CPU_LOG_EXEC) |
|
| 2090 |
CALL_FROM_TB0(debug_pre_eret); |
|
| 2084 | 2091 |
if (env->CP0_Status & (1 << CP0St_ERL)) {
|
| 2085 | 2092 |
env->PC = env->CP0_ErrorEPC; |
| 2086 | 2093 |
env->CP0_Status &= ~(1 << CP0St_ERL); |
| ... | ... | |
| 2093 | 2100 |
!(env->hflags & MIPS_HFLAG_DM) && |
| 2094 | 2101 |
(env->CP0_Status & (1 << CP0St_UM))) |
| 2095 | 2102 |
env->hflags |= MIPS_HFLAG_UM; |
| 2103 |
if (loglevel & CPU_LOG_EXEC) |
|
| 2104 |
CALL_FROM_TB0(debug_post_eret); |
|
| 2096 | 2105 |
env->CP0_LLAddr = 1; |
| 2097 | 2106 |
RETURN(); |
| 2098 | 2107 |
} |
| 2099 | 2108 |
|
| 2100 | 2109 |
void op_deret (void) |
| 2101 | 2110 |
{
|
| 2102 |
CALL_FROM_TB0(debug_eret); |
|
| 2111 |
if (loglevel & CPU_LOG_EXEC) |
|
| 2112 |
CALL_FROM_TB0(debug_pre_eret); |
|
| 2103 | 2113 |
env->PC = env->CP0_DEPC; |
| 2104 | 2114 |
env->hflags |= MIPS_HFLAG_DM; |
| 2105 | 2115 |
if (!(env->CP0_Status & (1 << CP0St_EXL)) && |
| ... | ... | |
| 2107 | 2117 |
!(env->hflags & MIPS_HFLAG_DM) && |
| 2108 | 2118 |
(env->CP0_Status & (1 << CP0St_UM))) |
| 2109 | 2119 |
env->hflags |= MIPS_HFLAG_UM; |
| 2120 |
if (loglevel & CPU_LOG_EXEC) |
|
| 2121 |
CALL_FROM_TB0(debug_post_eret); |
|
| 2110 | 2122 |
env->CP0_LLAddr = 1; |
| 2111 | 2123 |
RETURN(); |
| 2112 | 2124 |
} |
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