Revision f451387a hw/omap2.c
| b/hw/omap2.c | ||
|---|---|---|
| 3528 | 3528 |
uint32_t msuspendmux[5]; |
| 3529 | 3529 |
}; |
| 3530 | 3530 |
|
| 3531 |
static uint32_t omap_sysctl_read8(void *opaque, target_phys_addr_t addr) |
|
| 3532 |
{
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| 3533 |
|
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| 3534 |
struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque; |
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| 3535 |
int offset = addr - s->base; |
|
| 3536 |
int pad_offset, byte_offset; |
|
| 3537 |
int value; |
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| 3538 |
|
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| 3539 |
switch (offset) {
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| 3540 |
case 0x030 ... 0x140: /* CONTROL_PADCONF - only used in the POP */ |
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| 3541 |
pad_offset = (offset - 0x30) >> 2; |
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| 3542 |
byte_offset = (offset - 0x30) & (4 - 1); |
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| 3543 |
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| 3544 |
value = s->padconf[pad_offset]; |
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| 3545 |
value = (value >> (byte_offset * 8)) & 0xff; |
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| 3546 |
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| 3547 |
return value; |
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| 3548 |
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| 3549 |
default: |
|
| 3550 |
break; |
|
| 3551 |
} |
|
| 3552 |
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| 3553 |
OMAP_BAD_REG(addr); |
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| 3554 |
return 0; |
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| 3555 |
} |
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| 3556 |
|
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| 3531 | 3557 |
static uint32_t omap_sysctl_read(void *opaque, target_phys_addr_t addr) |
| 3532 | 3558 |
{
|
| 3533 | 3559 |
struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque; |
| ... | ... | |
| 3629 | 3655 |
return 0; |
| 3630 | 3656 |
} |
| 3631 | 3657 |
|
| 3658 |
static void omap_sysctl_write8(void *opaque, target_phys_addr_t addr, |
|
| 3659 |
uint32_t value) |
|
| 3660 |
{
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| 3661 |
struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque; |
|
| 3662 |
int offset = addr - s->base; |
|
| 3663 |
int pad_offset, byte_offset; |
|
| 3664 |
int prev_value; |
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| 3665 |
|
|
| 3666 |
switch (offset) {
|
|
| 3667 |
case 0x030 ... 0x140: /* CONTROL_PADCONF - only used in the POP */ |
|
| 3668 |
pad_offset = (offset - 0x30) >> 2; |
|
| 3669 |
byte_offset = (offset - 0x30) & (4 - 1); |
|
| 3670 |
|
|
| 3671 |
prev_value = s->padconf[pad_offset]; |
|
| 3672 |
prev_value &= ~(0xff << (byte_offset * 8)); |
|
| 3673 |
prev_value |= ((value & 0x1f1f1f1f) << (byte_offset * 8)) & 0x1f1f1f1f; |
|
| 3674 |
s->padconf[pad_offset] = prev_value; |
|
| 3675 |
break; |
|
| 3676 |
|
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| 3677 |
default: |
|
| 3678 |
OMAP_BAD_REG(addr); |
|
| 3679 |
break; |
|
| 3680 |
} |
|
| 3681 |
} |
|
| 3682 |
|
|
| 3632 | 3683 |
static void omap_sysctl_write(void *opaque, target_phys_addr_t addr, |
| 3633 | 3684 |
uint32_t value) |
| 3634 | 3685 |
{
|
| ... | ... | |
| 3726 | 3777 |
} |
| 3727 | 3778 |
|
| 3728 | 3779 |
static CPUReadMemoryFunc *omap_sysctl_readfn[] = {
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| 3729 |
omap_badwidth_read32, /* TODO */
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|
| 3780 |
omap_sysctl_read8,
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|
| 3730 | 3781 |
omap_badwidth_read32, /* TODO */ |
| 3731 | 3782 |
omap_sysctl_read, |
| 3732 | 3783 |
}; |
| 3733 | 3784 |
|
| 3734 | 3785 |
static CPUWriteMemoryFunc *omap_sysctl_writefn[] = {
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| 3735 |
omap_badwidth_write32, /* TODO */
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|
| 3786 |
omap_sysctl_write8,
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| 3736 | 3787 |
omap_badwidth_write32, /* TODO */ |
| 3737 | 3788 |
omap_sysctl_write, |
| 3738 | 3789 |
}; |
| ... | ... | |
| 4139 | 4190 |
cs = (offset - 0x060) / 0x30; |
| 4140 | 4191 |
offset -= cs * 0x30; |
| 4141 | 4192 |
f = s->cs_file + cs; |
| 4142 |
switch (offset - cs * 0x30) {
|
|
| 4193 |
switch (offset) {
|
|
| 4143 | 4194 |
case 0x60: /* GPMC_CONFIG1 */ |
| 4144 | 4195 |
return f->config[0]; |
| 4145 | 4196 |
case 0x64: /* GPMC_CONFIG2 */ |
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