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/*

 * QEMU USB EHCI Emulation

 *

 * Copyright(c) 2008  Emutex Ltd. (address@hidden)

 * Copyright(c) 2011-2012 Red Hat, Inc.

 *

 * Red Hat Authors:

 * Gerd Hoffmann <kraxel@redhat.com>

 * Hans de Goede <hdegoede@redhat.com>

 *

 * EHCI project was started by Mark Burkley, with contributions by

 * Niels de Vos.  David S. Ahern continued working on it.  Kevin Wolf,

 * Jan Kiszka and Vincent Palatin contributed bugfixes.

 *

 *

 * This library is free software; you can redistribute it and/or

 * modify it under the terms of the GNU Lesser General Public

 * License as published by the Free Software Foundation; either

 * version 2 of the License, or(at your option) any later version.

 *

 * This library is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU

 * Lesser General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, see <http://www.gnu.org/licenses/>.

 */

#include "hw/usb/hcd-ehci.h"

/* Capability Registers Base Address - section 2.2 */

#define CAPLENGTH        0x0000  /* 1-byte, 0x0001 reserved */

#define HCIVERSION       0x0002  /* 2-bytes, i/f version # */

#define HCSPARAMS        0x0004  /* 4-bytes, structural params */

#define HCCPARAMS        0x0008  /* 4-bytes, capability params */

#define EECP             HCCPARAMS + 1

#define HCSPPORTROUTE1   0x000c

#define HCSPPORTROUTE2   0x0010

#define USBCMD           0x0000

#define USBCMD_RUNSTOP   (1 << 0)      // run / Stop

#define USBCMD_HCRESET   (1 << 1)      // HC Reset

#define USBCMD_FLS       (3 << 2)      // Frame List Size

#define USBCMD_FLS_SH    2             // Frame List Size Shift

#define USBCMD_PSE       (1 << 4)      // Periodic Schedule Enable

#define USBCMD_ASE       (1 << 5)      // Asynch Schedule Enable

#define USBCMD_IAAD      (1 << 6)      // Int Asynch Advance Doorbell

#define USBCMD_LHCR      (1 << 7)      // Light Host Controller Reset

#define USBCMD_ASPMC     (3 << 8)      // Async Sched Park Mode Count

#define USBCMD_ASPME     (1 << 11)     // Async Sched Park Mode Enable

#define USBCMD_ITC       (0x7f << 16)  // Int Threshold Control

#define USBCMD_ITC_SH    16            // Int Threshold Control Shift

#define USBSTS           0x0004

#define USBSTS_RO_MASK   0x0000003f

#define USBSTS_INT       (1 << 0)      // USB Interrupt

#define USBSTS_ERRINT    (1 << 1)      // Error Interrupt

#define USBSTS_PCD       (1 << 2)      // Port Change Detect

#define USBSTS_FLR       (1 << 3)      // Frame List Rollover

#define USBSTS_HSE       (1 << 4)      // Host System Error

#define USBSTS_IAA       (1 << 5)      // Interrupt on Async Advance

#define USBSTS_HALT      (1 << 12)     // HC Halted

#define USBSTS_REC       (1 << 13)     // Reclamation

#define USBSTS_PSS       (1 << 14)     // Periodic Schedule Status

#define USBSTS_ASS       (1 << 15)     // Asynchronous Schedule Status

/*

 *  Interrupt enable bits correspond to the interrupt active bits in USBSTS

 *  so no need to redefine here.

 */

#define USBINTR              0x0008

#define USBINTR_MASK         0x0000003f

#define FRINDEX              0x000c

#define CTRLDSSEGMENT        0x0010

#define PERIODICLISTBASE     0x0014

#define ASYNCLISTADDR        0x0018

#define ASYNCLISTADDR_MASK   0xffffffe0

#define CONFIGFLAG           0x0040

/*

 * Bits that are reserved or are read-only are masked out of values

 * written to us by software

 */

#define PORTSC_RO_MASK       0x007001c0

#define PORTSC_RWC_MASK      0x0000002a

#define PORTSC_WKOC_E        (1 << 22)    // Wake on Over Current Enable

#define PORTSC_WKDS_E        (1 << 21)    // Wake on Disconnect Enable

#define PORTSC_WKCN_E        (1 << 20)    // Wake on Connect Enable

#define PORTSC_PTC           (15 << 16)   // Port Test Control

#define PORTSC_PTC_SH        16           // Port Test Control shift

#define PORTSC_PIC           (3 << 14)    // Port Indicator Control

#define PORTSC_PIC_SH        14           // Port Indicator Control Shift

#define PORTSC_POWNER        (1 << 13)    // Port Owner

#define PORTSC_PPOWER        (1 << 12)    // Port Power

#define PORTSC_LINESTAT      (3 << 10)    // Port Line Status

#define PORTSC_LINESTAT_SH   10           // Port Line Status Shift

#define PORTSC_PRESET        (1 << 8)     // Port Reset

#define PORTSC_SUSPEND       (1 << 7)     // Port Suspend

#define PORTSC_FPRES         (1 << 6)     // Force Port Resume

#define PORTSC_OCC           (1 << 5)     // Over Current Change

#define PORTSC_OCA           (1 << 4)     // Over Current Active

#define PORTSC_PEDC          (1 << 3)     // Port Enable/Disable Change

#define PORTSC_PED           (1 << 2)     // Port Enable/Disable

#define PORTSC_CSC           (1 << 1)     // Connect Status Change

#define PORTSC_CONNECT       (1 << 0)     // Current Connect Status

#define FRAME_TIMER_FREQ 1000

#define FRAME_TIMER_NS   (1000000000 / FRAME_TIMER_FREQ)

#define UFRAME_TIMER_NS  (FRAME_TIMER_NS / 8)

#define NB_MAXINTRATE    8        // Max rate at which controller issues ints

#define BUFF_SIZE        5*4096   // Max bytes to transfer per transaction

#define MAX_QH           100      // Max allowable queue heads in a chain

#define MIN_UFR_PER_TICK 24       /* Min frames to process when catching up */

#define PERIODIC_ACTIVE  512      /* Micro-frames */

/*  Internal periodic / asynchronous schedule state machine states

 */

typedef enum {

    EST_INACTIVE = 1000,

    EST_ACTIVE,

    EST_EXECUTING,

    EST_SLEEPING,

    /*  The following states are internal to the state machine function

    */

    EST_WAITLISTHEAD,

    EST_FETCHENTRY,

    EST_FETCHQH,

    EST_FETCHITD,

    EST_FETCHSITD,

    EST_ADVANCEQUEUE,

    EST_FETCHQTD,

    EST_EXECUTE,

    EST_WRITEBACK,

    EST_HORIZONTALQH

} EHCI_STATES;

/* macros for accessing fields within next link pointer entry */

#define NLPTR_GET(x)             ((x) & 0xffffffe0)

#define NLPTR_TYPE_GET(x)        (((x) >> 1) & 3)

#define NLPTR_TBIT(x)            ((x) & 1)  // 1=invalid, 0=valid

/* link pointer types */

#define NLPTR_TYPE_ITD           0     // isoc xfer descriptor

#define NLPTR_TYPE_QH            1     // queue head

#define NLPTR_TYPE_STITD         2     // split xaction, isoc xfer descriptor

#define NLPTR_TYPE_FSTN          3     // frame span traversal node

#define SET_LAST_RUN_CLOCK(s) \

    (s)->last_run_ns = qemu_get_clock_ns(vm_clock);

/* nifty macros from Arnon's EHCI version  */

#define get_field(data, field) \

    (((data) & field##_MASK) >> field##_SH)

#define set_field(data, newval, field) do { \

    uint32_t val = *data; \

    val &= ~ field##_MASK; \

    val |= ((newval) << field##_SH) & field##_MASK; \

    *data = val; \

    } while(0)

static const char *ehci_state_names[] = {

    [EST_INACTIVE]     = "INACTIVE",

    [EST_ACTIVE]       = "ACTIVE",

    [EST_EXECUTING]    = "EXECUTING",

    [EST_SLEEPING]     = "SLEEPING",

    [EST_WAITLISTHEAD] = "WAITLISTHEAD",

    [EST_FETCHENTRY]   = "FETCH ENTRY",

    [EST_FETCHQH]      = "FETCH QH",

    [EST_FETCHITD]     = "FETCH ITD",

    [EST_ADVANCEQUEUE] = "ADVANCEQUEUE",

    [EST_FETCHQTD]     = "FETCH QTD",

    [EST_EXECUTE]      = "EXECUTE",

    [EST_WRITEBACK]    = "WRITEBACK",

    [EST_HORIZONTALQH] = "HORIZONTALQH",

};

static const char *ehci_mmio_names[] = {

    [USBCMD]            = "USBCMD",

    [USBSTS]            = "USBSTS",

    [USBINTR]           = "USBINTR",

    [FRINDEX]           = "FRINDEX",

    [PERIODICLISTBASE]  = "P-LIST BASE",

    [ASYNCLISTADDR]     = "A-LIST ADDR",

    [CONFIGFLAG]        = "CONFIGFLAG",

};

static int ehci_state_executing(EHCIQueue *q);

static int ehci_state_writeback(EHCIQueue *q);

static int ehci_state_advqueue(EHCIQueue *q);

static int ehci_fill_queue(EHCIPacket *p);

static void ehci_free_packet(EHCIPacket *p);

static const char *nr2str(const char **n, size_t len, uint32_t nr)

{

    if (nr < len && n[nr] != NULL) {

        return n[nr];

    } else {

        return "unknown";

    }

}

static const char *state2str(uint32_t state)

{

    return nr2str(ehci_state_names, ARRAY_SIZE(ehci_state_names), state);

}

static const char *addr2str(hwaddr addr)

{

    return nr2str(ehci_mmio_names, ARRAY_SIZE(ehci_mmio_names), addr);

}

static void ehci_trace_usbsts(uint32_t mask, int state)

{

    /* interrupts */

    if (mask & USBSTS_INT) {

        trace_usb_ehci_usbsts("INT", state);

    }

    if (mask & USBSTS_ERRINT) {

        trace_usb_ehci_usbsts("ERRINT", state);

    }

    if (mask & USBSTS_PCD) {

        trace_usb_ehci_usbsts("PCD", state);

    }

    if (mask & USBSTS_FLR) {

        trace_usb_ehci_usbsts("FLR", state);

    }

    if (mask & USBSTS_HSE) {

        trace_usb_ehci_usbsts("HSE", state);

    }

    if (mask & USBSTS_IAA) {

        trace_usb_ehci_usbsts("IAA", state);

    }

    /* status */

    if (mask & USBSTS_HALT) {

        trace_usb_ehci_usbsts("HALT", state);

    }

    if (mask & USBSTS_REC) {

        trace_usb_ehci_usbsts("REC", state);

    }

    if (mask & USBSTS_PSS) {

        trace_usb_ehci_usbsts("PSS", state);

    }

    if (mask & USBSTS_ASS) {

        trace_usb_ehci_usbsts("ASS", state);

    }

}

static inline void ehci_set_usbsts(EHCIState *s, int mask)

{

    if ((s->usbsts & mask) == mask) {

        return;

    }

    ehci_trace_usbsts(mask, 1);

    s->usbsts |= mask;

}

static inline void ehci_clear_usbsts(EHCIState *s, int mask)

{

    if ((s->usbsts & mask) == 0) {

        return;

    }

    ehci_trace_usbsts(mask, 0);

    s->usbsts &= ~mask;

}

/* update irq line */

static inline void ehci_update_irq(EHCIState *s)

{

    int level = 0;

    if ((s->usbsts & USBINTR_MASK) & s->usbintr) {

        level = 1;

    }

    trace_usb_ehci_irq(level, s->frindex, s->usbsts, s->usbintr);

    qemu_set_irq(s->irq, level);

}

/* flag interrupt condition */

static inline void ehci_raise_irq(EHCIState *s, int intr)

{

    if (intr & (USBSTS_PCD | USBSTS_FLR | USBSTS_HSE)) {

        s->usbsts |= intr;

        ehci_update_irq(s);

    } else {

        s->usbsts_pending |= intr;

    }

}

/*

 * Commit pending interrupts (added via ehci_raise_irq),

 * at the rate allowed by "Interrupt Threshold Control".

 */

static inline void ehci_commit_irq(EHCIState *s)

{

    uint32_t itc;

    if (!s->usbsts_pending) {

        return;

    }

    if (s->usbsts_frindex > s->frindex) {

        return;

    }

    itc = (s->usbcmd >> 16) & 0xff;

    s->usbsts |= s->usbsts_pending;

    s->usbsts_pending = 0;

    s->usbsts_frindex = s->frindex + itc;

    ehci_update_irq(s);

}

static void ehci_update_halt(EHCIState *s)

{

    if (s->usbcmd & USBCMD_RUNSTOP) {

        ehci_clear_usbsts(s, USBSTS_HALT);

    } else {

        if (s->astate == EST_INACTIVE && s->pstate == EST_INACTIVE) {

            ehci_set_usbsts(s, USBSTS_HALT);

        }

    }

}

static void ehci_set_state(EHCIState *s, int async, int state)

{

    if (async) {

        trace_usb_ehci_state("async", state2str(state));

        s->astate = state;

        if (s->astate == EST_INACTIVE) {

            ehci_clear_usbsts(s, USBSTS_ASS);

            ehci_update_halt(s);

        } else {

            ehci_set_usbsts(s, USBSTS_ASS);

        }

    } else {

        trace_usb_ehci_state("periodic", state2str(state));

        s->pstate = state;

        if (s->pstate == EST_INACTIVE) {

            ehci_clear_usbsts(s, USBSTS_PSS);

            ehci_update_halt(s);

        } else {

            ehci_set_usbsts(s, USBSTS_PSS);

        }

    }

}

static int ehci_get_state(EHCIState *s, int async)

{

    return async ? s->astate : s->pstate;

}

static void ehci_set_fetch_addr(EHCIState *s, int async, uint32_t addr)

{

    if (async) {

        s->a_fetch_addr = addr;

    } else {

        s->p_fetch_addr = addr;

    }

}

static int ehci_get_fetch_addr(EHCIState *s, int async)

{

    return async ? s->a_fetch_addr : s->p_fetch_addr;

}

static void ehci_trace_qh(EHCIQueue *q, hwaddr addr, EHCIqh *qh)

{

    /* need three here due to argument count limits */

    trace_usb_ehci_qh_ptrs(q, addr, qh->next,

                           qh->current_qtd, qh->next_qtd, qh->altnext_qtd);

    trace_usb_ehci_qh_fields(addr,

                             get_field(qh->epchar, QH_EPCHAR_RL),

                             get_field(qh->epchar, QH_EPCHAR_MPLEN),

                             get_field(qh->epchar, QH_EPCHAR_EPS),

                             get_field(qh->epchar, QH_EPCHAR_EP),

                             get_field(qh->epchar, QH_EPCHAR_DEVADDR));

    trace_usb_ehci_qh_bits(addr,

                           (bool)(qh->epchar & QH_EPCHAR_C),

                           (bool)(qh->epchar & QH_EPCHAR_H),

                           (bool)(qh->epchar & QH_EPCHAR_DTC),

                           (bool)(qh->epchar & QH_EPCHAR_I));

}

static void ehci_trace_qtd(EHCIQueue *q, hwaddr addr, EHCIqtd *qtd)

{

    /* need three here due to argument count limits */

    trace_usb_ehci_qtd_ptrs(q, addr, qtd->next, qtd->altnext);

    trace_usb_ehci_qtd_fields(addr,

                              get_field(qtd->token, QTD_TOKEN_TBYTES),

                              get_field(qtd->token, QTD_TOKEN_CPAGE),

                              get_field(qtd->token, QTD_TOKEN_CERR),

                              get_field(qtd->token, QTD_TOKEN_PID));

    trace_usb_ehci_qtd_bits(addr,

                            (bool)(qtd->token & QTD_TOKEN_IOC),

                            (bool)(qtd->token & QTD_TOKEN_ACTIVE),

                            (bool)(qtd->token & QTD_TOKEN_HALT),

                            (bool)(qtd->token & QTD_TOKEN_BABBLE),

                            (bool)(qtd->token & QTD_TOKEN_XACTERR));

}

static void ehci_trace_itd(EHCIState *s, hwaddr addr, EHCIitd *itd)

{

    trace_usb_ehci_itd(addr, itd->next,

                       get_field(itd->bufptr[1], ITD_BUFPTR_MAXPKT),

                       get_field(itd->bufptr[2], ITD_BUFPTR_MULT),

                       get_field(itd->bufptr[0], ITD_BUFPTR_EP),

                       get_field(itd->bufptr[0], ITD_BUFPTR_DEVADDR));

}

static void ehci_trace_sitd(EHCIState *s, hwaddr addr,

                            EHCIsitd *sitd)

{

    trace_usb_ehci_sitd(addr, sitd->next,

                        (bool)(sitd->results & SITD_RESULTS_ACTIVE));

}

static void ehci_trace_guest_bug(EHCIState *s, const char *message)

{

    trace_usb_ehci_guest_bug(message);

    fprintf(stderr, "ehci warning: %s\n", message);

}

static inline bool ehci_enabled(EHCIState *s)

{

    return s->usbcmd & USBCMD_RUNSTOP;

}

static inline bool ehci_async_enabled(EHCIState *s)

{

    return ehci_enabled(s) && (s->usbcmd & USBCMD_ASE);

}

static inline bool ehci_periodic_enabled(EHCIState *s)

{

    return ehci_enabled(s) && (s->usbcmd & USBCMD_PSE);

}

/* Get an array of dwords from main memory */

static inline int get_dwords(EHCIState *ehci, uint32_t addr,

                             uint32_t *buf, int num)

{

    int i;

    if (!ehci->as) {

        ehci_raise_irq(ehci, USBSTS_HSE);

        ehci->usbcmd &= ~USBCMD_RUNSTOP;

        trace_usb_ehci_dma_error();

        return -1;

    }

    for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {

        dma_memory_read(ehci->as, addr, buf, sizeof(*buf));

        *buf = le32_to_cpu(*buf);

    }

    return num;

}

/* Put an array of dwords in to main memory */

static inline int put_dwords(EHCIState *ehci, uint32_t addr,

                             uint32_t *buf, int num)

{

    int i;

    if (!ehci->as) {

        ehci_raise_irq(ehci, USBSTS_HSE);

        ehci->usbcmd &= ~USBCMD_RUNSTOP;

        trace_usb_ehci_dma_error();

        return -1;

    }

    for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) {

        uint32_t tmp = cpu_to_le32(*buf);

        dma_memory_write(ehci->as, addr, &tmp, sizeof(tmp));

    }

    return num;

}

static int ehci_get_pid(EHCIqtd *qtd)

{

    switch (get_field(qtd->token, QTD_TOKEN_PID)) {

    case 0:

        return USB_TOKEN_OUT;

    case 1:

        return USB_TOKEN_IN;

    case 2:

        return USB_TOKEN_SETUP;

    default:

        fprintf(stderr, "bad token\n");

        return 0;

    }

}

static bool ehci_verify_qh(EHCIQueue *q, EHCIqh *qh)

{

    uint32_t devaddr = get_field(qh->epchar, QH_EPCHAR_DEVADDR);

    uint32_t endp    = get_field(qh->epchar, QH_EPCHAR_EP);

    if ((devaddr != get_field(q->qh.epchar, QH_EPCHAR_DEVADDR)) ||

        (endp    != get_field(q->qh.epchar, QH_EPCHAR_EP)) ||

        (qh->current_qtd != q->qh.current_qtd) ||

        (q->async && qh->next_qtd != q->qh.next_qtd) ||

        (memcmp(&qh->altnext_qtd, &q->qh.altnext_qtd,

                                 7 * sizeof(uint32_t)) != 0) ||

        (q->dev != NULL && q->dev->addr != devaddr)) {

        return false;

    } else {

        return true;

    }

}

static bool ehci_verify_qtd(EHCIPacket *p, EHCIqtd *qtd)

{

    if (p->qtdaddr != p->queue->qtdaddr ||

        (p->queue->async && !NLPTR_TBIT(p->qtd.next) &&

            (p->qtd.next != qtd->next)) ||

        (!NLPTR_TBIT(p->qtd.altnext) && (p->qtd.altnext != qtd->altnext)) ||

        p->qtd.token != qtd->token ||

        p->qtd.bufptr[0] != qtd->bufptr[0]) {

        return false;

    } else {

        return true;

    }

}

static bool ehci_verify_pid(EHCIQueue *q, EHCIqtd *qtd)

{

    int ep  = get_field(q->qh.epchar, QH_EPCHAR_EP);

    int pid = ehci_get_pid(qtd);

    /* Note the pid changing is normal for ep 0 (the control ep) */

    if (q->last_pid && ep != 0 && pid != q->last_pid) {

        return false;

    } else {

        return true;

    }

}

/* Finish executing and writeback a packet outside of the regular

   fetchqh -> fetchqtd -> execute -> writeback cycle */

static void ehci_writeback_async_complete_packet(EHCIPacket *p)

{

    EHCIQueue *q = p->queue;

    EHCIqtd qtd;

    EHCIqh qh;

    int state;

    /* Verify the qh + qtd, like we do when going through fetchqh & fetchqtd */

    get_dwords(q->ehci, NLPTR_GET(q->qhaddr),

               (uint32_t *) &qh, sizeof(EHCIqh) >> 2);

    get_dwords(q->ehci, NLPTR_GET(q->qtdaddr),

               (uint32_t *) &qtd, sizeof(EHCIqtd) >> 2);

    if (!ehci_verify_qh(q, &qh) || !ehci_verify_qtd(p, &qtd)) {

        p->async = EHCI_ASYNC_INITIALIZED;

        ehci_free_packet(p);

        return;

    }

    state = ehci_get_state(q->ehci, q->async);

    ehci_state_executing(q);

    ehci_state_writeback(q); /* Frees the packet! */

    if (!(q->qh.token & QTD_TOKEN_HALT)) {

        ehci_state_advqueue(q);

    }

    ehci_set_state(q->ehci, q->async, state);

}

/* packet management */

static EHCIPacket *ehci_alloc_packet(EHCIQueue *q)

{

    EHCIPacket *p;

    p = g_new0(EHCIPacket, 1);

    p->queue = q;

    usb_packet_init(&p->packet);

    QTAILQ_INSERT_TAIL(&q->packets, p, next);

    trace_usb_ehci_packet_action(p->queue, p, "alloc");

    return p;

}

static void ehci_free_packet(EHCIPacket *p)

{

    if (p->async == EHCI_ASYNC_FINISHED &&

            !(p->queue->qh.token & QTD_TOKEN_HALT)) {

        ehci_writeback_async_complete_packet(p);

        return;

    }

    trace_usb_ehci_packet_action(p->queue, p, "free");

    if (p->async == EHCI_ASYNC_INFLIGHT) {

        usb_cancel_packet(&p->packet);

    }

    if (p->async == EHCI_ASYNC_FINISHED &&

            p->packet.status == USB_RET_SUCCESS) {

        fprintf(stderr,

                "EHCI: Dropping completed packet from halted %s ep %02X\n",

                (p->pid == USB_TOKEN_IN) ? "in" : "out",

                get_field(p->queue->qh.epchar, QH_EPCHAR_EP));

    }

    if (p->async != EHCI_ASYNC_NONE) {

        usb_packet_unmap(&p->packet, &p->sgl);

        qemu_sglist_destroy(&p->sgl);

    }

    QTAILQ_REMOVE(&p->queue->packets, p, next);

    usb_packet_cleanup(&p->packet);

    g_free(p);

}

/* queue management */

static EHCIQueue *ehci_alloc_queue(EHCIState *ehci, uint32_t addr, int async)

{

    EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;

    EHCIQueue *q;

    q = g_malloc0(sizeof(*q));

    q->ehci = ehci;

    q->qhaddr = addr;

    q->async = async;

    QTAILQ_INIT(&q->packets);

    QTAILQ_INSERT_HEAD(head, q, next);

    trace_usb_ehci_queue_action(q, "alloc");

    return q;

}

static void ehci_queue_stopped(EHCIQueue *q)

{

    int endp  = get_field(q->qh.epchar, QH_EPCHAR_EP);

    if (!q->last_pid || !q->dev) {

        return;

    }

    usb_device_ep_stopped(q->dev, usb_ep_get(q->dev, q->last_pid, endp));

}

static int ehci_cancel_queue(EHCIQueue *q)

{

    EHCIPacket *p;

    int packets = 0;

    p = QTAILQ_FIRST(&q->packets);

    if (p == NULL) {

        goto leave;

    }

    trace_usb_ehci_queue_action(q, "cancel");

    do {

        ehci_free_packet(p);

        packets++;

    } while ((p = QTAILQ_FIRST(&q->packets)) != NULL);

leave:

    ehci_queue_stopped(q);

    return packets;

}

static int ehci_reset_queue(EHCIQueue *q)

{

    int packets;

    trace_usb_ehci_queue_action(q, "reset");

    packets = ehci_cancel_queue(q);

    q->dev = NULL;

    q->qtdaddr = 0;

    q->last_pid = 0;

    return packets;

}

static void ehci_free_queue(EHCIQueue *q, const char *warn)

{

    EHCIQueueHead *head = q->async ? &q->ehci->aqueues : &q->ehci->pqueues;

    int cancelled;

    trace_usb_ehci_queue_action(q, "free");

    cancelled = ehci_cancel_queue(q);

    if (warn && cancelled > 0) {

        ehci_trace_guest_bug(q->ehci, warn);

    }

    QTAILQ_REMOVE(head, q, next);

    g_free(q);

}

static EHCIQueue *ehci_find_queue_by_qh(EHCIState *ehci, uint32_t addr,

                                        int async)

{

    EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;

    EHCIQueue *q;

    QTAILQ_FOREACH(q, head, next) {

        if (addr == q->qhaddr) {

            return q;

        }

    }

    return NULL;

}

static void ehci_queues_rip_unused(EHCIState *ehci, int async)

{

    EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;

    const char *warn = async ? "guest unlinked busy QH" : NULL;

    uint64_t maxage = FRAME_TIMER_NS * ehci->maxframes * 4;

    EHCIQueue *q, *tmp;

    QTAILQ_FOREACH_SAFE(q, head, next, tmp) {

        if (q->seen) {

            q->seen = 0;

            q->ts = ehci->last_run_ns;

            continue;

        }

        if (ehci->last_run_ns < q->ts + maxage) {

            continue;

        }

        ehci_free_queue(q, warn);

    }

}

static void ehci_queues_rip_unseen(EHCIState *ehci, int async)

{

    EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;

    EHCIQueue *q, *tmp;

    QTAILQ_FOREACH_SAFE(q, head, next, tmp) {

        if (!q->seen) {

            ehci_free_queue(q, NULL);

        }

    }

}

static void ehci_queues_rip_device(EHCIState *ehci, USBDevice *dev, int async)

{

    EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;

    EHCIQueue *q, *tmp;

    QTAILQ_FOREACH_SAFE(q, head, next, tmp) {

        if (q->dev != dev) {

            continue;

        }

        ehci_free_queue(q, NULL);

    }

}

static void ehci_queues_rip_all(EHCIState *ehci, int async)

{

    EHCIQueueHead *head = async ? &ehci->aqueues : &ehci->pqueues;

    const char *warn = async ? "guest stopped busy async schedule" : NULL;

    EHCIQueue *q, *tmp;

    QTAILQ_FOREACH_SAFE(q, head, next, tmp) {

        ehci_free_queue(q, warn);

    }

}

/* Attach or detach a device on root hub */

static void ehci_attach(USBPort *port)

{

    EHCIState *s = port->opaque;

    uint32_t *portsc = &s->portsc[port->index];

    const char *owner = (*portsc & PORTSC_POWNER) ? "comp" : "ehci";

    trace_usb_ehci_port_attach(port->index, owner, port->dev->product_desc);

    if (*portsc & PORTSC_POWNER) {

        USBPort *companion = s->companion_ports[port->index];

        companion->dev = port->dev;

        companion->ops->attach(companion);

        return;

    }

    *portsc |= PORTSC_CONNECT;

    *portsc |= PORTSC_CSC;

    ehci_raise_irq(s, USBSTS_PCD);

}

static void ehci_detach(USBPort *port)

{

    EHCIState *s = port->opaque;

    uint32_t *portsc = &s->portsc[port->index];

    const char *owner = (*portsc & PORTSC_POWNER) ? "comp" : "ehci";

    trace_usb_ehci_port_detach(port->index, owner);

    if (*portsc & PORTSC_POWNER) {

        USBPort *companion = s->companion_ports[port->index];

        companion->ops->detach(companion);

        companion->dev = NULL;

        /*

         * EHCI spec 4.2.2: "When a disconnect occurs... On the event,

         * the port ownership is returned immediately to the EHCI controller."

         */

        *portsc &= ~PORTSC_POWNER;

        return;

    }

    ehci_queues_rip_device(s, port->dev, 0);

    ehci_queues_rip_device(s, port->dev, 1);

    *portsc &= ~(PORTSC_CONNECT|PORTSC_PED);

    *portsc |= PORTSC_CSC;

    ehci_raise_irq(s, USBSTS_PCD);

}

static void ehci_child_detach(USBPort *port, USBDevice *child)

{

    EHCIState *s = port->opaque;

    uint32_t portsc = s->portsc[port->index];

    if (portsc & PORTSC_POWNER) {

        USBPort *companion = s->companion_ports[port->index];

        companion->ops->child_detach(companion, child);

        return;

    }

    ehci_queues_rip_device(s, child, 0);

    ehci_queues_rip_device(s, child, 1);

}

static void ehci_wakeup(USBPort *port)

{

    EHCIState *s = port->opaque;

    uint32_t portsc = s->portsc[port->index];

    if (portsc & PORTSC_POWNER) {

        USBPort *companion = s->companion_ports[port->index];

        if (companion->ops->wakeup) {

            companion->ops->wakeup(companion);

        }

        return;

    }

    qemu_bh_schedule(s->async_bh);

}

static int ehci_register_companion(USBBus *bus, USBPort *ports[],

                                   uint32_t portcount, uint32_t firstport)

{

    EHCIState *s = container_of(bus, EHCIState, bus);

    uint32_t i;

    if (firstport + portcount > NB_PORTS) {

        qerror_report(QERR_INVALID_PARAMETER_VALUE, "firstport",

                      "firstport on masterbus");

        error_printf_unless_qmp(

            "firstport value of %u makes companion take ports %u - %u, which "

            "is outside of the valid range of 0 - %u\n", firstport, firstport,

            firstport + portcount - 1, NB_PORTS - 1);

        return -1;

    }

    for (i = 0; i < portcount; i++) {

        if (s->companion_ports[firstport + i]) {

            qerror_report(QERR_INVALID_PARAMETER_VALUE, "masterbus",

                          "an USB masterbus");

            error_printf_unless_qmp(

                "port %u on masterbus %s already has a companion assigned\n",

                firstport + i, bus->qbus.name);

            return -1;

        }

    }

    for (i = 0; i < portcount; i++) {

        s->companion_ports[firstport + i] = ports[i];

        s->ports[firstport + i].speedmask |=

            USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL;

        /* Ensure devs attached before the initial reset go to the companion */

        s->portsc[firstport + i] = PORTSC_POWNER;

    }