intc/openpic: Convert to QOM realize
Split qdev initfn into instance_init and realize functions.Change one occurrence of "klass" while at it.
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>...
intc/openpic_kvm: Fix QOM and build issues
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Alexander Graf <agraf@suse.de>
openpic: factor out some common defines into openpic.h
...for use by the KVM in-kernel irqchip stub.
Signed-off-by: Scott Wood <scottwood@freescale.com>Signed-off-by: Alexander Graf <agraf@suse.de>
kvm/openpic: in-kernel mpic support
Enables support for the in-kernel MPIC that thas been merged into theKVM next branch. This includes irqfd/KVM_IRQ_LINE support from AlexGraf (along with some other improvements).
Note from Alex regarding kvm_irqchip_create():...
intc/openpic: QOM'ify
Introduce type constant and cast macro.
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Signed-off-by: Alexander Graf <agraf@suse.de>
intc/xilinx_intc: Handle level interrupt retriggering
Acking a level sensitive interrupt should have no effect if theinterrupt pin is still asserted. The current implementation requiresand edge condition to occur for setting a level sensitive IRQ, which...
intc/xilinx_intc: Inhibit write to ISR when HIE
When the Hardware Interrupt Enable (HIE) bit is set, software cannotchange ISR. Add write guard accordingly.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
intc/xilinx_intc: Dont lower IRQ when HIE cleared
This is a little strange. It is lowering the parent IRQ pin on inputwhen HIE is cleared. There is no such behaviour in the real hardware.
ISR changes based on interrupt pin state are already guarded on HIE...
intc/xilinx_intc: Don't clear level sens. IRQs without ACK
For level sensitive interrupts, ISR bits are cleared when the input pinis lowered. This is incorrect. Only software can clear ISR bits (viaIAR or direct write to ISR with !MER).
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>...
Merge branch 'realize-isa.v2' of git://github.com/afaerber/qemu-cpu
intc/xilinx_intc: Use qemu_set_irq
Use qemu_set_irq rather than if-elsing qemu_irq_(lower|raise). Nofunctional change, just reduces verbosity.
Cc: qemu-trivial@nongnu.org
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
isa: QOM'ify ISADevice
Rename its parent field and use DEVICE where necessary.
Signed-off-by: Andreas Färber <afaerber@suse.de>
i8259: QOM'ify some more
Introduce type constant.
Prepares for PIC realizefn.
i8259: Convert PICCommonState to use QOM realizefn
Instead of having the parent provide PICCommonClass::init,let the children override DeviceClass::realize themselves.This pushes the responsibility of saving and calling the parent'srealizefn to the children....
isa: Use realizefn for ISADevice
Drop ISADeviceClass::init and the resulting no-op initfn and letchildren implement their own realizefn. Adapt error handling.Split off an instance_init where sensible.
apic: rename apic specific bitopts
apic has its own version of bitops, with thedifference that it works on u32 and not long.Add apic_ prefix to avoid namespace clashes.
We should look into reusing standard bitops long-term,but that's not entirely trivial....
Remove Sun4c, Sun4d and a few CPUs
Sun4c and Sun4d architectures and related CPUs are not fully implemented(especially Sun4c MMU) and there has been no interest for them.
Likewise, a few CPUs (Cypress, Ross etc) are only half implemented.
Remove the machines and CPUs, they can be re-added if needed later....
remove double semicolons
Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com>Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
target-i386: Move APIC to ICC bus
It allows APIC to be hotplugged.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Replace MSI_SPACE_SIZE with APIC_SPACE_SIZE
Put APIC_SPACE_SIZE in a public header so that it can bereused elsewhere later.
i8259: QOM cleanups
Eliminate DO_UPCAST() for PICCommonState. Prepares for ISA realizefn.
Also give the i8259_common type registration functions unique nameswhile at it.
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Andreas Färber <afaerber@suse.de>...
ioapic: Replace FROM_SYSBUS() with QOM type cast
arm: fix location of some include files
The recent rearrangement of include files had some minor errors: devices.h is not ARM specific and should not be in arm/ arm.h should be in arm/
Move these two headers to correct this.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
Typo, spelling and grammatical fixes
Minor fixes to documentation and code comments.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
hw: move interrupt controllers to hw/intc/, configure with default-configs/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
hw: move private headers to hw/ subdirectories.
Many headers are used only in a single directory. These can bekept in hw/.
hw: move target-independent files to subdirectories
This patch tackles all files that are compiled once, movingthem to subdirectories of hw/.
hw: make subdirectories for devices
Prepare the new directory structure.