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#include "hw/hw.h"
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#include "hw/boards.h"
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#include "hw/pc.h"
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#include "hw/isa.h"
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#include "exec-all.h"
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void register_machines(void)
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{
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    qemu_register_machine(&pc_machine);
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    qemu_register_machine(&isapc_machine);
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}
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static void cpu_put_seg(QEMUFile *f, SegmentCache *dt)
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{
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    qemu_put_be32(f, dt->selector);
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    qemu_put_betl(f, dt->base);
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    qemu_put_be32(f, dt->limit);
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    qemu_put_be32(f, dt->flags);
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}
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static void cpu_get_seg(QEMUFile *f, SegmentCache *dt)
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{
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    dt->selector = qemu_get_be32(f);
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    dt->base = qemu_get_betl(f);
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    dt->limit = qemu_get_be32(f);
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    dt->flags = qemu_get_be32(f);
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}
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void cpu_save(QEMUFile *f, void *opaque)
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{
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    CPUState *env = opaque;
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    uint16_t fptag, fpus, fpuc, fpregs_format;
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    uint32_t hflags;
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    int32_t a20_mask;
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    int i;
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    for(i = 0; i < CPU_NB_REGS; i++)
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        qemu_put_betls(f, &env->regs[i]);
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    qemu_put_betls(f, &env->eip);
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    qemu_put_betls(f, &env->eflags);
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    hflags = env->hflags; /* XXX: suppress most of the redundant hflags */
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    qemu_put_be32s(f, &hflags);
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    /* FPU */
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    fpuc = env->fpuc;
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    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
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    fptag = 0;
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    for(i = 0; i < 8; i++) {
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        fptag |= ((!env->fptags[i]) << i);
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    }
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    qemu_put_be16s(f, &fpuc);
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    qemu_put_be16s(f, &fpus);
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    qemu_put_be16s(f, &fptag);
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#ifdef USE_X86LDOUBLE
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    fpregs_format = 0;
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#else
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    fpregs_format = 1;
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#endif
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    qemu_put_be16s(f, &fpregs_format);
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    for(i = 0; i < 8; i++) {
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#ifdef USE_X86LDOUBLE
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        {
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            uint64_t mant;
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            uint16_t exp;
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            /* we save the real CPU data (in case of MMX usage only 'mant'
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               contains the MMX register */
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            cpu_get_fp80(&mant, &exp, env->fpregs[i].d);
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            qemu_put_be64(f, mant);
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            qemu_put_be16(f, exp);
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        }
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#else
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        /* if we use doubles for float emulation, we save the doubles to
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           avoid losing information in case of MMX usage. It can give
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           problems if the image is restored on a CPU where long
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           doubles are used instead. */
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        qemu_put_be64(f, env->fpregs[i].mmx.MMX_Q(0));
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#endif
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    }
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    for(i = 0; i < 6; i++)
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        cpu_put_seg(f, &env->segs[i]);
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    cpu_put_seg(f, &env->ldt);
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    cpu_put_seg(f, &env->tr);
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    cpu_put_seg(f, &env->gdt);
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    cpu_put_seg(f, &env->idt);
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    qemu_put_be32s(f, &env->sysenter_cs);
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    qemu_put_betls(f, &env->sysenter_esp);
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    qemu_put_betls(f, &env->sysenter_eip);
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    qemu_put_betls(f, &env->cr[0]);
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    qemu_put_betls(f, &env->cr[2]);
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    qemu_put_betls(f, &env->cr[3]);
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    qemu_put_betls(f, &env->cr[4]);
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    for(i = 0; i < 8; i++)
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        qemu_put_betls(f, &env->dr[i]);
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    /* MMU */
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    a20_mask = (int32_t) env->a20_mask;
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    qemu_put_be32s(f, &a20_mask);
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    /* XMM */
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    qemu_put_be32s(f, &env->mxcsr);
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    for(i = 0; i < CPU_NB_REGS; i++) {
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        qemu_put_be64s(f, &env->xmm_regs[i].XMM_Q(0));
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        qemu_put_be64s(f, &env->xmm_regs[i].XMM_Q(1));
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    }
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#ifdef TARGET_X86_64
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    qemu_put_be64s(f, &env->efer);
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    qemu_put_be64s(f, &env->star);
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    qemu_put_be64s(f, &env->lstar);
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    qemu_put_be64s(f, &env->cstar);
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    qemu_put_be64s(f, &env->fmask);
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    qemu_put_be64s(f, &env->kernelgsbase);
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#endif
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    qemu_put_be32s(f, &env->smbase);
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    qemu_put_be64s(f, &env->pat);
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    qemu_put_be32s(f, &env->hflags2);
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    qemu_put_be64s(f, &env->vm_hsave);
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    qemu_put_be64s(f, &env->vm_vmcb);
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    qemu_put_be64s(f, &env->tsc_offset);
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    qemu_put_be64s(f, &env->intercept);
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    qemu_put_be16s(f, &env->intercept_cr_read);
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    qemu_put_be16s(f, &env->intercept_cr_write);
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    qemu_put_be16s(f, &env->intercept_dr_read);
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    qemu_put_be16s(f, &env->intercept_dr_write);
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    qemu_put_be32s(f, &env->intercept_exceptions);
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    qemu_put_8s(f, &env->v_tpr);
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}
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#ifdef USE_X86LDOUBLE
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/* XXX: add that in a FPU generic layer */
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union x86_longdouble {
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    uint64_t mant;
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    uint16_t exp;
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};
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#define MANTD1(fp)        (fp & ((1LL << 52) - 1))
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#define EXPBIAS1 1023
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#define EXPD1(fp)        ((fp >> 52) & 0x7FF)
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#define SIGND1(fp)        ((fp >> 32) & 0x80000000)
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static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
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{
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    int e;
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    /* mantissa */
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    p->mant = (MANTD1(temp) << 11) | (1LL << 63);
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    /* exponent + sign */
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    e = EXPD1(temp) - EXPBIAS1 + 16383;
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    e |= SIGND1(temp) >> 16;
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    p->exp = e;
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}
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#endif
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int cpu_load(QEMUFile *f, void *opaque, int version_id)
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{
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    CPUState *env = opaque;
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    int i, guess_mmx;
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    uint32_t hflags;
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    uint16_t fpus, fpuc, fptag, fpregs_format;
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    int32_t a20_mask;
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    if (version_id != 3 && version_id != 4 && version_id != 5
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        && version_id != 6 && version_id != 7)
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        return -EINVAL;
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    for(i = 0; i < CPU_NB_REGS; i++)
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        qemu_get_betls(f, &env->regs[i]);
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    qemu_get_betls(f, &env->eip);
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    qemu_get_betls(f, &env->eflags);
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    qemu_get_be32s(f, &hflags);
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    qemu_get_be16s(f, &fpuc);
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    qemu_get_be16s(f, &fpus);
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    qemu_get_be16s(f, &fptag);
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    qemu_get_be16s(f, &fpregs_format);
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    /* NOTE: we cannot always restore the FPU state if the image come
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       from a host with a different 'USE_X86LDOUBLE' define. We guess
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       if we are in an MMX state to restore correctly in that case. */
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    guess_mmx = ((fptag == 0xff) && (fpus & 0x3800) == 0);
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    for(i = 0; i < 8; i++) {
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        uint64_t mant;
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        uint16_t exp;
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        switch(fpregs_format) {
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        case 0:
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            mant = qemu_get_be64(f);
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            exp = qemu_get_be16(f);
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#ifdef USE_X86LDOUBLE
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            env->fpregs[i].d = cpu_set_fp80(mant, exp);
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#else
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            /* difficult case */
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            if (guess_mmx)
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                env->fpregs[i].mmx.MMX_Q(0) = mant;
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            else
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                env->fpregs[i].d = cpu_set_fp80(mant, exp);
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#endif
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            break;
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        case 1:
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            mant = qemu_get_be64(f);
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#ifdef USE_X86LDOUBLE
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            {
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                union x86_longdouble *p;
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                /* difficult case */
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                p = (void *)&env->fpregs[i];
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                if (guess_mmx) {
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                    p->mant = mant;
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                    p->exp = 0xffff;
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                } else {
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                    fp64_to_fp80(p, mant);
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                }
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            }
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#else
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            env->fpregs[i].mmx.MMX_Q(0) = mant;
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#endif
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            break;
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        default:
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            return -EINVAL;
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        }
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    }
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    env->fpuc = fpuc;
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    /* XXX: restore FPU round state */
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    env->fpstt = (fpus >> 11) & 7;
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    env->fpus = fpus & ~0x3800;
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    fptag ^= 0xff;
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    for(i = 0; i < 8; i++) {
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        env->fptags[i] = (fptag >> i) & 1;
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    }
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    for(i = 0; i < 6; i++)
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        cpu_get_seg(f, &env->segs[i]);
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    cpu_get_seg(f, &env->ldt);
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    cpu_get_seg(f, &env->tr);
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    cpu_get_seg(f, &env->gdt);
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    cpu_get_seg(f, &env->idt);
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    qemu_get_be32s(f, &env->sysenter_cs);
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    if (version_id >= 7) {
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        qemu_get_betls(f, &env->sysenter_esp);
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        qemu_get_betls(f, &env->sysenter_eip);
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    } else {
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        qemu_get_be32s(f, &env->sysenter_esp);
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        qemu_get_be32s(f, &env->sysenter_eip);
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    }
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    qemu_get_betls(f, &env->cr[0]);
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    qemu_get_betls(f, &env->cr[2]);
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    qemu_get_betls(f, &env->cr[3]);
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    qemu_get_betls(f, &env->cr[4]);
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    for(i = 0; i < 8; i++)
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        qemu_get_betls(f, &env->dr[i]);
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    /* MMU */
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    qemu_get_be32s(f, &a20_mask);
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    env->a20_mask = a20_mask;
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    qemu_get_be32s(f, &env->mxcsr);
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    for(i = 0; i < CPU_NB_REGS; i++) {
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        qemu_get_be64s(f, &env->xmm_regs[i].XMM_Q(0));
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        qemu_get_be64s(f, &env->xmm_regs[i].XMM_Q(1));
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    }
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#ifdef TARGET_X86_64
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    qemu_get_be64s(f, &env->efer);
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    qemu_get_be64s(f, &env->star);
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    qemu_get_be64s(f, &env->lstar);
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    qemu_get_be64s(f, &env->cstar);
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    qemu_get_be64s(f, &env->fmask);
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    qemu_get_be64s(f, &env->kernelgsbase);
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#endif
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    if (version_id >= 4) {
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        qemu_get_be32s(f, &env->smbase);
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    }
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    if (version_id >= 5) {
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        qemu_get_be64s(f, &env->pat);
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        qemu_get_be32s(f, &env->hflags2);
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        if (version_id < 6)
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            qemu_get_be32s(f, &env->halted);
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        qemu_get_be64s(f, &env->vm_hsave);
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        qemu_get_be64s(f, &env->vm_vmcb);
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        qemu_get_be64s(f, &env->tsc_offset);
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        qemu_get_be64s(f, &env->intercept);
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        qemu_get_be16s(f, &env->intercept_cr_read);
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        qemu_get_be16s(f, &env->intercept_cr_write);
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        qemu_get_be16s(f, &env->intercept_dr_read);
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        qemu_get_be16s(f, &env->intercept_dr_write);
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        qemu_get_be32s(f, &env->intercept_exceptions);
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        qemu_get_8s(f, &env->v_tpr);
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    }
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    /* XXX: ensure compatiblity for halted bit ? */
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    /* XXX: compute redundant hflags bits */
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    env->hflags = hflags;
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    tlb_flush(env, 1);
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    return 0;
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}