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root / target-i386 @ f5049756

Name Size
TODO 1.1 kB
cpu.h 22.6 kB
exec.h 9.7 kB
helper.c 42.2 kB
helper.h 9.7 kB
helper_template.h 8.7 kB
machine.c 8.4 kB
op_helper.c 155.5 kB
ops_sse.h 39.4 kB
ops_sse_header.h 10.7 kB
svm.h 5.8 kB
translate.c 241.2 kB

Latest revisions

# Date Author Comment
f5049756 09/29/2008 07:09 pm aliguori

Fix save/restore regression introduced by r5318

sysenter_cs is a u32 and is loaded as a u32.

Signed-off-by: Anthony Liguori <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

558fa836 09/29/2008 04:55 pm pbrook

My core2duo patch introduced a vague statement of "missing features" in
the CPUID specification. This patch addresses this by specifying exactly
what is missing.
While going along the missing CPUID entries I also stumbled across
invalid and missing CPUID #defines while comparing them to the Intel...

c0d82995 09/29/2008 01:02 am balrog

Rename -cpu atom to -cpu n270.

As noticed by Alexander Graf Atom is a name of a series with varying

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

a876e289 09/27/2008 12:03 am balrog

Fix definition of EMX bit in cpuid (Jens Axboe).

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

2ca83a8d 09/25/2008 11:24 pm blueswir1

Revert r5274 which breaks savevm/loadvm

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

0086de1c 09/25/2008 09:31 pm balrog

Add Atom (x86) cpu identification.

Also add SSSE3 to Core2 features.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

2436b61a 09/25/2008 09:16 pm balrog

SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).

On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patch
makes both 64-bit aware and enables them for Intel CPUs.
Add cpu save/load for 64-bit wide sysenter variables.

Signed-off-by: Alexander Graf <>...

e737b32a 09/25/2008 09:11 pm balrog

Core 2 Duo specification (Alexander Graf).

This patch adds a Core 2 Duo CPU to the available CPU types. The CPU
definition tries to resemble a real CPU as good as possible, whilst not
exposing features qemu does not implement.
The patch also includes some minor additions that Core 2 Duo CPUs have:...

c5096daf 09/25/2008 09:08 pm balrog

Clean up vendor identification (Alexander Graf).

Right now CPU vendor identification contains a lot of magic numbers. The
patch cleans them up to defines, so we can identify the CPU later on
without copying magic numbers.

Signed-off-by: Alexander Graf <>...

4242b1bd 09/25/2008 09:01 pm balrog

Implement x86 SSSE3 instructions.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

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