root / target-arm / op.c @ f51bbbfe
History | View | Annotate | Download (30.4 kB)
1 |
/*
|
---|---|
2 |
* ARM micro operations
|
3 |
*
|
4 |
* Copyright (c) 2003 Fabrice Bellard
|
5 |
* Copyright (c) 2005-2007 CodeSourcery, LLC
|
6 |
*
|
7 |
* This library is free software; you can redistribute it and/or
|
8 |
* modify it under the terms of the GNU Lesser General Public
|
9 |
* License as published by the Free Software Foundation; either
|
10 |
* version 2 of the License, or (at your option) any later version.
|
11 |
*
|
12 |
* This library is distributed in the hope that it will be useful,
|
13 |
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
14 |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
15 |
* Lesser General Public License for more details.
|
16 |
*
|
17 |
* You should have received a copy of the GNU Lesser General Public
|
18 |
* License along with this library; if not, write to the Free Software
|
19 |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
20 |
*/
|
21 |
#include "exec.h" |
22 |
|
23 |
void OPPROTO op_addl_T0_T1_cc(void) |
24 |
{ |
25 |
unsigned int src1; |
26 |
src1 = T0; |
27 |
T0 += T1; |
28 |
env->NZF = T0; |
29 |
env->CF = T0 < src1; |
30 |
env->VF = (src1 ^ T1 ^ -1) & (src1 ^ T0);
|
31 |
} |
32 |
|
33 |
void OPPROTO op_adcl_T0_T1_cc(void) |
34 |
{ |
35 |
unsigned int src1; |
36 |
src1 = T0; |
37 |
if (!env->CF) {
|
38 |
T0 += T1; |
39 |
env->CF = T0 < src1; |
40 |
} else {
|
41 |
T0 += T1 + 1;
|
42 |
env->CF = T0 <= src1; |
43 |
} |
44 |
env->VF = (src1 ^ T1 ^ -1) & (src1 ^ T0);
|
45 |
env->NZF = T0; |
46 |
FORCE_RET(); |
47 |
} |
48 |
|
49 |
#define OPSUB(sub, sbc, res, T0, T1) \
|
50 |
\ |
51 |
void OPPROTO op_ ## sub ## l_T0_T1_cc(void) \ |
52 |
{ \ |
53 |
unsigned int src1; \ |
54 |
src1 = T0; \ |
55 |
T0 -= T1; \ |
56 |
env->NZF = T0; \ |
57 |
env->CF = src1 >= T1; \ |
58 |
env->VF = (src1 ^ T1) & (src1 ^ T0); \ |
59 |
res = T0; \ |
60 |
} \ |
61 |
\ |
62 |
void OPPROTO op_ ## sbc ## l_T0_T1(void) \ |
63 |
{ \ |
64 |
res = T0 - T1 + env->CF - 1; \
|
65 |
} \ |
66 |
\ |
67 |
void OPPROTO op_ ## sbc ## l_T0_T1_cc(void) \ |
68 |
{ \ |
69 |
unsigned int src1; \ |
70 |
src1 = T0; \ |
71 |
if (!env->CF) { \
|
72 |
T0 = T0 - T1 - 1; \
|
73 |
env->CF = src1 > T1; \ |
74 |
} else { \
|
75 |
T0 = T0 - T1; \ |
76 |
env->CF = src1 >= T1; \ |
77 |
} \ |
78 |
env->VF = (src1 ^ T1) & (src1 ^ T0); \ |
79 |
env->NZF = T0; \ |
80 |
res = T0; \ |
81 |
FORCE_RET(); \ |
82 |
} |
83 |
|
84 |
OPSUB(sub, sbc, T0, T0, T1) |
85 |
|
86 |
OPSUB(rsb, rsc, T0, T1, T0) |
87 |
|
88 |
#define EIP (env->regs[15]) |
89 |
|
90 |
void OPPROTO op_test_eq(void) |
91 |
{ |
92 |
if (env->NZF == 0) |
93 |
GOTO_LABEL_PARAM(1);;
|
94 |
FORCE_RET(); |
95 |
} |
96 |
|
97 |
void OPPROTO op_test_ne(void) |
98 |
{ |
99 |
if (env->NZF != 0) |
100 |
GOTO_LABEL_PARAM(1);;
|
101 |
FORCE_RET(); |
102 |
} |
103 |
|
104 |
void OPPROTO op_test_cs(void) |
105 |
{ |
106 |
if (env->CF != 0) |
107 |
GOTO_LABEL_PARAM(1);
|
108 |
FORCE_RET(); |
109 |
} |
110 |
|
111 |
void OPPROTO op_test_cc(void) |
112 |
{ |
113 |
if (env->CF == 0) |
114 |
GOTO_LABEL_PARAM(1);
|
115 |
FORCE_RET(); |
116 |
} |
117 |
|
118 |
void OPPROTO op_test_mi(void) |
119 |
{ |
120 |
if ((env->NZF & 0x80000000) != 0) |
121 |
GOTO_LABEL_PARAM(1);
|
122 |
FORCE_RET(); |
123 |
} |
124 |
|
125 |
void OPPROTO op_test_pl(void) |
126 |
{ |
127 |
if ((env->NZF & 0x80000000) == 0) |
128 |
GOTO_LABEL_PARAM(1);
|
129 |
FORCE_RET(); |
130 |
} |
131 |
|
132 |
void OPPROTO op_test_vs(void) |
133 |
{ |
134 |
if ((env->VF & 0x80000000) != 0) |
135 |
GOTO_LABEL_PARAM(1);
|
136 |
FORCE_RET(); |
137 |
} |
138 |
|
139 |
void OPPROTO op_test_vc(void) |
140 |
{ |
141 |
if ((env->VF & 0x80000000) == 0) |
142 |
GOTO_LABEL_PARAM(1);
|
143 |
FORCE_RET(); |
144 |
} |
145 |
|
146 |
void OPPROTO op_test_hi(void) |
147 |
{ |
148 |
if (env->CF != 0 && env->NZF != 0) |
149 |
GOTO_LABEL_PARAM(1);
|
150 |
FORCE_RET(); |
151 |
} |
152 |
|
153 |
void OPPROTO op_test_ls(void) |
154 |
{ |
155 |
if (env->CF == 0 || env->NZF == 0) |
156 |
GOTO_LABEL_PARAM(1);
|
157 |
FORCE_RET(); |
158 |
} |
159 |
|
160 |
void OPPROTO op_test_ge(void) |
161 |
{ |
162 |
if (((env->VF ^ env->NZF) & 0x80000000) == 0) |
163 |
GOTO_LABEL_PARAM(1);
|
164 |
FORCE_RET(); |
165 |
} |
166 |
|
167 |
void OPPROTO op_test_lt(void) |
168 |
{ |
169 |
if (((env->VF ^ env->NZF) & 0x80000000) != 0) |
170 |
GOTO_LABEL_PARAM(1);
|
171 |
FORCE_RET(); |
172 |
} |
173 |
|
174 |
void OPPROTO op_test_gt(void) |
175 |
{ |
176 |
if (env->NZF != 0 && ((env->VF ^ env->NZF) & 0x80000000) == 0) |
177 |
GOTO_LABEL_PARAM(1);
|
178 |
FORCE_RET(); |
179 |
} |
180 |
|
181 |
void OPPROTO op_test_le(void) |
182 |
{ |
183 |
if (env->NZF == 0 || ((env->VF ^ env->NZF) & 0x80000000) != 0) |
184 |
GOTO_LABEL_PARAM(1);
|
185 |
FORCE_RET(); |
186 |
} |
187 |
|
188 |
void OPPROTO op_test_T0(void) |
189 |
{ |
190 |
if (T0)
|
191 |
GOTO_LABEL_PARAM(1);
|
192 |
FORCE_RET(); |
193 |
} |
194 |
void OPPROTO op_testn_T0(void) |
195 |
{ |
196 |
if (!T0)
|
197 |
GOTO_LABEL_PARAM(1);
|
198 |
FORCE_RET(); |
199 |
} |
200 |
|
201 |
void OPPROTO op_movl_T0_cpsr(void) |
202 |
{ |
203 |
/* Execution state bits always read as zero. */
|
204 |
T0 = cpsr_read(env) & ~CPSR_EXEC; |
205 |
FORCE_RET(); |
206 |
} |
207 |
|
208 |
void OPPROTO op_movl_T0_spsr(void) |
209 |
{ |
210 |
T0 = env->spsr; |
211 |
} |
212 |
|
213 |
void OPPROTO op_movl_spsr_T0(void) |
214 |
{ |
215 |
uint32_t mask = PARAM1; |
216 |
env->spsr = (env->spsr & ~mask) | (T0 & mask); |
217 |
} |
218 |
|
219 |
void OPPROTO op_movl_cpsr_T0(void) |
220 |
{ |
221 |
cpsr_write(env, T0, PARAM1); |
222 |
FORCE_RET(); |
223 |
} |
224 |
|
225 |
void OPPROTO op_mul_T0_T1(void) |
226 |
{ |
227 |
T0 = T0 * T1; |
228 |
} |
229 |
|
230 |
/* 64 bit unsigned mul */
|
231 |
void OPPROTO op_mull_T0_T1(void) |
232 |
{ |
233 |
uint64_t res; |
234 |
res = (uint64_t)T0 * (uint64_t)T1; |
235 |
T1 = res >> 32;
|
236 |
T0 = res; |
237 |
} |
238 |
|
239 |
/* 64 bit signed mul */
|
240 |
void OPPROTO op_imull_T0_T1(void) |
241 |
{ |
242 |
uint64_t res; |
243 |
res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1); |
244 |
T1 = res >> 32;
|
245 |
T0 = res; |
246 |
} |
247 |
|
248 |
/* 48 bit signed mul, top 32 bits */
|
249 |
void OPPROTO op_imulw_T0_T1(void) |
250 |
{ |
251 |
uint64_t res; |
252 |
res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1); |
253 |
T0 = res >> 16;
|
254 |
} |
255 |
|
256 |
void OPPROTO op_addq_T0_T1(void) |
257 |
{ |
258 |
uint64_t res; |
259 |
res = ((uint64_t)T1 << 32) | T0;
|
260 |
res += ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]);
|
261 |
T1 = res >> 32;
|
262 |
T0 = res; |
263 |
} |
264 |
|
265 |
void OPPROTO op_addq_lo_T0_T1(void) |
266 |
{ |
267 |
uint64_t res; |
268 |
res = ((uint64_t)T1 << 32) | T0;
|
269 |
res += (uint64_t)(env->regs[PARAM1]); |
270 |
T1 = res >> 32;
|
271 |
T0 = res; |
272 |
} |
273 |
|
274 |
/* Dual 16-bit accumulate. */
|
275 |
void OPPROTO op_addq_T0_T1_dual(void) |
276 |
{ |
277 |
uint64_t res; |
278 |
res = ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]);
|
279 |
res += (int32_t)T0; |
280 |
res += (int32_t)T1; |
281 |
env->regs[PARAM1] = (uint32_t)res; |
282 |
env->regs[PARAM2] = res >> 32;
|
283 |
} |
284 |
|
285 |
/* Dual 16-bit subtract accumulate. */
|
286 |
void OPPROTO op_subq_T0_T1_dual(void) |
287 |
{ |
288 |
uint64_t res; |
289 |
res = ((uint64_t)(env->regs[PARAM2]) << 32) | (env->regs[PARAM1]);
|
290 |
res += (int32_t)T0; |
291 |
res -= (int32_t)T1; |
292 |
env->regs[PARAM1] = (uint32_t)res; |
293 |
env->regs[PARAM2] = res >> 32;
|
294 |
} |
295 |
|
296 |
void OPPROTO op_logicq_cc(void) |
297 |
{ |
298 |
env->NZF = (T1 & 0x80000000) | ((T0 | T1) != 0); |
299 |
} |
300 |
|
301 |
/* memory access */
|
302 |
|
303 |
#define MEMSUFFIX _raw
|
304 |
#include "op_mem.h" |
305 |
|
306 |
#if !defined(CONFIG_USER_ONLY)
|
307 |
#define MEMSUFFIX _user
|
308 |
#include "op_mem.h" |
309 |
#define MEMSUFFIX _kernel
|
310 |
#include "op_mem.h" |
311 |
#endif
|
312 |
|
313 |
void OPPROTO op_clrex(void) |
314 |
{ |
315 |
cpu_lock(); |
316 |
helper_clrex(env); |
317 |
cpu_unlock(); |
318 |
} |
319 |
|
320 |
/* shifts */
|
321 |
|
322 |
/* T1 based, set C flag */
|
323 |
void OPPROTO op_shll_T1_im_cc(void) |
324 |
{ |
325 |
env->CF = (T1 >> (32 - PARAM1)) & 1; |
326 |
T1 = T1 << PARAM1; |
327 |
} |
328 |
|
329 |
void OPPROTO op_shrl_T1_im_cc(void) |
330 |
{ |
331 |
env->CF = (T1 >> (PARAM1 - 1)) & 1; |
332 |
T1 = (uint32_t)T1 >> PARAM1; |
333 |
} |
334 |
|
335 |
void OPPROTO op_shrl_T1_0_cc(void) |
336 |
{ |
337 |
env->CF = (T1 >> 31) & 1; |
338 |
T1 = 0;
|
339 |
} |
340 |
|
341 |
void OPPROTO op_sarl_T1_im_cc(void) |
342 |
{ |
343 |
env->CF = (T1 >> (PARAM1 - 1)) & 1; |
344 |
T1 = (int32_t)T1 >> PARAM1; |
345 |
} |
346 |
|
347 |
void OPPROTO op_sarl_T1_0_cc(void) |
348 |
{ |
349 |
env->CF = (T1 >> 31) & 1; |
350 |
T1 = (int32_t)T1 >> 31;
|
351 |
} |
352 |
|
353 |
void OPPROTO op_rorl_T1_im_cc(void) |
354 |
{ |
355 |
int shift;
|
356 |
shift = PARAM1; |
357 |
env->CF = (T1 >> (shift - 1)) & 1; |
358 |
T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
|
359 |
} |
360 |
|
361 |
void OPPROTO op_rrxl_T1_cc(void) |
362 |
{ |
363 |
uint32_t c; |
364 |
c = T1 & 1;
|
365 |
T1 = ((uint32_t)T1 >> 1) | ((uint32_t)env->CF << 31); |
366 |
env->CF = c; |
367 |
} |
368 |
|
369 |
/* T1 based, use T0 as shift count */
|
370 |
|
371 |
void OPPROTO op_shll_T1_T0(void) |
372 |
{ |
373 |
int shift;
|
374 |
shift = T0 & 0xff;
|
375 |
if (shift >= 32) |
376 |
T1 = 0;
|
377 |
else
|
378 |
T1 = T1 << shift; |
379 |
FORCE_RET(); |
380 |
} |
381 |
|
382 |
void OPPROTO op_shrl_T1_T0(void) |
383 |
{ |
384 |
int shift;
|
385 |
shift = T0 & 0xff;
|
386 |
if (shift >= 32) |
387 |
T1 = 0;
|
388 |
else
|
389 |
T1 = (uint32_t)T1 >> shift; |
390 |
FORCE_RET(); |
391 |
} |
392 |
|
393 |
void OPPROTO op_sarl_T1_T0(void) |
394 |
{ |
395 |
int shift;
|
396 |
shift = T0 & 0xff;
|
397 |
if (shift >= 32) |
398 |
shift = 31;
|
399 |
T1 = (int32_t)T1 >> shift; |
400 |
} |
401 |
|
402 |
void OPPROTO op_rorl_T1_T0(void) |
403 |
{ |
404 |
int shift;
|
405 |
shift = T0 & 0x1f;
|
406 |
if (shift) {
|
407 |
T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
|
408 |
} |
409 |
FORCE_RET(); |
410 |
} |
411 |
|
412 |
/* T1 based, use T0 as shift count and compute CF */
|
413 |
|
414 |
void OPPROTO op_shll_T1_T0_cc(void) |
415 |
{ |
416 |
int shift;
|
417 |
shift = T0 & 0xff;
|
418 |
if (shift >= 32) { |
419 |
if (shift == 32) |
420 |
env->CF = T1 & 1;
|
421 |
else
|
422 |
env->CF = 0;
|
423 |
T1 = 0;
|
424 |
} else if (shift != 0) { |
425 |
env->CF = (T1 >> (32 - shift)) & 1; |
426 |
T1 = T1 << shift; |
427 |
} |
428 |
FORCE_RET(); |
429 |
} |
430 |
|
431 |
void OPPROTO op_shrl_T1_T0_cc(void) |
432 |
{ |
433 |
int shift;
|
434 |
shift = T0 & 0xff;
|
435 |
if (shift >= 32) { |
436 |
if (shift == 32) |
437 |
env->CF = (T1 >> 31) & 1; |
438 |
else
|
439 |
env->CF = 0;
|
440 |
T1 = 0;
|
441 |
} else if (shift != 0) { |
442 |
env->CF = (T1 >> (shift - 1)) & 1; |
443 |
T1 = (uint32_t)T1 >> shift; |
444 |
} |
445 |
FORCE_RET(); |
446 |
} |
447 |
|
448 |
void OPPROTO op_sarl_T1_T0_cc(void) |
449 |
{ |
450 |
int shift;
|
451 |
shift = T0 & 0xff;
|
452 |
if (shift >= 32) { |
453 |
env->CF = (T1 >> 31) & 1; |
454 |
T1 = (int32_t)T1 >> 31;
|
455 |
} else if (shift != 0) { |
456 |
env->CF = (T1 >> (shift - 1)) & 1; |
457 |
T1 = (int32_t)T1 >> shift; |
458 |
} |
459 |
FORCE_RET(); |
460 |
} |
461 |
|
462 |
void OPPROTO op_rorl_T1_T0_cc(void) |
463 |
{ |
464 |
int shift1, shift;
|
465 |
shift1 = T0 & 0xff;
|
466 |
shift = shift1 & 0x1f;
|
467 |
if (shift == 0) { |
468 |
if (shift1 != 0) |
469 |
env->CF = (T1 >> 31) & 1; |
470 |
} else {
|
471 |
env->CF = (T1 >> (shift - 1)) & 1; |
472 |
T1 = ((uint32_t)T1 >> shift) | (T1 << (32 - shift));
|
473 |
} |
474 |
FORCE_RET(); |
475 |
} |
476 |
|
477 |
/* misc */
|
478 |
#define SIGNBIT (uint32_t)0x80000000 |
479 |
/* saturating arithmetic */
|
480 |
void OPPROTO op_addl_T0_T1_setq(void) |
481 |
{ |
482 |
uint32_t res; |
483 |
|
484 |
res = T0 + T1; |
485 |
if (((res ^ T0) & SIGNBIT) && !((T0 ^ T1) & SIGNBIT))
|
486 |
env->QF = 1;
|
487 |
|
488 |
T0 = res; |
489 |
FORCE_RET(); |
490 |
} |
491 |
|
492 |
void OPPROTO op_addl_T0_T1_saturate(void) |
493 |
{ |
494 |
uint32_t res; |
495 |
|
496 |
res = T0 + T1; |
497 |
if (((res ^ T0) & SIGNBIT) && !((T0 ^ T1) & SIGNBIT)) {
|
498 |
env->QF = 1;
|
499 |
if (T0 & SIGNBIT)
|
500 |
T0 = 0x80000000;
|
501 |
else
|
502 |
T0 = 0x7fffffff;
|
503 |
} |
504 |
else
|
505 |
T0 = res; |
506 |
|
507 |
FORCE_RET(); |
508 |
} |
509 |
|
510 |
void OPPROTO op_subl_T0_T1_saturate(void) |
511 |
{ |
512 |
uint32_t res; |
513 |
|
514 |
res = T0 - T1; |
515 |
if (((res ^ T0) & SIGNBIT) && ((T0 ^ T1) & SIGNBIT)) {
|
516 |
env->QF = 1;
|
517 |
if (T0 & SIGNBIT)
|
518 |
T0 = 0x80000000;
|
519 |
else
|
520 |
T0 = 0x7fffffff;
|
521 |
} |
522 |
else
|
523 |
T0 = res; |
524 |
|
525 |
FORCE_RET(); |
526 |
} |
527 |
|
528 |
void OPPROTO op_double_T1_saturate(void) |
529 |
{ |
530 |
int32_t val; |
531 |
|
532 |
val = T1; |
533 |
if (val >= 0x40000000) { |
534 |
T1 = 0x7fffffff;
|
535 |
env->QF = 1;
|
536 |
} else if (val <= (int32_t)0xc0000000) { |
537 |
T1 = 0x80000000;
|
538 |
env->QF = 1;
|
539 |
} else {
|
540 |
T1 = val << 1;
|
541 |
} |
542 |
FORCE_RET(); |
543 |
} |
544 |
|
545 |
/* Unsigned saturating arithmetic for NEON. */
|
546 |
void OPPROTO op_addl_T0_T1_usaturate(void) |
547 |
{ |
548 |
uint32_t res; |
549 |
|
550 |
res = T0 + T1; |
551 |
if (res < T0) {
|
552 |
env->QF = 1;
|
553 |
T0 = 0xffffffff;
|
554 |
} else {
|
555 |
T0 = res; |
556 |
} |
557 |
|
558 |
FORCE_RET(); |
559 |
} |
560 |
|
561 |
void OPPROTO op_subl_T0_T1_usaturate(void) |
562 |
{ |
563 |
uint32_t res; |
564 |
|
565 |
res = T0 - T1; |
566 |
if (res > T0) {
|
567 |
env->QF = 1;
|
568 |
T0 = 0;
|
569 |
} else {
|
570 |
T0 = res; |
571 |
} |
572 |
|
573 |
FORCE_RET(); |
574 |
} |
575 |
|
576 |
/* Thumb shift by immediate */
|
577 |
void OPPROTO op_shll_T0_im_thumb_cc(void) |
578 |
{ |
579 |
int shift;
|
580 |
shift = PARAM1; |
581 |
if (shift != 0) { |
582 |
env->CF = (T0 >> (32 - shift)) & 1; |
583 |
T0 = T0 << shift; |
584 |
} |
585 |
env->NZF = T0; |
586 |
FORCE_RET(); |
587 |
} |
588 |
|
589 |
void OPPROTO op_shll_T0_im_thumb(void) |
590 |
{ |
591 |
T0 = T0 << PARAM1; |
592 |
FORCE_RET(); |
593 |
} |
594 |
|
595 |
void OPPROTO op_shrl_T0_im_thumb_cc(void) |
596 |
{ |
597 |
int shift;
|
598 |
|
599 |
shift = PARAM1; |
600 |
if (shift == 0) { |
601 |
env->CF = ((uint32_t)T0) >> 31;
|
602 |
T0 = 0;
|
603 |
} else {
|
604 |
env->CF = (T0 >> (shift - 1)) & 1; |
605 |
T0 = T0 >> shift; |
606 |
} |
607 |
env->NZF = T0; |
608 |
FORCE_RET(); |
609 |
} |
610 |
|
611 |
void OPPROTO op_shrl_T0_im_thumb(void) |
612 |
{ |
613 |
int shift;
|
614 |
|
615 |
shift = PARAM1; |
616 |
if (shift == 0) { |
617 |
T0 = 0;
|
618 |
} else {
|
619 |
T0 = T0 >> shift; |
620 |
} |
621 |
FORCE_RET(); |
622 |
} |
623 |
|
624 |
void OPPROTO op_sarl_T0_im_thumb_cc(void) |
625 |
{ |
626 |
int shift;
|
627 |
|
628 |
shift = PARAM1; |
629 |
if (shift == 0) { |
630 |
T0 = ((int32_t)T0) >> 31;
|
631 |
env->CF = T0 & 1;
|
632 |
} else {
|
633 |
env->CF = (T0 >> (shift - 1)) & 1; |
634 |
T0 = ((int32_t)T0) >> shift; |
635 |
} |
636 |
env->NZF = T0; |
637 |
FORCE_RET(); |
638 |
} |
639 |
|
640 |
void OPPROTO op_sarl_T0_im_thumb(void) |
641 |
{ |
642 |
int shift;
|
643 |
|
644 |
shift = PARAM1; |
645 |
if (shift == 0) { |
646 |
env->CF = T0 & 1;
|
647 |
} else {
|
648 |
T0 = ((int32_t)T0) >> shift; |
649 |
} |
650 |
FORCE_RET(); |
651 |
} |
652 |
|
653 |
/* exceptions */
|
654 |
|
655 |
void OPPROTO op_swi(void) |
656 |
{ |
657 |
env->exception_index = EXCP_SWI; |
658 |
cpu_loop_exit(); |
659 |
} |
660 |
|
661 |
void OPPROTO op_undef_insn(void) |
662 |
{ |
663 |
env->exception_index = EXCP_UDEF; |
664 |
cpu_loop_exit(); |
665 |
} |
666 |
|
667 |
void OPPROTO op_debug(void) |
668 |
{ |
669 |
env->exception_index = EXCP_DEBUG; |
670 |
cpu_loop_exit(); |
671 |
} |
672 |
|
673 |
void OPPROTO op_wfi(void) |
674 |
{ |
675 |
env->exception_index = EXCP_HLT; |
676 |
env->halted = 1;
|
677 |
cpu_loop_exit(); |
678 |
} |
679 |
|
680 |
void OPPROTO op_bkpt(void) |
681 |
{ |
682 |
env->exception_index = EXCP_BKPT; |
683 |
cpu_loop_exit(); |
684 |
} |
685 |
|
686 |
void OPPROTO op_exception_exit(void) |
687 |
{ |
688 |
env->exception_index = EXCP_EXCEPTION_EXIT; |
689 |
cpu_loop_exit(); |
690 |
} |
691 |
|
692 |
/* VFP support. We follow the convention used for VFP instrunctions:
|
693 |
Single precition routines have a "s" suffix, double precision a
|
694 |
"d" suffix. */
|
695 |
|
696 |
#define VFP_OP(name, p) void OPPROTO op_vfp_##name##p(void) |
697 |
|
698 |
#define VFP_BINOP(name) \
|
699 |
VFP_OP(name, s) \ |
700 |
{ \ |
701 |
FT0s = float32_ ## name (FT0s, FT1s, &env->vfp.fp_status); \ |
702 |
} \ |
703 |
VFP_OP(name, d) \ |
704 |
{ \ |
705 |
FT0d = float64_ ## name (FT0d, FT1d, &env->vfp.fp_status); \ |
706 |
} |
707 |
VFP_BINOP(add) |
708 |
VFP_BINOP(sub) |
709 |
VFP_BINOP(mul) |
710 |
VFP_BINOP(div) |
711 |
#undef VFP_BINOP
|
712 |
|
713 |
#define VFP_HELPER(name) \
|
714 |
VFP_OP(name, s) \ |
715 |
{ \ |
716 |
do_vfp_##name##s(); \ |
717 |
} \ |
718 |
VFP_OP(name, d) \ |
719 |
{ \ |
720 |
do_vfp_##name##d(); \ |
721 |
} |
722 |
VFP_HELPER(abs) |
723 |
VFP_HELPER(sqrt) |
724 |
VFP_HELPER(cmp) |
725 |
VFP_HELPER(cmpe) |
726 |
#undef VFP_HELPER
|
727 |
|
728 |
/* XXX: Will this do the right thing for NANs. Should invert the signbit
|
729 |
without looking at the rest of the value. */
|
730 |
VFP_OP(neg, s) |
731 |
{ |
732 |
FT0s = float32_chs(FT0s); |
733 |
} |
734 |
|
735 |
VFP_OP(neg, d) |
736 |
{ |
737 |
FT0d = float64_chs(FT0d); |
738 |
} |
739 |
|
740 |
VFP_OP(F1_ld0, s) |
741 |
{ |
742 |
union {
|
743 |
uint32_t i; |
744 |
float32 s; |
745 |
} v; |
746 |
v.i = 0;
|
747 |
FT1s = v.s; |
748 |
} |
749 |
|
750 |
VFP_OP(F1_ld0, d) |
751 |
{ |
752 |
union {
|
753 |
uint64_t i; |
754 |
float64 d; |
755 |
} v; |
756 |
v.i = 0;
|
757 |
FT1d = v.d; |
758 |
} |
759 |
|
760 |
/* Helper routines to perform bitwise copies between float and int. */
|
761 |
static inline float32 vfp_itos(uint32_t i) |
762 |
{ |
763 |
union {
|
764 |
uint32_t i; |
765 |
float32 s; |
766 |
} v; |
767 |
|
768 |
v.i = i; |
769 |
return v.s;
|
770 |
} |
771 |
|
772 |
static inline uint32_t vfp_stoi(float32 s) |
773 |
{ |
774 |
union {
|
775 |
uint32_t i; |
776 |
float32 s; |
777 |
} v; |
778 |
|
779 |
v.s = s; |
780 |
return v.i;
|
781 |
} |
782 |
|
783 |
static inline float64 vfp_itod(uint64_t i) |
784 |
{ |
785 |
union {
|
786 |
uint64_t i; |
787 |
float64 d; |
788 |
} v; |
789 |
|
790 |
v.i = i; |
791 |
return v.d;
|
792 |
} |
793 |
|
794 |
static inline uint64_t vfp_dtoi(float64 d) |
795 |
{ |
796 |
union {
|
797 |
uint64_t i; |
798 |
float64 d; |
799 |
} v; |
800 |
|
801 |
v.d = d; |
802 |
return v.i;
|
803 |
} |
804 |
|
805 |
/* Integer to float conversion. */
|
806 |
VFP_OP(uito, s) |
807 |
{ |
808 |
FT0s = uint32_to_float32(vfp_stoi(FT0s), &env->vfp.fp_status); |
809 |
} |
810 |
|
811 |
VFP_OP(uito, d) |
812 |
{ |
813 |
FT0d = uint32_to_float64(vfp_stoi(FT0s), &env->vfp.fp_status); |
814 |
} |
815 |
|
816 |
VFP_OP(sito, s) |
817 |
{ |
818 |
FT0s = int32_to_float32(vfp_stoi(FT0s), &env->vfp.fp_status); |
819 |
} |
820 |
|
821 |
VFP_OP(sito, d) |
822 |
{ |
823 |
FT0d = int32_to_float64(vfp_stoi(FT0s), &env->vfp.fp_status); |
824 |
} |
825 |
|
826 |
/* Float to integer conversion. */
|
827 |
VFP_OP(toui, s) |
828 |
{ |
829 |
FT0s = vfp_itos(float32_to_uint32(FT0s, &env->vfp.fp_status)); |
830 |
} |
831 |
|
832 |
VFP_OP(toui, d) |
833 |
{ |
834 |
FT0s = vfp_itos(float64_to_uint32(FT0d, &env->vfp.fp_status)); |
835 |
} |
836 |
|
837 |
VFP_OP(tosi, s) |
838 |
{ |
839 |
FT0s = vfp_itos(float32_to_int32(FT0s, &env->vfp.fp_status)); |
840 |
} |
841 |
|
842 |
VFP_OP(tosi, d) |
843 |
{ |
844 |
FT0s = vfp_itos(float64_to_int32(FT0d, &env->vfp.fp_status)); |
845 |
} |
846 |
|
847 |
/* TODO: Set rounding mode properly. */
|
848 |
VFP_OP(touiz, s) |
849 |
{ |
850 |
FT0s = vfp_itos(float32_to_uint32_round_to_zero(FT0s, &env->vfp.fp_status)); |
851 |
} |
852 |
|
853 |
VFP_OP(touiz, d) |
854 |
{ |
855 |
FT0s = vfp_itos(float64_to_uint32_round_to_zero(FT0d, &env->vfp.fp_status)); |
856 |
} |
857 |
|
858 |
VFP_OP(tosiz, s) |
859 |
{ |
860 |
FT0s = vfp_itos(float32_to_int32_round_to_zero(FT0s, &env->vfp.fp_status)); |
861 |
} |
862 |
|
863 |
VFP_OP(tosiz, d) |
864 |
{ |
865 |
FT0s = vfp_itos(float64_to_int32_round_to_zero(FT0d, &env->vfp.fp_status)); |
866 |
} |
867 |
|
868 |
/* floating point conversion */
|
869 |
VFP_OP(fcvtd, s) |
870 |
{ |
871 |
FT0d = float32_to_float64(FT0s, &env->vfp.fp_status); |
872 |
} |
873 |
|
874 |
VFP_OP(fcvts, d) |
875 |
{ |
876 |
FT0s = float64_to_float32(FT0d, &env->vfp.fp_status); |
877 |
} |
878 |
|
879 |
/* VFP3 fixed point conversion. */
|
880 |
#define VFP_CONV_FIX(name, p, ftype, itype, sign) \
|
881 |
VFP_OP(name##to, p) \ |
882 |
{ \ |
883 |
ftype tmp; \ |
884 |
tmp = sign##int32_to_##ftype ((itype)vfp_##p##toi(FT0##p), \ |
885 |
&env->vfp.fp_status); \ |
886 |
FT0##p = ftype##_scalbn(tmp, PARAM1, &env->vfp.fp_status); \ |
887 |
} \ |
888 |
VFP_OP(to##name, p) \ |
889 |
{ \ |
890 |
ftype tmp; \ |
891 |
tmp = ftype##_scalbn(FT0##p, PARAM1, &env->vfp.fp_status); \ |
892 |
FT0##p = vfp_ito##p((itype)ftype##_to_##sign##int32_round_to_zero(tmp, \ |
893 |
&env->vfp.fp_status)); \ |
894 |
} |
895 |
|
896 |
VFP_CONV_FIX(sh, d, float64, int16, ) |
897 |
VFP_CONV_FIX(sl, d, float64, int32, ) |
898 |
VFP_CONV_FIX(uh, d, float64, uint16, u) |
899 |
VFP_CONV_FIX(ul, d, float64, uint32, u) |
900 |
VFP_CONV_FIX(sh, s, float32, int16, ) |
901 |
VFP_CONV_FIX(sl, s, float32, int32, ) |
902 |
VFP_CONV_FIX(uh, s, float32, uint16, u) |
903 |
VFP_CONV_FIX(ul, s, float32, uint32, u) |
904 |
|
905 |
/* Get and Put values from registers. */
|
906 |
VFP_OP(getreg_F0, d) |
907 |
{ |
908 |
FT0d = *(float64 *)((char *) env + PARAM1);
|
909 |
} |
910 |
|
911 |
VFP_OP(getreg_F0, s) |
912 |
{ |
913 |
FT0s = *(float32 *)((char *) env + PARAM1);
|
914 |
} |
915 |
|
916 |
VFP_OP(getreg_F1, d) |
917 |
{ |
918 |
FT1d = *(float64 *)((char *) env + PARAM1);
|
919 |
} |
920 |
|
921 |
VFP_OP(getreg_F1, s) |
922 |
{ |
923 |
FT1s = *(float32 *)((char *) env + PARAM1);
|
924 |
} |
925 |
|
926 |
VFP_OP(setreg_F0, d) |
927 |
{ |
928 |
*(float64 *)((char *) env + PARAM1) = FT0d;
|
929 |
} |
930 |
|
931 |
VFP_OP(setreg_F0, s) |
932 |
{ |
933 |
*(float32 *)((char *) env + PARAM1) = FT0s;
|
934 |
} |
935 |
|
936 |
void OPPROTO op_vfp_movl_T0_fpscr(void) |
937 |
{ |
938 |
do_vfp_get_fpscr (); |
939 |
} |
940 |
|
941 |
void OPPROTO op_vfp_movl_T0_fpscr_flags(void) |
942 |
{ |
943 |
T0 = env->vfp.xregs[ARM_VFP_FPSCR] & (0xf << 28); |
944 |
} |
945 |
|
946 |
void OPPROTO op_vfp_movl_fpscr_T0(void) |
947 |
{ |
948 |
do_vfp_set_fpscr(); |
949 |
} |
950 |
|
951 |
void OPPROTO op_vfp_movl_T0_xreg(void) |
952 |
{ |
953 |
T0 = env->vfp.xregs[PARAM1]; |
954 |
} |
955 |
|
956 |
void OPPROTO op_vfp_movl_xreg_T0(void) |
957 |
{ |
958 |
env->vfp.xregs[PARAM1] = T0; |
959 |
} |
960 |
|
961 |
/* Move between FT0s to T0 */
|
962 |
void OPPROTO op_vfp_mrs(void) |
963 |
{ |
964 |
T0 = vfp_stoi(FT0s); |
965 |
} |
966 |
|
967 |
void OPPROTO op_vfp_msr(void) |
968 |
{ |
969 |
FT0s = vfp_itos(T0); |
970 |
} |
971 |
|
972 |
/* Move between FT0d and {T0,T1} */
|
973 |
void OPPROTO op_vfp_mrrd(void) |
974 |
{ |
975 |
CPU_DoubleU u; |
976 |
|
977 |
u.d = FT0d; |
978 |
T0 = u.l.lower; |
979 |
T1 = u.l.upper; |
980 |
} |
981 |
|
982 |
void OPPROTO op_vfp_mdrr(void) |
983 |
{ |
984 |
CPU_DoubleU u; |
985 |
|
986 |
u.l.lower = T0; |
987 |
u.l.upper = T1; |
988 |
FT0d = u.d; |
989 |
} |
990 |
|
991 |
/* Load immediate. PARAM1 is the 32 most significant bits of the value. */
|
992 |
void OPPROTO op_vfp_fconstd(void) |
993 |
{ |
994 |
CPU_DoubleU u; |
995 |
u.l.upper = PARAM1; |
996 |
u.l.lower = 0;
|
997 |
FT0d = u.d; |
998 |
} |
999 |
|
1000 |
void OPPROTO op_vfp_fconsts(void) |
1001 |
{ |
1002 |
FT0s = vfp_itos(PARAM1); |
1003 |
} |
1004 |
|
1005 |
/* Copy the most significant bit of T0 to all bits of T1. */
|
1006 |
void OPPROTO op_signbit_T1_T0(void) |
1007 |
{ |
1008 |
T1 = (int32_t)T0 >> 31;
|
1009 |
} |
1010 |
|
1011 |
void OPPROTO op_movl_cp_T0(void) |
1012 |
{ |
1013 |
helper_set_cp(env, PARAM1, T0); |
1014 |
FORCE_RET(); |
1015 |
} |
1016 |
|
1017 |
void OPPROTO op_movl_T0_cp(void) |
1018 |
{ |
1019 |
T0 = helper_get_cp(env, PARAM1); |
1020 |
FORCE_RET(); |
1021 |
} |
1022 |
|
1023 |
void OPPROTO op_movl_cp15_T0(void) |
1024 |
{ |
1025 |
helper_set_cp15(env, PARAM1, T0); |
1026 |
FORCE_RET(); |
1027 |
} |
1028 |
|
1029 |
void OPPROTO op_movl_T0_cp15(void) |
1030 |
{ |
1031 |
T0 = helper_get_cp15(env, PARAM1); |
1032 |
FORCE_RET(); |
1033 |
} |
1034 |
|
1035 |
/* Access to user mode registers from privileged modes. */
|
1036 |
void OPPROTO op_movl_T0_user(void) |
1037 |
{ |
1038 |
int regno = PARAM1;
|
1039 |
if (regno == 13) { |
1040 |
T0 = env->banked_r13[0];
|
1041 |
} else if (regno == 14) { |
1042 |
T0 = env->banked_r14[0];
|
1043 |
} else if ((env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) { |
1044 |
T0 = env->usr_regs[regno - 8];
|
1045 |
} else {
|
1046 |
T0 = env->regs[regno]; |
1047 |
} |
1048 |
FORCE_RET(); |
1049 |
} |
1050 |
|
1051 |
|
1052 |
void OPPROTO op_movl_user_T0(void) |
1053 |
{ |
1054 |
int regno = PARAM1;
|
1055 |
if (regno == 13) { |
1056 |
env->banked_r13[0] = T0;
|
1057 |
} else if (regno == 14) { |
1058 |
env->banked_r14[0] = T0;
|
1059 |
} else if ((env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) { |
1060 |
env->usr_regs[regno - 8] = T0;
|
1061 |
} else {
|
1062 |
env->regs[regno] = T0; |
1063 |
} |
1064 |
FORCE_RET(); |
1065 |
} |
1066 |
|
1067 |
/* ARMv6 Media instructions. */
|
1068 |
|
1069 |
/* Note that signed overflow is undefined in C. The following routines are
|
1070 |
careful to use unsigned types where modulo arithmetic is required.
|
1071 |
Failure to do so _will_ break on newer gcc. */
|
1072 |
|
1073 |
/* Signed saturating arithmetic. */
|
1074 |
|
1075 |
/* Perform 16-bit signed satruating addition. */
|
1076 |
static inline uint16_t add16_sat(uint16_t a, uint16_t b) |
1077 |
{ |
1078 |
uint16_t res; |
1079 |
|
1080 |
res = a + b; |
1081 |
if (((res ^ a) & 0x8000) && !((a ^ b) & 0x8000)) { |
1082 |
if (a & 0x8000) |
1083 |
res = 0x8000;
|
1084 |
else
|
1085 |
res = 0x7fff;
|
1086 |
} |
1087 |
return res;
|
1088 |
} |
1089 |
|
1090 |
/* Perform 8-bit signed satruating addition. */
|
1091 |
static inline uint8_t add8_sat(uint8_t a, uint8_t b) |
1092 |
{ |
1093 |
uint8_t res; |
1094 |
|
1095 |
res = a + b; |
1096 |
if (((res ^ a) & 0x80) && !((a ^ b) & 0x80)) { |
1097 |
if (a & 0x80) |
1098 |
res = 0x80;
|
1099 |
else
|
1100 |
res = 0x7f;
|
1101 |
} |
1102 |
return res;
|
1103 |
} |
1104 |
|
1105 |
/* Perform 16-bit signed satruating subtraction. */
|
1106 |
static inline uint16_t sub16_sat(uint16_t a, uint16_t b) |
1107 |
{ |
1108 |
uint16_t res; |
1109 |
|
1110 |
res = a - b; |
1111 |
if (((res ^ a) & 0x8000) && ((a ^ b) & 0x8000)) { |
1112 |
if (a & 0x8000) |
1113 |
res = 0x8000;
|
1114 |
else
|
1115 |
res = 0x7fff;
|
1116 |
} |
1117 |
return res;
|
1118 |
} |
1119 |
|
1120 |
/* Perform 8-bit signed satruating subtraction. */
|
1121 |
static inline uint8_t sub8_sat(uint8_t a, uint8_t b) |
1122 |
{ |
1123 |
uint8_t res; |
1124 |
|
1125 |
res = a - b; |
1126 |
if (((res ^ a) & 0x80) && ((a ^ b) & 0x80)) { |
1127 |
if (a & 0x80) |
1128 |
res = 0x80;
|
1129 |
else
|
1130 |
res = 0x7f;
|
1131 |
} |
1132 |
return res;
|
1133 |
} |
1134 |
|
1135 |
#define ADD16(a, b, n) RESULT(add16_sat(a, b), n, 16); |
1136 |
#define SUB16(a, b, n) RESULT(sub16_sat(a, b), n, 16); |
1137 |
#define ADD8(a, b, n) RESULT(add8_sat(a, b), n, 8); |
1138 |
#define SUB8(a, b, n) RESULT(sub8_sat(a, b), n, 8); |
1139 |
#define PFX q
|
1140 |
|
1141 |
#include "op_addsub.h" |
1142 |
|
1143 |
/* Unsigned saturating arithmetic. */
|
1144 |
static inline uint16_t add16_usat(uint16_t a, uint8_t b) |
1145 |
{ |
1146 |
uint16_t res; |
1147 |
res = a + b; |
1148 |
if (res < a)
|
1149 |
res = 0xffff;
|
1150 |
return res;
|
1151 |
} |
1152 |
|
1153 |
static inline uint16_t sub16_usat(uint16_t a, uint8_t b) |
1154 |
{ |
1155 |
if (a < b)
|
1156 |
return a - b;
|
1157 |
else
|
1158 |
return 0; |
1159 |
} |
1160 |
|
1161 |
static inline uint8_t add8_usat(uint8_t a, uint8_t b) |
1162 |
{ |
1163 |
uint8_t res; |
1164 |
res = a + b; |
1165 |
if (res < a)
|
1166 |
res = 0xff;
|
1167 |
return res;
|
1168 |
} |
1169 |
|
1170 |
static inline uint8_t sub8_usat(uint8_t a, uint8_t b) |
1171 |
{ |
1172 |
if (a < b)
|
1173 |
return a - b;
|
1174 |
else
|
1175 |
return 0; |
1176 |
} |
1177 |
|
1178 |
#define ADD16(a, b, n) RESULT(add16_usat(a, b), n, 16); |
1179 |
#define SUB16(a, b, n) RESULT(sub16_usat(a, b), n, 16); |
1180 |
#define ADD8(a, b, n) RESULT(add8_usat(a, b), n, 8); |
1181 |
#define SUB8(a, b, n) RESULT(sub8_usat(a, b), n, 8); |
1182 |
#define PFX uq
|
1183 |
|
1184 |
#include "op_addsub.h" |
1185 |
|
1186 |
/* Signed modulo arithmetic. */
|
1187 |
#define SARITH16(a, b, n, op) do { \ |
1188 |
int32_t sum; \ |
1189 |
sum = (int16_t)((uint16_t)(a) op (uint16_t)(b)); \ |
1190 |
RESULT(sum, n, 16); \
|
1191 |
if (sum >= 0) \ |
1192 |
ge |= 3 << (n * 2); \ |
1193 |
} while(0) |
1194 |
|
1195 |
#define SARITH8(a, b, n, op) do { \ |
1196 |
int32_t sum; \ |
1197 |
sum = (int8_t)((uint8_t)(a) op (uint8_t)(b)); \ |
1198 |
RESULT(sum, n, 8); \
|
1199 |
if (sum >= 0) \ |
1200 |
ge |= 1 << n; \
|
1201 |
} while(0) |
1202 |
|
1203 |
|
1204 |
#define ADD16(a, b, n) SARITH16(a, b, n, +)
|
1205 |
#define SUB16(a, b, n) SARITH16(a, b, n, -)
|
1206 |
#define ADD8(a, b, n) SARITH8(a, b, n, +)
|
1207 |
#define SUB8(a, b, n) SARITH8(a, b, n, -)
|
1208 |
#define PFX s
|
1209 |
#define ARITH_GE
|
1210 |
|
1211 |
#include "op_addsub.h" |
1212 |
|
1213 |
/* Unsigned modulo arithmetic. */
|
1214 |
#define ADD16(a, b, n) do { \ |
1215 |
uint32_t sum; \ |
1216 |
sum = (uint32_t)(uint16_t)(a) + (uint32_t)(uint16_t)(b); \ |
1217 |
RESULT(sum, n, 16); \
|
1218 |
if ((sum >> 16) == 0) \ |
1219 |
ge |= 3 << (n * 2); \ |
1220 |
} while(0) |
1221 |
|
1222 |
#define ADD8(a, b, n) do { \ |
1223 |
uint32_t sum; \ |
1224 |
sum = (uint32_t)(uint8_t)(a) + (uint32_t)(uint8_t)(b); \ |
1225 |
RESULT(sum, n, 8); \
|
1226 |
if ((sum >> 8) == 0) \ |
1227 |
ge |= 3 << (n * 2); \ |
1228 |
} while(0) |
1229 |
|
1230 |
#define SUB16(a, b, n) do { \ |
1231 |
uint32_t sum; \ |
1232 |
sum = (uint32_t)(uint16_t)(a) - (uint32_t)(uint16_t)(b); \ |
1233 |
RESULT(sum, n, 16); \
|
1234 |
if ((sum >> 16) == 0) \ |
1235 |
ge |= 3 << (n * 2); \ |
1236 |
} while(0) |
1237 |
|
1238 |
#define SUB8(a, b, n) do { \ |
1239 |
uint32_t sum; \ |
1240 |
sum = (uint32_t)(uint8_t)(a) - (uint32_t)(uint8_t)(b); \ |
1241 |
RESULT(sum, n, 8); \
|
1242 |
if ((sum >> 8) == 0) \ |
1243 |
ge |= 3 << (n * 2); \ |
1244 |
} while(0) |
1245 |
|
1246 |
#define PFX u
|
1247 |
#define ARITH_GE
|
1248 |
|
1249 |
#include "op_addsub.h" |
1250 |
|
1251 |
/* Halved signed arithmetic. */
|
1252 |
#define ADD16(a, b, n) \
|
1253 |
RESULT(((int32_t)(int16_t)(a) + (int32_t)(int16_t)(b)) >> 1, n, 16) |
1254 |
#define SUB16(a, b, n) \
|
1255 |
RESULT(((int32_t)(int16_t)(a) - (int32_t)(int16_t)(b)) >> 1, n, 16) |
1256 |
#define ADD8(a, b, n) \
|
1257 |
RESULT(((int32_t)(int8_t)(a) + (int32_t)(int8_t)(b)) >> 1, n, 8) |
1258 |
#define SUB8(a, b, n) \
|
1259 |
RESULT(((int32_t)(int8_t)(a) - (int32_t)(int8_t)(b)) >> 1, n, 8) |
1260 |
#define PFX sh
|
1261 |
|
1262 |
#include "op_addsub.h" |
1263 |
|
1264 |
/* Halved unsigned arithmetic. */
|
1265 |
#define ADD16(a, b, n) \
|
1266 |
RESULT(((uint32_t)(uint16_t)(a) + (uint32_t)(uint16_t)(b)) >> 1, n, 16) |
1267 |
#define SUB16(a, b, n) \
|
1268 |
RESULT(((uint32_t)(uint16_t)(a) - (uint32_t)(uint16_t)(b)) >> 1, n, 16) |
1269 |
#define ADD8(a, b, n) \
|
1270 |
RESULT(((uint32_t)(uint8_t)(a) + (uint32_t)(uint8_t)(b)) >> 1, n, 8) |
1271 |
#define SUB8(a, b, n) \
|
1272 |
RESULT(((uint32_t)(uint8_t)(a) - (uint32_t)(uint8_t)(b)) >> 1, n, 8) |
1273 |
#define PFX uh
|
1274 |
|
1275 |
#include "op_addsub.h" |
1276 |
|
1277 |
void OPPROTO op_pkhtb_T0_T1(void) |
1278 |
{ |
1279 |
T0 = (T0 & 0xffff0000) | (T1 & 0xffff); |
1280 |
} |
1281 |
|
1282 |
void OPPROTO op_pkhbt_T0_T1(void) |
1283 |
{ |
1284 |
T0 = (T0 & 0xffff) | (T1 & 0xffff0000); |
1285 |
} |
1286 |
void OPPROTO op_rev_T0(void) |
1287 |
{ |
1288 |
T0 = ((T0 & 0xff000000) >> 24) |
1289 |
| ((T0 & 0x00ff0000) >> 8) |
1290 |
| ((T0 & 0x0000ff00) << 8) |
1291 |
| ((T0 & 0x000000ff) << 24); |
1292 |
} |
1293 |
|
1294 |
void OPPROTO op_revh_T0(void) |
1295 |
{ |
1296 |
T0 = (T0 >> 16) | (T0 << 16); |
1297 |
} |
1298 |
|
1299 |
void OPPROTO op_rev16_T0(void) |
1300 |
{ |
1301 |
T0 = ((T0 & 0xff000000) >> 8) |
1302 |
| ((T0 & 0x00ff0000) << 8) |
1303 |
| ((T0 & 0x0000ff00) >> 8) |
1304 |
| ((T0 & 0x000000ff) << 8); |
1305 |
} |
1306 |
|
1307 |
void OPPROTO op_revsh_T0(void) |
1308 |
{ |
1309 |
T0 = (int16_t)( ((T0 & 0x0000ff00) >> 8) |
1310 |
| ((T0 & 0x000000ff) << 8)); |
1311 |
} |
1312 |
|
1313 |
void OPPROTO op_rbit_T0(void) |
1314 |
{ |
1315 |
T0 = ((T0 & 0xff000000) >> 24) |
1316 |
| ((T0 & 0x00ff0000) >> 8) |
1317 |
| ((T0 & 0x0000ff00) << 8) |
1318 |
| ((T0 & 0x000000ff) << 24); |
1319 |
T0 = ((T0 & 0xf0f0f0f0) >> 4) |
1320 |
| ((T0 & 0x0f0f0f0f) << 4); |
1321 |
T0 = ((T0 & 0x88888888) >> 3) |
1322 |
| ((T0 & 0x44444444) >> 1) |
1323 |
| ((T0 & 0x22222222) << 1) |
1324 |
| ((T0 & 0x11111111) << 3); |
1325 |
} |
1326 |
|
1327 |
/* Swap low and high halfwords. */
|
1328 |
void OPPROTO op_swap_half_T1(void) |
1329 |
{ |
1330 |
T1 = (T1 >> 16) | (T1 << 16); |
1331 |
FORCE_RET(); |
1332 |
} |
1333 |
|
1334 |
/* Dual 16-bit signed multiply. */
|
1335 |
void OPPROTO op_mul_dual_T0_T1(void) |
1336 |
{ |
1337 |
int32_t low; |
1338 |
int32_t high; |
1339 |
low = (int32_t)(int16_t)T0 * (int32_t)(int16_t)T1; |
1340 |
high = (((int32_t)T0) >> 16) * (((int32_t)T1) >> 16); |
1341 |
T0 = low; |
1342 |
T1 = high; |
1343 |
} |
1344 |
|
1345 |
void OPPROTO op_sel_T0_T1(void) |
1346 |
{ |
1347 |
uint32_t mask; |
1348 |
uint32_t flags; |
1349 |
|
1350 |
flags = env->GE; |
1351 |
mask = 0;
|
1352 |
if (flags & 1) |
1353 |
mask |= 0xff;
|
1354 |
if (flags & 2) |
1355 |
mask |= 0xff00;
|
1356 |
if (flags & 4) |
1357 |
mask |= 0xff0000;
|
1358 |
if (flags & 8) |
1359 |
mask |= 0xff000000;
|
1360 |
T0 = (T0 & mask) | (T1 & ~mask); |
1361 |
FORCE_RET(); |
1362 |
} |
1363 |
|
1364 |
void OPPROTO op_roundqd_T0_T1(void) |
1365 |
{ |
1366 |
T0 = T1 + ((uint32_t)T0 >> 31);
|
1367 |
} |
1368 |
|
1369 |
/* Signed saturation. */
|
1370 |
static inline uint32_t do_ssat(int32_t val, int shift) |
1371 |
{ |
1372 |
int32_t top; |
1373 |
uint32_t mask; |
1374 |
|
1375 |
shift = PARAM1; |
1376 |
top = val >> shift; |
1377 |
mask = (1u << shift) - 1; |
1378 |
if (top > 0) { |
1379 |
env->QF = 1;
|
1380 |
return mask;
|
1381 |
} else if (top < -1) { |
1382 |
env->QF = 1;
|
1383 |
return ~mask;
|
1384 |
} |
1385 |
return val;
|
1386 |
} |
1387 |
|
1388 |
/* Unsigned saturation. */
|
1389 |
static inline uint32_t do_usat(int32_t val, int shift) |
1390 |
{ |
1391 |
uint32_t max; |
1392 |
|
1393 |
shift = PARAM1; |
1394 |
max = (1u << shift) - 1; |
1395 |
if (val < 0) { |
1396 |
env->QF = 1;
|
1397 |
return 0; |
1398 |
} else if (val > max) { |
1399 |
env->QF = 1;
|
1400 |
return max;
|
1401 |
} |
1402 |
return val;
|
1403 |
} |
1404 |
|
1405 |
/* Signed saturate. */
|
1406 |
void OPPROTO op_ssat_T1(void) |
1407 |
{ |
1408 |
T0 = do_ssat(T0, PARAM1); |
1409 |
FORCE_RET(); |
1410 |
} |
1411 |
|
1412 |
/* Dual halfword signed saturate. */
|
1413 |
void OPPROTO op_ssat16_T1(void) |
1414 |
{ |
1415 |
uint32_t res; |
1416 |
|
1417 |
res = (uint16_t)do_ssat((int16_t)T0, PARAM1); |
1418 |
res |= do_ssat(((int32_t)T0) >> 16, PARAM1) << 16; |
1419 |
T0 = res; |
1420 |
FORCE_RET(); |
1421 |
} |
1422 |
|
1423 |
/* Unsigned saturate. */
|
1424 |
void OPPROTO op_usat_T1(void) |
1425 |
{ |
1426 |
T0 = do_usat(T0, PARAM1); |
1427 |
FORCE_RET(); |
1428 |
} |
1429 |
|
1430 |
/* Dual halfword unsigned saturate. */
|
1431 |
void OPPROTO op_usat16_T1(void) |
1432 |
{ |
1433 |
uint32_t res; |
1434 |
|
1435 |
res = (uint16_t)do_usat((int16_t)T0, PARAM1); |
1436 |
res |= do_usat(((int32_t)T0) >> 16, PARAM1) << 16; |
1437 |
T0 = res; |
1438 |
FORCE_RET(); |
1439 |
} |
1440 |
|
1441 |
/* Dual 16-bit add. */
|
1442 |
static inline uint8_t do_usad(uint8_t a, uint8_t b) |
1443 |
{ |
1444 |
if (a > b)
|
1445 |
return a - b;
|
1446 |
else
|
1447 |
return b - a;
|
1448 |
} |
1449 |
|
1450 |
/* Unsigned sum of absolute byte differences. */
|
1451 |
void OPPROTO op_usad8_T0_T1(void) |
1452 |
{ |
1453 |
uint32_t sum; |
1454 |
sum = do_usad(T0, T1); |
1455 |
sum += do_usad(T0 >> 8, T1 >> 8); |
1456 |
sum += do_usad(T0 >> 16, T1 >>16); |
1457 |
sum += do_usad(T0 >> 24, T1 >> 24); |
1458 |
T0 = sum; |
1459 |
} |
1460 |
|
1461 |
/* Thumb-2 instructions. */
|
1462 |
|
1463 |
/* Insert T1 into T0. Result goes in T1. */
|
1464 |
void OPPROTO op_bfi_T1_T0(void) |
1465 |
{ |
1466 |
int shift = PARAM1;
|
1467 |
uint32_t mask = PARAM2; |
1468 |
uint32_t bits; |
1469 |
|
1470 |
bits = (T1 << shift) & mask; |
1471 |
T1 = (T0 & ~mask) | bits; |
1472 |
} |
1473 |
|
1474 |
/* Unsigned bitfield extract. */
|
1475 |
void OPPROTO op_ubfx_T1(void) |
1476 |
{ |
1477 |
uint32_t shift = PARAM1; |
1478 |
uint32_t mask = PARAM2; |
1479 |
|
1480 |
T1 >>= shift; |
1481 |
T1 &= mask; |
1482 |
} |
1483 |
|
1484 |
/* Signed bitfield extract. */
|
1485 |
void OPPROTO op_sbfx_T1(void) |
1486 |
{ |
1487 |
uint32_t shift = PARAM1; |
1488 |
uint32_t width = PARAM2; |
1489 |
int32_t val; |
1490 |
|
1491 |
val = T1 << (32 - (shift + width));
|
1492 |
T1 = val >> (32 - width);
|
1493 |
} |
1494 |
|
1495 |
void OPPROTO op_movtop_T0_im(void) |
1496 |
{ |
1497 |
T0 = (T0 & 0xffff) | PARAM1;
|
1498 |
} |
1499 |
|
1500 |
/* Used by table branch instructions. */
|
1501 |
void OPPROTO op_jmp_T0_im(void) |
1502 |
{ |
1503 |
env->regs[15] = PARAM1 + (T0 << 1); |
1504 |
} |
1505 |
|
1506 |
void OPPROTO op_set_condexec(void) |
1507 |
{ |
1508 |
env->condexec_bits = PARAM1; |
1509 |
} |
1510 |
|
1511 |
void OPPROTO op_sdivl_T0_T1(void) |
1512 |
{ |
1513 |
int32_t num; |
1514 |
int32_t den; |
1515 |
num = T0; |
1516 |
den = T1; |
1517 |
if (den == 0) |
1518 |
T0 = 0;
|
1519 |
else
|
1520 |
T0 = num / den; |
1521 |
FORCE_RET(); |
1522 |
} |
1523 |
|
1524 |
void OPPROTO op_udivl_T0_T1(void) |
1525 |
{ |
1526 |
uint32_t num; |
1527 |
uint32_t den; |
1528 |
num = T0; |
1529 |
den = T1; |
1530 |
if (den == 0) |
1531 |
T0 = 0;
|
1532 |
else
|
1533 |
T0 = num / den; |
1534 |
FORCE_RET(); |
1535 |
} |
1536 |
|
1537 |
void OPPROTO op_movl_T1_r13_banked(void) |
1538 |
{ |
1539 |
T1 = helper_get_r13_banked(env, PARAM1); |
1540 |
} |
1541 |
|
1542 |
void OPPROTO op_movl_r13_T1_banked(void) |
1543 |
{ |
1544 |
helper_set_r13_banked(env, PARAM1, T1); |
1545 |
} |
1546 |
|
1547 |
void OPPROTO op_v7m_mrs_T0(void) |
1548 |
{ |
1549 |
T0 = helper_v7m_mrs(env, PARAM1); |
1550 |
} |
1551 |
|
1552 |
void OPPROTO op_v7m_msr_T0(void) |
1553 |
{ |
1554 |
helper_v7m_msr(env, PARAM1, T0); |
1555 |
} |
1556 |
|
1557 |
void OPPROTO op_movl_T0_sp(void) |
1558 |
{ |
1559 |
if (PARAM1 == env->v7m.current_sp)
|
1560 |
T0 = env->regs[13];
|
1561 |
else
|
1562 |
T0 = env->v7m.other_sp; |
1563 |
FORCE_RET(); |
1564 |
} |
1565 |
|
1566 |
#include "op_neon.h" |
1567 |
|
1568 |
/* iwMMXt support */
|
1569 |
#include "op_iwmmxt.c" |