Revision f54b3f92 cpu-exec.c

b/cpu-exec.c
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                                       "o0", "o1", "o2", "o3", "o4", "o5",
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                                       "l0", "l1", "l2", "l3", "l4", "l5",
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                                       "l6", "l7");
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#elif defined(__hppa__)
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                asm volatile ("ble  0(%%sr4,%1)\n"
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                              "copy %%r31,%%r18\n"
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                              "copy %%r28,%0\n"
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                              : "=r" (T0)
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                              : "r" (gen_func)
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                              : "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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                                "r8", "r9", "r10", "r11", "r12", "r13",
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                                "r18", "r19", "r20", "r21", "r22", "r23",
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                                "r24", "r25", "r26", "r27", "r28", "r29",
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                                "r30", "r31");
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#elif defined(__arm__)
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                asm volatile ("mov pc, %0\n\t"
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                              ".global exec_loop\n\t"
......
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                             is_write, &uc->uc_sigmask, puc);
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}
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#elif defined(__hppa__)
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int cpu_signal_handler(int host_signum, void *pinfo,
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                       void *puc)
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{
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    struct siginfo *info = pinfo;
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    struct ucontext *uc = puc;
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    unsigned long pc;
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    int is_write;
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    pc = uc->uc_mcontext.sc_iaoq[0];
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    /* FIXME: compute is_write */
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    is_write = 0;
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    return handle_cpu_signal(pc, (unsigned long)info->si_addr, 
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                             is_write,
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                             &uc->uc_sigmask, puc);
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}
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#else
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#error host CPU specific signal handler needed

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