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1
/*
2
 * Tiny Code Generator for QEMU
3
 *
4
 * Copyright (c) 2008 Fabrice Bellard
5
 *
6
 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
11
 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
23
 */
24
const char *tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
25
    "%eax",
26
    "%ecx",
27
    "%edx",
28
    "%ebx",
29
    "%esp",
30
    "%ebp",
31
    "%esi",
32
    "%edi",
33
};
34

    
35
int tcg_target_reg_alloc_order[] = {
36
    TCG_REG_EAX,
37
    TCG_REG_EDX,
38
    TCG_REG_ECX,
39
    TCG_REG_EBX,
40
    TCG_REG_ESI,
41
    TCG_REG_EDI,
42
    TCG_REG_EBP,
43
    TCG_REG_ESP,
44
};
45

    
46
const int tcg_target_call_iarg_regs[3] = { TCG_REG_EAX, TCG_REG_EDX, TCG_REG_ECX };
47
const int tcg_target_call_oarg_regs[2] = { TCG_REG_EAX, TCG_REG_EDX };
48

    
49
static void patch_reloc(uint8_t *code_ptr, int type, 
50
                        tcg_target_long value, tcg_target_long addend)
51
{
52
    value += addend;
53
    switch(type) {
54
    case R_386_32:
55
        *(uint32_t *)code_ptr = value;
56
        break;
57
    case R_386_PC32:
58
        *(uint32_t *)code_ptr = value - (long)code_ptr;
59
        break;
60
    default:
61
        tcg_abort();
62
    }
63
}
64

    
65
/* maximum number of register used for input function arguments */
66
static inline int tcg_target_get_call_iarg_regs_count(int flags)
67
{
68
    flags &= TCG_CALL_TYPE_MASK;
69
    switch(flags) {
70
    case TCG_CALL_TYPE_STD:
71
        return 0;
72
    case TCG_CALL_TYPE_REGPARM_1:
73
    case TCG_CALL_TYPE_REGPARM_2:
74
    case TCG_CALL_TYPE_REGPARM:
75
        return flags - TCG_CALL_TYPE_REGPARM_1 + 1;
76
    default:
77
        tcg_abort();
78
    }
79
}
80

    
81
/* parse target specific constraints */
82
int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
83
{
84
    const char *ct_str;
85

    
86
    ct_str = *pct_str;
87
    switch(ct_str[0]) {
88
    case 'a':
89
        ct->ct |= TCG_CT_REG;
90
        tcg_regset_set_reg(ct->u.regs, TCG_REG_EAX);
91
        break;
92
    case 'b':
93
        ct->ct |= TCG_CT_REG;
94
        tcg_regset_set_reg(ct->u.regs, TCG_REG_EBX);
95
        break;
96
    case 'c':
97
        ct->ct |= TCG_CT_REG;
98
        tcg_regset_set_reg(ct->u.regs, TCG_REG_ECX);
99
        break;
100
    case 'd':
101
        ct->ct |= TCG_CT_REG;
102
        tcg_regset_set_reg(ct->u.regs, TCG_REG_EDX);
103
        break;
104
    case 'S':
105
        ct->ct |= TCG_CT_REG;
106
        tcg_regset_set_reg(ct->u.regs, TCG_REG_ESI);
107
        break;
108
    case 'D':
109
        ct->ct |= TCG_CT_REG;
110
        tcg_regset_set_reg(ct->u.regs, TCG_REG_EDI);
111
        break;
112
    case 'q':
113
        ct->ct |= TCG_CT_REG;
114
        tcg_regset_set32(ct->u.regs, 0, 0xf);
115
        break;
116
    case 'r':
117
        ct->ct |= TCG_CT_REG;
118
        tcg_regset_set32(ct->u.regs, 0, 0xff);
119
        break;
120

    
121
        /* qemu_ld/st address constraint */
122
    case 'L':
123
        ct->ct |= TCG_CT_REG;
124
        tcg_regset_set32(ct->u.regs, 0, 0xff);
125
        tcg_regset_reset_reg(ct->u.regs, TCG_REG_EAX);
126
        tcg_regset_reset_reg(ct->u.regs, TCG_REG_EDX);
127
        break;
128
    default:
129
        return -1;
130
    }
131
    ct_str++;
132
    *pct_str = ct_str;
133
    return 0;
134
}
135

    
136
/* test if a constant matches the constraint */
137
static inline int tcg_target_const_match(tcg_target_long val,
138
                                         const TCGArgConstraint *arg_ct)
139
{
140
    int ct;
141
    ct = arg_ct->ct;
142
    if (ct & TCG_CT_CONST)
143
        return 1;
144
    else
145
        return 0;
146
}
147

    
148
#define ARITH_ADD 0
149
#define ARITH_OR  1
150
#define ARITH_ADC 2
151
#define ARITH_SBB 3
152
#define ARITH_AND 4
153
#define ARITH_SUB 5
154
#define ARITH_XOR 6
155
#define ARITH_CMP 7
156

    
157
#define SHIFT_SHL 4
158
#define SHIFT_SHR 5
159
#define SHIFT_SAR 7
160

    
161
#define JCC_JMP (-1)
162
#define JCC_JO  0x0
163
#define JCC_JNO 0x1
164
#define JCC_JB  0x2
165
#define JCC_JAE 0x3
166
#define JCC_JE  0x4
167
#define JCC_JNE 0x5
168
#define JCC_JBE 0x6
169
#define JCC_JA  0x7
170
#define JCC_JS  0x8
171
#define JCC_JNS 0x9
172
#define JCC_JP  0xa
173
#define JCC_JNP 0xb
174
#define JCC_JL  0xc
175
#define JCC_JGE 0xd
176
#define JCC_JLE 0xe
177
#define JCC_JG  0xf
178

    
179
#define P_EXT   0x100 /* 0x0f opcode prefix */
180

    
181
static const uint8_t tcg_cond_to_jcc[10] = {
182
    [TCG_COND_EQ] = JCC_JE,
183
    [TCG_COND_NE] = JCC_JNE,
184
    [TCG_COND_LT] = JCC_JL,
185
    [TCG_COND_GE] = JCC_JGE,
186
    [TCG_COND_LE] = JCC_JLE,
187
    [TCG_COND_GT] = JCC_JG,
188
    [TCG_COND_LTU] = JCC_JB,
189
    [TCG_COND_GEU] = JCC_JAE,
190
    [TCG_COND_LEU] = JCC_JBE,
191
    [TCG_COND_GTU] = JCC_JA,
192
};
193

    
194
static inline void tcg_out_opc(TCGContext *s, int opc)
195
{
196
    if (opc & P_EXT)
197
        tcg_out8(s, 0x0f);
198
    tcg_out8(s, opc);
199
}
200

    
201
static inline void tcg_out_modrm(TCGContext *s, int opc, int r, int rm)
202
{
203
    tcg_out_opc(s, opc);
204
    tcg_out8(s, 0xc0 | (r << 3) | rm);
205
}
206

    
207
/* rm == -1 means no register index */
208
static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm, 
209
                                        int32_t offset)
210
{
211
    tcg_out_opc(s, opc);
212
    if (rm == -1) {
213
        tcg_out8(s, 0x05 | (r << 3));
214
        tcg_out32(s, offset);
215
    } else if (offset == 0 && rm != TCG_REG_EBP) {
216
        if (rm == TCG_REG_ESP) {
217
            tcg_out8(s, 0x04 | (r << 3));
218
            tcg_out8(s, 0x24);
219
        } else {
220
            tcg_out8(s, 0x00 | (r << 3) | rm);
221
        }
222
    } else if ((int8_t)offset == offset) {
223
        if (rm == TCG_REG_ESP) {
224
            tcg_out8(s, 0x44 | (r << 3));
225
            tcg_out8(s, 0x24);
226
        } else {
227
            tcg_out8(s, 0x40 | (r << 3) | rm);
228
        }
229
        tcg_out8(s, offset);
230
    } else {
231
        if (rm == TCG_REG_ESP) {
232
            tcg_out8(s, 0x84 | (r << 3));
233
            tcg_out8(s, 0x24);
234
        } else {
235
            tcg_out8(s, 0x80 | (r << 3) | rm);
236
        }
237
        tcg_out32(s, offset);
238
    }
239
}
240

    
241
static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
242
{
243
    if (arg != ret)
244
        tcg_out_modrm(s, 0x8b, ret, arg);
245
}
246

    
247
static inline void tcg_out_movi(TCGContext *s, TCGType type,
248
                                int ret, int32_t arg)
249
{
250
    if (arg == 0) {
251
        /* xor r0,r0 */
252
        tcg_out_modrm(s, 0x01 | (ARITH_XOR << 3), ret, ret);
253
    } else {
254
        tcg_out8(s, 0xb8 + ret);
255
        tcg_out32(s, arg);
256
    }
257
}
258

    
259
static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
260
                              int arg1, tcg_target_long arg2)
261
{
262
    /* movl */
263
    tcg_out_modrm_offset(s, 0x8b, ret, arg1, arg2);
264
}
265

    
266
static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
267
                              int arg1, tcg_target_long arg2)
268
{
269
    /* movl */
270
    tcg_out_modrm_offset(s, 0x89, arg, arg1, arg2);
271
}
272

    
273
static inline void tgen_arithi(TCGContext *s, int c, int r0, int32_t val)
274
{
275
    if (val == (int8_t)val) {
276
        tcg_out_modrm(s, 0x83, c, r0);
277
        tcg_out8(s, val);
278
    } else {
279
        tcg_out_modrm(s, 0x81, c, r0);
280
        tcg_out32(s, val);
281
    }
282
}
283

    
284
void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
285
{
286
    if (val != 0)
287
        tgen_arithi(s, ARITH_ADD, reg, val);
288
}
289

    
290
static void tcg_out_jxx(TCGContext *s, int opc, int label_index)
291
{
292
    int32_t val, val1;
293
    TCGLabel *l = &s->labels[label_index];
294
    
295
    if (l->has_value) {
296
        val = l->u.value - (tcg_target_long)s->code_ptr;
297
        val1 = val - 2;
298
        if ((int8_t)val1 == val1) {
299
            if (opc == -1)
300
                tcg_out8(s, 0xeb);
301
            else
302
                tcg_out8(s, 0x70 + opc);
303
            tcg_out8(s, val1);
304
        } else {
305
            if (opc == -1) {
306
                tcg_out8(s, 0xe9);
307
                tcg_out32(s, val - 5);
308
            } else {
309
                tcg_out8(s, 0x0f);
310
                tcg_out8(s, 0x80 + opc);
311
                tcg_out32(s, val - 6);
312
            }
313
        }
314
    } else {
315
        if (opc == -1) {
316
            tcg_out8(s, 0xe9);
317
        } else {
318
            tcg_out8(s, 0x0f);
319
            tcg_out8(s, 0x80 + opc);
320
        }
321
        tcg_out_reloc(s, s->code_ptr, R_386_PC32, label_index, -4);
322
        s->code_ptr += 4;
323
    }
324
}
325

    
326
static void tcg_out_brcond(TCGContext *s, int cond, 
327
                           TCGArg arg1, TCGArg arg2, int const_arg2,
328
                           int label_index)
329
{
330
    int c;
331
    if (const_arg2) {
332
        if (arg2 == 0) {
333
            /* use test */
334
            switch(cond) {
335
            case TCG_COND_EQ:
336
                c = JCC_JE;
337
                break;
338
            case TCG_COND_NE:
339
                c = JCC_JNE;
340
                break;
341
            case TCG_COND_LT:
342
                c = JCC_JS;
343
                break;
344
            case TCG_COND_GE:
345
                c = JCC_JNS;
346
                break;
347
            default:
348
                goto do_cmpi;
349
            }
350
            /* test r, r */
351
            tcg_out_modrm(s, 0x85, arg1, arg1);
352
            tcg_out_jxx(s, c, label_index);
353
        } else {
354
        do_cmpi:
355
            tgen_arithi(s, ARITH_CMP, arg1, arg2);
356
            tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index);
357
        }
358
    } else {
359
        tcg_out_modrm(s, 0x01 | (ARITH_CMP << 3), arg2, arg1);
360
        tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index);
361
    }
362
}
363

    
364
/* XXX: we implement it at the target level to avoid having to
365
   handle cross basic blocks temporaries */
366
static void tcg_out_brcond2(TCGContext *s,
367
                            const TCGArg *args, const int *const_args)
368
{
369
    int label_next;
370
    label_next = gen_new_label();
371
    switch(args[4]) {
372
    case TCG_COND_EQ:
373
        tcg_out_brcond(s, TCG_COND_NE, args[0], args[2], const_args[2], label_next);
374
        tcg_out_brcond(s, TCG_COND_EQ, args[1], args[3], const_args[3], args[5]);
375
        break;
376
    case TCG_COND_NE:
377
        tcg_out_brcond(s, TCG_COND_NE, args[0], args[2], const_args[2], args[5]);
378
        tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], args[5]);
379
        break;
380
    case TCG_COND_LT:
381
        tcg_out_brcond(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5]);
382
        tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
383
        tcg_out_brcond(s, TCG_COND_LT, args[0], args[2], const_args[2], args[5]);
384
        break;
385
    case TCG_COND_LE:
386
        tcg_out_brcond(s, TCG_COND_LT, args[1], args[3], const_args[3], args[5]);
387
        tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
388
        tcg_out_brcond(s, TCG_COND_LE, args[0], args[2], const_args[2], args[5]);
389
        break;
390
    case TCG_COND_GT:
391
        tcg_out_brcond(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5]);
392
        tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
393
        tcg_out_brcond(s, TCG_COND_GT, args[0], args[2], const_args[2], args[5]);
394
        break;
395
    case TCG_COND_GE:
396
        tcg_out_brcond(s, TCG_COND_GT, args[1], args[3], const_args[3], args[5]);
397
        tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
398
        tcg_out_brcond(s, TCG_COND_GE, args[0], args[2], const_args[2], args[5]);
399
        break;
400
    case TCG_COND_LTU:
401
        tcg_out_brcond(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5]);
402
        tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
403
        tcg_out_brcond(s, TCG_COND_LTU, args[0], args[2], const_args[2], args[5]);
404
        break;
405
    case TCG_COND_LEU:
406
        tcg_out_brcond(s, TCG_COND_LTU, args[1], args[3], const_args[3], args[5]);
407
        tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
408
        tcg_out_brcond(s, TCG_COND_LEU, args[0], args[2], const_args[2], args[5]);
409
        break;
410
    case TCG_COND_GTU:
411
        tcg_out_brcond(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5]);
412
        tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
413
        tcg_out_brcond(s, TCG_COND_GTU, args[0], args[2], const_args[2], args[5]);
414
        break;
415
    case TCG_COND_GEU:
416
        tcg_out_brcond(s, TCG_COND_GTU, args[1], args[3], const_args[3], args[5]);
417
        tcg_out_brcond(s, TCG_COND_NE, args[1], args[3], const_args[3], label_next);
418
        tcg_out_brcond(s, TCG_COND_GEU, args[0], args[2], const_args[2], args[5]);
419
        break;
420
    default:
421
        tcg_abort();
422
    }
423
    tcg_out_label(s, label_next, (tcg_target_long)s->code_ptr);
424
}
425

    
426
#if defined(CONFIG_SOFTMMU)
427
extern void __ldb_mmu(void);
428
extern void __ldw_mmu(void);
429
extern void __ldl_mmu(void);
430
extern void __ldq_mmu(void);
431

    
432
extern void __stb_mmu(void);
433
extern void __stw_mmu(void);
434
extern void __stl_mmu(void);
435
extern void __stq_mmu(void);
436

    
437
static void *qemu_ld_helpers[4] = {
438
    __ldb_mmu,
439
    __ldw_mmu,
440
    __ldl_mmu,
441
    __ldq_mmu,
442
};
443

    
444
static void *qemu_st_helpers[4] = {
445
    __stb_mmu,
446
    __stw_mmu,
447
    __stl_mmu,
448
    __stq_mmu,
449
};
450
#endif
451

    
452
/* XXX: qemu_ld and qemu_st could be modified to clobber only EDX and
453
   EAX. It will be useful once fixed registers globals are less
454
   common. */
455
static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
456
                            int opc)
457
{
458
    int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap;
459
#if defined(CONFIG_SOFTMMU)
460
    uint8_t *label1_ptr, *label2_ptr;
461
#endif
462
#if TARGET_LONG_BITS == 64
463
#if defined(CONFIG_SOFTMMU)
464
    uint8_t *label3_ptr;
465
#endif
466
    int addr_reg2;
467
#endif
468

    
469
    data_reg = *args++;
470
    if (opc == 3)
471
        data_reg2 = *args++;
472
    else
473
        data_reg2 = 0;
474
    addr_reg = *args++;
475
#if TARGET_LONG_BITS == 64
476
    addr_reg2 = *args++;
477
#endif
478
    mem_index = *args;
479
    s_bits = opc & 3;
480

    
481
    r0 = TCG_REG_EAX;
482
    r1 = TCG_REG_EDX;
483

    
484
#if defined(CONFIG_SOFTMMU)
485
    tcg_out_mov(s, r1, addr_reg); 
486

    
487
    tcg_out_mov(s, r0, addr_reg); 
488
 
489
    tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
490
    tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); 
491
    
492
    tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */
493
    tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
494
    
495
    tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
496
    tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
497

    
498
    tcg_out_opc(s, 0x8d); /* lea offset(r1, %ebp), r1 */
499
    tcg_out8(s, 0x80 | (r1 << 3) | 0x04);
500
    tcg_out8(s, (5 << 3) | r1);
501
    tcg_out32(s, offsetof(CPUState, tlb_table[mem_index][0].addr_read));
502

    
503
    /* cmp 0(r1), r0 */
504
    tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
505
    
506
    tcg_out_mov(s, r0, addr_reg);
507
    
508
#if TARGET_LONG_BITS == 32
509
    /* je label1 */
510
    tcg_out8(s, 0x70 + JCC_JE);
511
    label1_ptr = s->code_ptr;
512
    s->code_ptr++;
513
#else
514
    /* jne label3 */
515
    tcg_out8(s, 0x70 + JCC_JNE);
516
    label3_ptr = s->code_ptr;
517
    s->code_ptr++;
518
    
519
    /* cmp 4(r1), addr_reg2 */
520
    tcg_out_modrm_offset(s, 0x3b, addr_reg2, r1, 4);
521

    
522
    /* je label1 */
523
    tcg_out8(s, 0x70 + JCC_JE);
524
    label1_ptr = s->code_ptr;
525
    s->code_ptr++;
526
    
527
    /* label3: */
528
    *label3_ptr = s->code_ptr - label3_ptr - 1;
529
#endif
530

    
531
    /* XXX: move that code at the end of the TB */
532
#if TARGET_LONG_BITS == 32
533
    tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EDX, mem_index);
534
#else
535
    tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
536
    tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
537
#endif
538
    tcg_out8(s, 0xe8);
539
    tcg_out32(s, (tcg_target_long)qemu_ld_helpers[s_bits] - 
540
              (tcg_target_long)s->code_ptr - 4);
541

    
542
    switch(opc) {
543
    case 0 | 4:
544
        /* movsbl */
545
        tcg_out_modrm(s, 0xbe | P_EXT, data_reg, TCG_REG_EAX);
546
        break;
547
    case 1 | 4:
548
        /* movswl */
549
        tcg_out_modrm(s, 0xbf | P_EXT, data_reg, TCG_REG_EAX);
550
        break;
551
    case 0:
552
    case 1:
553
    case 2:
554
    default:
555
        tcg_out_mov(s, data_reg, TCG_REG_EAX);
556
        break;
557
    case 3:
558
        if (data_reg == TCG_REG_EDX) {
559
            tcg_out_opc(s, 0x90 + TCG_REG_EDX); /* xchg %edx, %eax */
560
            tcg_out_mov(s, data_reg2, TCG_REG_EAX);
561
        } else {
562
            tcg_out_mov(s, data_reg, TCG_REG_EAX);
563
            tcg_out_mov(s, data_reg2, TCG_REG_EDX);
564
        }
565
        break;
566
    }
567

    
568
    /* jmp label2 */
569
    tcg_out8(s, 0xeb);
570
    label2_ptr = s->code_ptr;
571
    s->code_ptr++;
572
    
573
    /* label1: */
574
    *label1_ptr = s->code_ptr - label1_ptr - 1;
575

    
576
    /* add x(r1), r0 */
577
    tcg_out_modrm_offset(s, 0x03, r0, r1, offsetof(CPUTLBEntry, addend) - 
578
                         offsetof(CPUTLBEntry, addr_read));
579
#else
580
    r0 = addr_reg;
581
#endif
582

    
583
#ifdef TARGET_WORDS_BIGENDIAN
584
    bswap = 1;
585
#else
586
    bswap = 0;
587
#endif
588
    switch(opc) {
589
    case 0:
590
        /* movzbl */
591
        tcg_out_modrm_offset(s, 0xb6 | P_EXT, data_reg, r0, 0);
592
        break;
593
    case 0 | 4:
594
        /* movsbl */
595
        tcg_out_modrm_offset(s, 0xbe | P_EXT, data_reg, r0, 0);
596
        break;
597
    case 1:
598
        /* movzwl */
599
        tcg_out_modrm_offset(s, 0xb7 | P_EXT, data_reg, r0, 0);
600
        if (bswap) {
601
            /* rolw $8, data_reg */
602
            tcg_out8(s, 0x66); 
603
            tcg_out_modrm(s, 0xc1, 0, data_reg);
604
            tcg_out8(s, 8);
605
        }
606
        break;
607
    case 1 | 4:
608
        /* movswl */
609
        tcg_out_modrm_offset(s, 0xbf | P_EXT, data_reg, r0, 0);
610
        if (bswap) {
611
            /* rolw $8, data_reg */
612
            tcg_out8(s, 0x66); 
613
            tcg_out_modrm(s, 0xc1, 0, data_reg);
614
            tcg_out8(s, 8);
615

    
616
            /* movswl data_reg, data_reg */
617
            tcg_out_modrm(s, 0xbf | P_EXT, data_reg, data_reg);
618
        }
619
        break;
620
    case 2:
621
        /* movl (r0), data_reg */
622
        tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0);
623
        if (bswap) {
624
            /* bswap */
625
            tcg_out_opc(s, (0xc8 + data_reg) | P_EXT);
626
        }
627
        break;
628
    case 3:
629
        /* XXX: could be nicer */
630
        if (r0 == data_reg) {
631
            r1 = TCG_REG_EDX;
632
            if (r1 == data_reg)
633
                r1 = TCG_REG_EAX;
634
            tcg_out_mov(s, r1, r0);
635
            r0 = r1;
636
        }
637
        if (!bswap) {
638
            tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0);
639
            tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, 4);
640
        } else {
641
            tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 4);
642
            tcg_out_opc(s, (0xc8 + data_reg) | P_EXT);
643

    
644
            tcg_out_modrm_offset(s, 0x8b, data_reg2, r0, 0);
645
            /* bswap */
646
            tcg_out_opc(s, (0xc8 + data_reg2) | P_EXT);
647
        }
648
        break;
649
    default:
650
        tcg_abort();
651
    }
652

    
653
#if defined(CONFIG_SOFTMMU)
654
    /* label2: */
655
    *label2_ptr = s->code_ptr - label2_ptr - 1;
656
#endif
657
}
658

    
659

    
660
static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
661
                            int opc)
662
{
663
    int addr_reg, data_reg, data_reg2, r0, r1, mem_index, s_bits, bswap;
664
#if defined(CONFIG_SOFTMMU)
665
    uint8_t *label1_ptr, *label2_ptr;
666
#endif
667
#if TARGET_LONG_BITS == 64
668
#if defined(CONFIG_SOFTMMU)
669
    uint8_t *label3_ptr;
670
#endif
671
    int addr_reg2;
672
#endif
673

    
674
    data_reg = *args++;
675
    if (opc == 3)
676
        data_reg2 = *args++;
677
    else
678
        data_reg2 = 0;
679
    addr_reg = *args++;
680
#if TARGET_LONG_BITS == 64
681
    addr_reg2 = *args++;
682
#endif
683
    mem_index = *args;
684

    
685
    s_bits = opc;
686

    
687
    r0 = TCG_REG_EAX;
688
    r1 = TCG_REG_EDX;
689

    
690
#if defined(CONFIG_SOFTMMU)
691
    tcg_out_mov(s, r1, addr_reg); 
692

    
693
    tcg_out_mov(s, r0, addr_reg); 
694
 
695
    tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
696
    tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); 
697
    
698
    tcg_out_modrm(s, 0x81, 4, r0); /* andl $x, r0 */
699
    tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
700
    
701
    tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
702
    tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
703

    
704
    tcg_out_opc(s, 0x8d); /* lea offset(r1, %ebp), r1 */
705
    tcg_out8(s, 0x80 | (r1 << 3) | 0x04);
706
    tcg_out8(s, (5 << 3) | r1);
707
    tcg_out32(s, offsetof(CPUState, tlb_table[mem_index][0].addr_write));
708

    
709
    /* cmp 0(r1), r0 */
710
    tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
711
    
712
    tcg_out_mov(s, r0, addr_reg);
713
    
714
#if TARGET_LONG_BITS == 32
715
    /* je label1 */
716
    tcg_out8(s, 0x70 + JCC_JE);
717
    label1_ptr = s->code_ptr;
718
    s->code_ptr++;
719
#else
720
    /* jne label3 */
721
    tcg_out8(s, 0x70 + JCC_JNE);
722
    label3_ptr = s->code_ptr;
723
    s->code_ptr++;
724
    
725
    /* cmp 4(r1), addr_reg2 */
726
    tcg_out_modrm_offset(s, 0x3b, addr_reg2, r1, 4);
727

    
728
    /* je label1 */
729
    tcg_out8(s, 0x70 + JCC_JE);
730
    label1_ptr = s->code_ptr;
731
    s->code_ptr++;
732
    
733
    /* label3: */
734
    *label3_ptr = s->code_ptr - label3_ptr - 1;
735
#endif
736

    
737
    /* XXX: move that code at the end of the TB */
738
#if TARGET_LONG_BITS == 32
739
    if (opc == 3) {
740
        tcg_out_mov(s, TCG_REG_EDX, data_reg);
741
        tcg_out_mov(s, TCG_REG_ECX, data_reg2);
742
        tcg_out8(s, 0x6a); /* push Ib */
743
        tcg_out8(s, mem_index);
744
        tcg_out8(s, 0xe8);
745
        tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - 
746
                  (tcg_target_long)s->code_ptr - 4);
747
        tcg_out_addi(s, TCG_REG_ESP, 4);
748
    } else {
749
        switch(opc) {
750
        case 0:
751
            /* movzbl */
752
            tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_EDX, data_reg);
753
            break;
754
        case 1:
755
            /* movzwl */
756
            tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_EDX, data_reg);
757
            break;
758
        case 2:
759
            tcg_out_mov(s, TCG_REG_EDX, data_reg);
760
            break;
761
        }
762
        tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
763
        tcg_out8(s, 0xe8);
764
        tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - 
765
                  (tcg_target_long)s->code_ptr - 4);
766
    }
767
#else
768
    if (opc == 3) {
769
        tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
770
        tcg_out8(s, 0x6a); /* push Ib */
771
        tcg_out8(s, mem_index);
772
        tcg_out_opc(s, 0x50 + data_reg2); /* push */
773
        tcg_out_opc(s, 0x50 + data_reg); /* push */
774
        tcg_out8(s, 0xe8);
775
        tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - 
776
                  (tcg_target_long)s->code_ptr - 4);
777
        tcg_out_addi(s, TCG_REG_ESP, 12);
778
    } else {
779
        tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
780
        switch(opc) {
781
        case 0:
782
            /* movzbl */
783
            tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_ECX, data_reg);
784
            break;
785
        case 1:
786
            /* movzwl */
787
            tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_ECX, data_reg);
788
            break;
789
        case 2:
790
            tcg_out_mov(s, TCG_REG_ECX, data_reg);
791
            break;
792
        }
793
        tcg_out8(s, 0x6a); /* push Ib */
794
        tcg_out8(s, mem_index);
795
        tcg_out8(s, 0xe8);
796
        tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - 
797
                  (tcg_target_long)s->code_ptr - 4);
798
        tcg_out_addi(s, TCG_REG_ESP, 4);
799
    }
800
#endif
801
    
802
    /* jmp label2 */
803
    tcg_out8(s, 0xeb);
804
    label2_ptr = s->code_ptr;
805
    s->code_ptr++;
806
    
807
    /* label1: */
808
    *label1_ptr = s->code_ptr - label1_ptr - 1;
809

    
810
    /* add x(r1), r0 */
811
    tcg_out_modrm_offset(s, 0x03, r0, r1, offsetof(CPUTLBEntry, addend) - 
812
                         offsetof(CPUTLBEntry, addr_write));
813
#else
814
    r0 = addr_reg;
815
#endif
816

    
817
#ifdef TARGET_WORDS_BIGENDIAN
818
    bswap = 1;
819
#else
820
    bswap = 0;
821
#endif
822
    switch(opc) {
823
    case 0:
824
        /* movb */
825
        tcg_out_modrm_offset(s, 0x88, data_reg, r0, 0);
826
        break;
827
    case 1:
828
        if (bswap) {
829
            tcg_out_mov(s, r1, data_reg);
830
            tcg_out8(s, 0x66); /* rolw $8, %ecx */
831
            tcg_out_modrm(s, 0xc1, 0, r1);
832
            tcg_out8(s, 8);
833
            data_reg = r1;
834
        }
835
        /* movw */
836
        tcg_out8(s, 0x66);
837
        tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
838
        break;
839
    case 2:
840
        if (bswap) {
841
            tcg_out_mov(s, r1, data_reg);
842
            /* bswap data_reg */
843
            tcg_out_opc(s, (0xc8 + r1) | P_EXT);
844
            data_reg = r1;
845
        }
846
        /* movl */
847
        tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
848
        break;
849
    case 3:
850
        if (bswap) {
851
            tcg_out_mov(s, r1, data_reg2);
852
            /* bswap data_reg */
853
            tcg_out_opc(s, (0xc8 + r1) | P_EXT);
854
            tcg_out_modrm_offset(s, 0x89, r1, r0, 0);
855
            tcg_out_mov(s, r1, data_reg);
856
            /* bswap data_reg */
857
            tcg_out_opc(s, (0xc8 + r1) | P_EXT);
858
            tcg_out_modrm_offset(s, 0x89, r1, r0, 4);
859
        } else {
860
            tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
861
            tcg_out_modrm_offset(s, 0x89, data_reg2, r0, 4);
862
        }
863
        break;
864
    default:
865
        tcg_abort();
866
    }
867

    
868
#if defined(CONFIG_SOFTMMU)
869
    /* label2: */
870
    *label2_ptr = s->code_ptr - label2_ptr - 1;
871
#endif
872
}
873

    
874
static inline void tcg_out_op(TCGContext *s, int opc, 
875
                              const TCGArg *args, const int *const_args)
876
{
877
    int c;
878
    
879
    switch(opc) {
880
    case INDEX_op_exit_tb:
881
        tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EAX, args[0]);
882
        tcg_out8(s, 0xc3); /* ret */
883
        break;
884
    case INDEX_op_goto_tb:
885
        if (s->tb_jmp_offset) {
886
            /* direct jump method */
887
            tcg_out8(s, 0xe9); /* jmp im */
888
            s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
889
            tcg_out32(s, 0);
890
        } else {
891
            /* indirect jump method */
892
            /* jmp Ev */
893
            tcg_out_modrm_offset(s, 0xff, 4, -1, 
894
                                 (tcg_target_long)(s->tb_next + args[0]));
895
        }
896
        s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
897
        break;
898
    case INDEX_op_call:
899
        if (const_args[0]) {
900
            tcg_out8(s, 0xe8);
901
            tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
902
        } else {
903
            tcg_out_modrm(s, 0xff, 2, args[0]);
904
        }
905
        break;
906
    case INDEX_op_jmp:
907
        if (const_args[0]) {
908
            tcg_out8(s, 0xe9);
909
            tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
910
        } else {
911
            tcg_out_modrm(s, 0xff, 4, args[0]);
912
        }
913
        break;
914
    case INDEX_op_br:
915
        tcg_out_jxx(s, JCC_JMP, args[0]);
916
        break;
917
    case INDEX_op_movi_i32:
918
        tcg_out_movi(s, TCG_TYPE_I32, args[0], args[1]);
919
        break;
920
    case INDEX_op_ld8u_i32:
921
        /* movzbl */
922
        tcg_out_modrm_offset(s, 0xb6 | P_EXT, args[0], args[1], args[2]);
923
        break;
924
    case INDEX_op_ld8s_i32:
925
        /* movsbl */
926
        tcg_out_modrm_offset(s, 0xbe | P_EXT, args[0], args[1], args[2]);
927
        break;
928
    case INDEX_op_ld16u_i32:
929
        /* movzwl */
930
        tcg_out_modrm_offset(s, 0xb7 | P_EXT, args[0], args[1], args[2]);
931
        break;
932
    case INDEX_op_ld16s_i32:
933
        /* movswl */
934
        tcg_out_modrm_offset(s, 0xbf | P_EXT, args[0], args[1], args[2]);
935
        break;
936
    case INDEX_op_ld_i32:
937
        /* movl */
938
        tcg_out_modrm_offset(s, 0x8b, args[0], args[1], args[2]);
939
        break;
940
    case INDEX_op_st8_i32:
941
        /* movb */
942
        tcg_out_modrm_offset(s, 0x88, args[0], args[1], args[2]);
943
        break;
944
    case INDEX_op_st16_i32:
945
        /* movw */
946
        tcg_out8(s, 0x66);
947
        tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
948
        break;
949
    case INDEX_op_st_i32:
950
        /* movl */
951
        tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
952
        break;
953
    case INDEX_op_sub_i32:
954
        c = ARITH_SUB;
955
        goto gen_arith;
956
    case INDEX_op_and_i32:
957
        c = ARITH_AND;
958
        goto gen_arith;
959
    case INDEX_op_or_i32:
960
        c = ARITH_OR;
961
        goto gen_arith;
962
    case INDEX_op_xor_i32:
963
        c = ARITH_XOR;
964
        goto gen_arith;
965
    case INDEX_op_add_i32:
966
        c = ARITH_ADD;
967
    gen_arith:
968
        if (const_args[2]) {
969
            tgen_arithi(s, c, args[0], args[2]);
970
        } else {
971
            tcg_out_modrm(s, 0x01 | (c << 3), args[2], args[0]);
972
        }
973
        break;
974
    case INDEX_op_mul_i32:
975
        if (const_args[2]) {
976
            int32_t val;
977
            val = args[2];
978
            if (val == (int8_t)val) {
979
                tcg_out_modrm(s, 0x6b, args[0], args[0]);
980
                tcg_out8(s, val);
981
            } else {
982
                tcg_out_modrm(s, 0x69, args[0], args[0]);
983
                tcg_out32(s, val);
984
            }
985
        } else {
986
            tcg_out_modrm(s, 0xaf | P_EXT, args[0], args[2]);
987
        }
988
        break;
989
    case INDEX_op_mulu2_i32:
990
        tcg_out_modrm(s, 0xf7, 4, args[3]);
991
        break;
992
    case INDEX_op_div2_i32:
993
        tcg_out_modrm(s, 0xf7, 7, args[4]);
994
        break;
995
    case INDEX_op_divu2_i32:
996
        tcg_out_modrm(s, 0xf7, 6, args[4]);
997
        break;
998
    case INDEX_op_shl_i32:
999
        c = SHIFT_SHL;
1000
    gen_shift32:
1001
        if (const_args[2]) {
1002
            if (args[2] == 1) {
1003
                tcg_out_modrm(s, 0xd1, c, args[0]);
1004
            } else {
1005
                tcg_out_modrm(s, 0xc1, c, args[0]);
1006
                tcg_out8(s, args[2]);
1007
            }
1008
        } else {
1009
            tcg_out_modrm(s, 0xd3, c, args[0]);
1010
        }
1011
        break;
1012
    case INDEX_op_shr_i32:
1013
        c = SHIFT_SHR;
1014
        goto gen_shift32;
1015
    case INDEX_op_sar_i32:
1016
        c = SHIFT_SAR;
1017
        goto gen_shift32;
1018
        
1019
    case INDEX_op_add2_i32:
1020
        if (const_args[4]) 
1021
            tgen_arithi(s, ARITH_ADD, args[0], args[4]);
1022
        else
1023
            tcg_out_modrm(s, 0x01 | (ARITH_ADD << 3), args[4], args[0]);
1024
        if (const_args[5]) 
1025
            tgen_arithi(s, ARITH_ADC, args[1], args[5]);
1026
        else
1027
            tcg_out_modrm(s, 0x01 | (ARITH_ADC << 3), args[5], args[1]);
1028
        break;
1029
    case INDEX_op_sub2_i32:
1030
        if (const_args[4]) 
1031
            tgen_arithi(s, ARITH_SUB, args[0], args[4]);
1032
        else
1033
            tcg_out_modrm(s, 0x01 | (ARITH_SUB << 3), args[4], args[0]);
1034
        if (const_args[5]) 
1035
            tgen_arithi(s, ARITH_SBB, args[1], args[5]);
1036
        else
1037
            tcg_out_modrm(s, 0x01 | (ARITH_SBB << 3), args[5], args[1]);
1038
        break;
1039
    case INDEX_op_brcond_i32:
1040
        tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], args[3]);
1041
        break;
1042
    case INDEX_op_brcond2_i32:
1043
        tcg_out_brcond2(s, args, const_args);
1044
        break;
1045

    
1046
    case INDEX_op_qemu_ld8u:
1047
        tcg_out_qemu_ld(s, args, 0);
1048
        break;
1049
    case INDEX_op_qemu_ld8s:
1050
        tcg_out_qemu_ld(s, args, 0 | 4);
1051
        break;
1052
    case INDEX_op_qemu_ld16u:
1053
        tcg_out_qemu_ld(s, args, 1);
1054
        break;
1055
    case INDEX_op_qemu_ld16s:
1056
        tcg_out_qemu_ld(s, args, 1 | 4);
1057
        break;
1058
    case INDEX_op_qemu_ld32u:
1059
        tcg_out_qemu_ld(s, args, 2);
1060
        break;
1061
    case INDEX_op_qemu_ld64:
1062
        tcg_out_qemu_ld(s, args, 3);
1063
        break;
1064
        
1065
    case INDEX_op_qemu_st8:
1066
        tcg_out_qemu_st(s, args, 0);
1067
        break;
1068
    case INDEX_op_qemu_st16:
1069
        tcg_out_qemu_st(s, args, 1);
1070
        break;
1071
    case INDEX_op_qemu_st32:
1072
        tcg_out_qemu_st(s, args, 2);
1073
        break;
1074
    case INDEX_op_qemu_st64:
1075
        tcg_out_qemu_st(s, args, 3);
1076
        break;
1077

    
1078
    default:
1079
        tcg_abort();
1080
    }
1081
}
1082

    
1083
static const TCGTargetOpDef x86_op_defs[] = {
1084
    { INDEX_op_exit_tb, { } },
1085
    { INDEX_op_goto_tb, { } },
1086
    { INDEX_op_call, { "ri" } },
1087
    { INDEX_op_jmp, { "ri" } },
1088
    { INDEX_op_br, { } },
1089
    { INDEX_op_mov_i32, { "r", "r" } },
1090
    { INDEX_op_movi_i32, { "r" } },
1091
    { INDEX_op_ld8u_i32, { "r", "r" } },
1092
    { INDEX_op_ld8s_i32, { "r", "r" } },
1093
    { INDEX_op_ld16u_i32, { "r", "r" } },
1094
    { INDEX_op_ld16s_i32, { "r", "r" } },
1095
    { INDEX_op_ld_i32, { "r", "r" } },
1096
    { INDEX_op_st8_i32, { "q", "r" } },
1097
    { INDEX_op_st16_i32, { "r", "r" } },
1098
    { INDEX_op_st_i32, { "r", "r" } },
1099

    
1100
    { INDEX_op_add_i32, { "r", "0", "ri" } },
1101
    { INDEX_op_sub_i32, { "r", "0", "ri" } },
1102
    { INDEX_op_mul_i32, { "r", "0", "ri" } },
1103
    { INDEX_op_mulu2_i32, { "a", "d", "a", "r" } },
1104
    { INDEX_op_div2_i32, { "a", "d", "0", "1", "r" } },
1105
    { INDEX_op_divu2_i32, { "a", "d", "0", "1", "r" } },
1106
    { INDEX_op_and_i32, { "r", "0", "ri" } },
1107
    { INDEX_op_or_i32, { "r", "0", "ri" } },
1108
    { INDEX_op_xor_i32, { "r", "0", "ri" } },
1109

    
1110
    { INDEX_op_shl_i32, { "r", "0", "ci" } },
1111
    { INDEX_op_shr_i32, { "r", "0", "ci" } },
1112
    { INDEX_op_sar_i32, { "r", "0", "ci" } },
1113

    
1114
    { INDEX_op_brcond_i32, { "r", "ri" } },
1115

    
1116
    { INDEX_op_add2_i32, { "r", "r", "0", "1", "ri", "ri" } },
1117
    { INDEX_op_sub2_i32, { "r", "r", "0", "1", "ri", "ri" } },
1118
    { INDEX_op_brcond2_i32, { "r", "r", "ri", "ri" } },
1119

    
1120
#if TARGET_LONG_BITS == 32
1121
    { INDEX_op_qemu_ld8u, { "r", "L" } },
1122
    { INDEX_op_qemu_ld8s, { "r", "L" } },
1123
    { INDEX_op_qemu_ld16u, { "r", "L" } },
1124
    { INDEX_op_qemu_ld16s, { "r", "L" } },
1125
    { INDEX_op_qemu_ld32u, { "r", "L" } },
1126
    { INDEX_op_qemu_ld64, { "r", "r", "L" } },
1127

    
1128
    { INDEX_op_qemu_st8, { "cb", "L" } },
1129
    { INDEX_op_qemu_st16, { "L", "L" } },
1130
    { INDEX_op_qemu_st32, { "L", "L" } },
1131
    { INDEX_op_qemu_st64, { "L", "L", "L" } },
1132
#else
1133
    { INDEX_op_qemu_ld8u, { "r", "L", "L" } },
1134
    { INDEX_op_qemu_ld8s, { "r", "L", "L" } },
1135
    { INDEX_op_qemu_ld16u, { "r", "L", "L" } },
1136
    { INDEX_op_qemu_ld16s, { "r", "L", "L" } },
1137
    { INDEX_op_qemu_ld32u, { "r", "L", "L" } },
1138
    { INDEX_op_qemu_ld64, { "r", "r", "L", "L" } },
1139

    
1140
    { INDEX_op_qemu_st8, { "cb", "L", "L" } },
1141
    { INDEX_op_qemu_st16, { "L", "L", "L" } },
1142
    { INDEX_op_qemu_st32, { "L", "L", "L" } },
1143
    { INDEX_op_qemu_st64, { "L", "L", "L", "L" } },
1144
#endif
1145
    { -1 },
1146
};
1147

    
1148
void tcg_target_init(TCGContext *s)
1149
{
1150
    /* fail safe */
1151
    if ((1 << CPU_TLB_ENTRY_BITS) != sizeof(CPUTLBEntry))
1152
        tcg_abort();
1153

    
1154
    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xff);
1155
    tcg_regset_set32(tcg_target_call_clobber_regs, 0,
1156
                     (1 << TCG_REG_EAX) | 
1157
                     (1 << TCG_REG_EDX) | 
1158
                     (1 << TCG_REG_ECX));
1159
    
1160
    tcg_regset_clear(s->reserved_regs);
1161
    tcg_regset_set_reg(s->reserved_regs, TCG_REG_ESP);
1162

    
1163
    tcg_add_target_add_op_defs(x86_op_defs);
1164
}