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1
/*
2
 * Tiny Code Generator for QEMU
3
 *
4
 * Copyright (c) 2008 Fabrice Bellard
5
 *
6
 * Permission is hereby granted, free of charge, to any person obtaining a copy
7
 * of this software and associated documentation files (the "Software"), to deal
8
 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
11
 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
23
 */
24
const char *tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
25
    "%rax",
26
    "%rcx",
27
    "%rdx",
28
    "%rbx",
29
    "%rsp",
30
    "%rbp",
31
    "%rsi",
32
    "%rdi",
33
    "%r8",
34
    "%r9",
35
    "%r10",
36
    "%r11",
37
    "%r12",
38
    "%r13",
39
    "%r14",
40
    "%r15",
41
};
42

    
43
int tcg_target_reg_alloc_order[] = {
44
    TCG_REG_RDI,
45
    TCG_REG_RSI,
46
    TCG_REG_RDX,
47
    TCG_REG_RCX,
48
    TCG_REG_R8,
49
    TCG_REG_R9,
50
    TCG_REG_RAX,
51
    TCG_REG_R10,
52
    TCG_REG_R11,
53

    
54
    TCG_REG_RBP,
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    TCG_REG_RBX,
56
    TCG_REG_R12,
57
    TCG_REG_R13,
58
    TCG_REG_R14,
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    TCG_REG_R15,
60
};
61

    
62
const int tcg_target_call_iarg_regs[6] = { 
63
    TCG_REG_RDI,
64
    TCG_REG_RSI,
65
    TCG_REG_RDX,
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    TCG_REG_RCX,
67
    TCG_REG_R8,
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    TCG_REG_R9,
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};
70

    
71
const int tcg_target_call_oarg_regs[2] = { 
72
    TCG_REG_RAX, 
73
    TCG_REG_RDX 
74
};
75

    
76
static void patch_reloc(uint8_t *code_ptr, int type, 
77
                        tcg_target_long value, tcg_target_long addend)
78
{
79
    value += addend;
80
    switch(type) {
81
    case R_X86_64_32:
82
        if (value != (uint32_t)value)
83
            tcg_abort();
84
        *(uint32_t *)code_ptr = value;
85
        break;
86
    case R_X86_64_32S:
87
        if (value != (int32_t)value)
88
            tcg_abort();
89
        *(uint32_t *)code_ptr = value;
90
        break;
91
    case R_386_PC32:
92
        value -= (long)code_ptr;
93
        if (value != (int32_t)value)
94
            tcg_abort();
95
        *(uint32_t *)code_ptr = value;
96
        break;
97
    default:
98
        tcg_abort();
99
    }
100
}
101

    
102
/* maximum number of register used for input function arguments */
103
static inline int tcg_target_get_call_iarg_regs_count(int flags)
104
{
105
    return 6;
106
}
107

    
108
/* parse target specific constraints */
109
int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str)
110
{
111
    const char *ct_str;
112

    
113
    ct_str = *pct_str;
114
    switch(ct_str[0]) {
115
    case 'a':
116
        ct->ct |= TCG_CT_REG;
117
        tcg_regset_set_reg(ct->u.regs, TCG_REG_RAX);
118
        break;
119
    case 'b':
120
        ct->ct |= TCG_CT_REG;
121
        tcg_regset_set_reg(ct->u.regs, TCG_REG_RBX);
122
        break;
123
    case 'c':
124
        ct->ct |= TCG_CT_REG;
125
        tcg_regset_set_reg(ct->u.regs, TCG_REG_RCX);
126
        break;
127
    case 'd':
128
        ct->ct |= TCG_CT_REG;
129
        tcg_regset_set_reg(ct->u.regs, TCG_REG_RDX);
130
        break;
131
    case 'S':
132
        ct->ct |= TCG_CT_REG;
133
        tcg_regset_set_reg(ct->u.regs, TCG_REG_RSI);
134
        break;
135
    case 'D':
136
        ct->ct |= TCG_CT_REG;
137
        tcg_regset_set_reg(ct->u.regs, TCG_REG_RDI);
138
        break;
139
    case 'q':
140
        ct->ct |= TCG_CT_REG;
141
        tcg_regset_set32(ct->u.regs, 0, 0xf);
142
        break;
143
    case 'r':
144
        ct->ct |= TCG_CT_REG;
145
        tcg_regset_set32(ct->u.regs, 0, 0xffff);
146
        break;
147
    case 'L': /* qemu_ld/st constraint */
148
        ct->ct |= TCG_CT_REG;
149
        tcg_regset_set32(ct->u.regs, 0, 0xffff);
150
        tcg_regset_reset_reg(ct->u.regs, TCG_REG_RSI);
151
        tcg_regset_reset_reg(ct->u.regs, TCG_REG_RDI);
152
        break;
153
    case 'e':
154
        ct->ct |= TCG_CT_CONST_S32;
155
        break;
156
    case 'Z':
157
        ct->ct |= TCG_CT_CONST_U32;
158
        break;
159
    default:
160
        return -1;
161
    }
162
    ct_str++;
163
    *pct_str = ct_str;
164
    return 0;
165
}
166

    
167
/* test if a constant matches the constraint */
168
static inline int tcg_target_const_match(tcg_target_long val,
169
                                         const TCGArgConstraint *arg_ct)
170
{
171
    int ct;
172
    ct = arg_ct->ct;
173
    if (ct & TCG_CT_CONST)
174
        return 1;
175
    else if ((ct & TCG_CT_CONST_S32) && val == (int32_t)val)
176
        return 1;
177
    else if ((ct & TCG_CT_CONST_U32) && val == (uint32_t)val)
178
        return 1;
179
    else
180
        return 0;
181
}
182

    
183
#define ARITH_ADD 0
184
#define ARITH_OR  1
185
#define ARITH_ADC 2
186
#define ARITH_SBB 3
187
#define ARITH_AND 4
188
#define ARITH_SUB 5
189
#define ARITH_XOR 6
190
#define ARITH_CMP 7
191

    
192
#define SHIFT_SHL 4
193
#define SHIFT_SHR 5
194
#define SHIFT_SAR 7
195

    
196
#define JCC_JMP (-1)
197
#define JCC_JO  0x0
198
#define JCC_JNO 0x1
199
#define JCC_JB  0x2
200
#define JCC_JAE 0x3
201
#define JCC_JE  0x4
202
#define JCC_JNE 0x5
203
#define JCC_JBE 0x6
204
#define JCC_JA  0x7
205
#define JCC_JS  0x8
206
#define JCC_JNS 0x9
207
#define JCC_JP  0xa
208
#define JCC_JNP 0xb
209
#define JCC_JL  0xc
210
#define JCC_JGE 0xd
211
#define JCC_JLE 0xe
212
#define JCC_JG  0xf
213

    
214
#define P_EXT   0x100 /* 0x0f opcode prefix */
215
#define P_REXW  0x200 /* set rex.w = 1 */
216
#define P_REX   0x400 /* force rex usage */
217
                                  
218
static const uint8_t tcg_cond_to_jcc[10] = {
219
    [TCG_COND_EQ] = JCC_JE,
220
    [TCG_COND_NE] = JCC_JNE,
221
    [TCG_COND_LT] = JCC_JL,
222
    [TCG_COND_GE] = JCC_JGE,
223
    [TCG_COND_LE] = JCC_JLE,
224
    [TCG_COND_GT] = JCC_JG,
225
    [TCG_COND_LTU] = JCC_JB,
226
    [TCG_COND_GEU] = JCC_JAE,
227
    [TCG_COND_LEU] = JCC_JBE,
228
    [TCG_COND_GTU] = JCC_JA,
229
};
230

    
231
static inline void tcg_out_opc(TCGContext *s, int opc, int r, int rm, int x)
232
{
233
    int rex;
234
    rex = ((opc >> 6) & 0x8) | ((r >> 1) & 0x4) | 
235
        ((x >> 2) & 2) | ((rm >> 3) & 1);
236
    if (rex || (opc & P_REX)) {
237
        tcg_out8(s, rex | 0x40);
238
    }
239
    if (opc & P_EXT)
240
        tcg_out8(s, 0x0f);
241
    tcg_out8(s, opc);
242
}
243

    
244
static inline void tcg_out_modrm(TCGContext *s, int opc, int r, int rm)
245
{
246
    tcg_out_opc(s, opc, r, rm, 0);
247
    tcg_out8(s, 0xc0 | ((r & 7) << 3) | (rm & 7));
248
}
249

    
250
/* rm < 0 means no register index plus (-rm - 1 immediate bytes) */
251
static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm, 
252
                                        tcg_target_long offset)
253
{
254
    if (rm < 0) {
255
        tcg_target_long val;
256
        tcg_out_opc(s, opc, r, 0, 0);
257
        val = offset - ((tcg_target_long)s->code_ptr + 5 + (-rm - 1));
258
        if (val == (int32_t)val) {
259
            /* eip relative */
260
            tcg_out8(s, 0x05 | ((r & 7) << 3));
261
            tcg_out32(s, val);
262
        } else if (offset == (int32_t)offset) {
263
            tcg_out8(s, 0x04 | ((r & 7) << 3));
264
            tcg_out8(s, 0x25); /* sib */
265
            tcg_out32(s, offset);
266
        } else {
267
            tcg_abort();
268
        }
269
    } else if (offset == 0 && (rm & 7) != TCG_REG_RBP) {
270
        tcg_out_opc(s, opc, r, rm, 0);
271
        if ((rm & 7) == TCG_REG_RSP) {
272
            tcg_out8(s, 0x04 | ((r & 7) << 3));
273
            tcg_out8(s, 0x24);
274
        } else {
275
            tcg_out8(s, 0x00 | ((r & 7) << 3) | (rm & 7));
276
        }
277
    } else if ((int8_t)offset == offset) {
278
        tcg_out_opc(s, opc, r, rm, 0);
279
        if ((rm & 7) == TCG_REG_RSP) {
280
            tcg_out8(s, 0x44 | ((r & 7) << 3));
281
            tcg_out8(s, 0x24);
282
        } else {
283
            tcg_out8(s, 0x40 | ((r & 7) << 3) | (rm & 7));
284
        }
285
        tcg_out8(s, offset);
286
    } else {
287
        tcg_out_opc(s, opc, r, rm, 0);
288
        if ((rm & 7) == TCG_REG_RSP) {
289
            tcg_out8(s, 0x84 | ((r & 7) << 3));
290
            tcg_out8(s, 0x24);
291
        } else {
292
            tcg_out8(s, 0x80 | ((r & 7) << 3) | (rm & 7));
293
        }
294
        tcg_out32(s, offset);
295
    }
296
}
297

    
298
#if defined(CONFIG_SOFTMMU)
299
/* XXX: incomplete. index must be different from ESP */
300
static void tcg_out_modrm_offset2(TCGContext *s, int opc, int r, int rm, 
301
                                  int index, int shift,
302
                                  tcg_target_long offset)
303
{
304
    int mod;
305
    if (rm == -1)
306
        tcg_abort();
307
    if (offset == 0 && (rm & 7) != TCG_REG_RBP) {
308
        mod = 0;
309
    } else if (offset == (int8_t)offset) {
310
        mod = 0x40;
311
    } else if (offset == (int32_t)offset) {
312
        mod = 0x80;
313
    } else {
314
        tcg_abort();
315
    }
316
    if (index == -1) {
317
        tcg_out_opc(s, opc, r, rm, 0);
318
        if ((rm & 7) == TCG_REG_RSP) {
319
            tcg_out8(s, mod | ((r & 7) << 3) | 0x04);
320
            tcg_out8(s, 0x04 | (rm & 7));
321
        } else {
322
            tcg_out8(s, mod | ((r & 7) << 3) | (rm & 7));
323
        }
324
    } else {
325
        tcg_out_opc(s, opc, r, rm, index);
326
        tcg_out8(s, mod | ((r & 7) << 3) | 0x04);
327
        tcg_out8(s, (shift << 6) | ((index & 7) << 3) | (rm & 7));
328
    }
329
    if (mod == 0x40) {
330
        tcg_out8(s, offset);
331
    } else if (mod == 0x80) {
332
        tcg_out32(s, offset);
333
    }
334
}
335
#endif
336

    
337
static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
338
{
339
    tcg_out_modrm(s, 0x8b | P_REXW, ret, arg);
340
}
341

    
342
static inline void tcg_out_movi(TCGContext *s, TCGType type, 
343
                                int ret, tcg_target_long arg)
344
{
345
    if (arg == 0) {
346
        tcg_out_modrm(s, 0x01 | (ARITH_XOR << 3), ret, ret); /* xor r0,r0 */
347
    } else if (arg == (uint32_t)arg || type == TCG_TYPE_I32) {
348
        tcg_out_opc(s, 0xb8 + (ret & 7), 0, ret, 0);
349
        tcg_out32(s, arg);
350
    } else if (arg == (int32_t)arg) {
351
        tcg_out_modrm(s, 0xc7 | P_REXW, 0, ret);
352
        tcg_out32(s, arg);
353
    } else {
354
        tcg_out_opc(s, (0xb8 + (ret & 7)) | P_REXW, 0, ret, 0);
355
        tcg_out32(s, arg);
356
        tcg_out32(s, arg >> 32);
357
    }
358
}
359

    
360
static inline void tcg_out_ld(TCGContext *s, TCGType type, int ret,
361
                              int arg1, tcg_target_long arg2)
362
{
363
    if (type == TCG_TYPE_I32)
364
        tcg_out_modrm_offset(s, 0x8b, ret, arg1, arg2); /* movl */
365
    else
366
        tcg_out_modrm_offset(s, 0x8b | P_REXW, ret, arg1, arg2); /* movq */
367
}
368

    
369
static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
370
                              int arg1, tcg_target_long arg2)
371
{
372
    if (type == TCG_TYPE_I32)
373
        tcg_out_modrm_offset(s, 0x89, arg, arg1, arg2); /* movl */
374
    else
375
        tcg_out_modrm_offset(s, 0x89 | P_REXW, arg, arg1, arg2); /* movq */
376
}
377

    
378
static inline void tgen_arithi32(TCGContext *s, int c, int r0, int32_t val)
379
{
380
    if (val == (int8_t)val) {
381
        tcg_out_modrm(s, 0x83, c, r0);
382
        tcg_out8(s, val);
383
    } else {
384
        tcg_out_modrm(s, 0x81, c, r0);
385
        tcg_out32(s, val);
386
    }
387
}
388

    
389
static inline void tgen_arithi64(TCGContext *s, int c, int r0, int64_t val)
390
{
391
    if (val == (int8_t)val) {
392
        tcg_out_modrm(s, 0x83 | P_REXW, c, r0);
393
        tcg_out8(s, val);
394
    } else if (val == (int32_t)val) {
395
        tcg_out_modrm(s, 0x81 | P_REXW, c, r0);
396
        tcg_out32(s, val);
397
    } else if (c == ARITH_AND && val == (uint32_t)val) {
398
        tcg_out_modrm(s, 0x81, c, r0);
399
        tcg_out32(s, val);
400
    } else {
401
        tcg_abort();
402
    }
403
}
404

    
405
void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
406
{
407
    if (val != 0)
408
        tgen_arithi64(s, ARITH_ADD, reg, val);
409
}
410

    
411
static void tcg_out_jxx(TCGContext *s, int opc, int label_index)
412
{
413
    int32_t val, val1;
414
    TCGLabel *l = &s->labels[label_index];
415
    
416
    if (l->has_value) {
417
        val = l->u.value - (tcg_target_long)s->code_ptr;
418
        val1 = val - 2;
419
        if ((int8_t)val1 == val1) {
420
            if (opc == -1)
421
                tcg_out8(s, 0xeb);
422
            else
423
                tcg_out8(s, 0x70 + opc);
424
            tcg_out8(s, val1);
425
        } else {
426
            if (opc == -1) {
427
                tcg_out8(s, 0xe9);
428
                tcg_out32(s, val - 5);
429
            } else {
430
                tcg_out8(s, 0x0f);
431
                tcg_out8(s, 0x80 + opc);
432
                tcg_out32(s, val - 6);
433
            }
434
        }
435
    } else {
436
        if (opc == -1) {
437
            tcg_out8(s, 0xe9);
438
        } else {
439
            tcg_out8(s, 0x0f);
440
            tcg_out8(s, 0x80 + opc);
441
        }
442
        tcg_out_reloc(s, s->code_ptr, R_386_PC32, label_index, -4);
443
        s->code_ptr += 4;
444
    }
445
}
446

    
447
static void tcg_out_brcond(TCGContext *s, int cond, 
448
                           TCGArg arg1, TCGArg arg2, int const_arg2,
449
                           int label_index, int rexw)
450
{
451
    int c;
452
    if (const_arg2) {
453
        if (arg2 == 0) {
454
            /* use test */
455
            switch(cond) {
456
            case TCG_COND_EQ:
457
                c = JCC_JE;
458
                break;
459
            case TCG_COND_NE:
460
                c = JCC_JNE;
461
                break;
462
            case TCG_COND_LT:
463
                c = JCC_JS;
464
                break;
465
            case TCG_COND_GE:
466
                c = JCC_JNS;
467
                break;
468
            default:
469
                goto do_cmpi;
470
            }
471
            /* test r, r */
472
            tcg_out_modrm(s, 0x85 | rexw, arg1, arg1);
473
            tcg_out_jxx(s, c, label_index);
474
        } else {
475
        do_cmpi:
476
            if (rexw)
477
                tgen_arithi64(s, ARITH_CMP, arg1, arg2);
478
            else
479
                tgen_arithi32(s, ARITH_CMP, arg1, arg2);
480
            tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index);
481
        }
482
    } else {
483
        tcg_out_modrm(s, 0x01 | (ARITH_CMP << 3) | rexw, arg2, arg1);
484
        tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index);
485
    }
486
}
487

    
488
#if defined(CONFIG_SOFTMMU)
489
extern void __ldb_mmu(void);
490
extern void __ldw_mmu(void);
491
extern void __ldl_mmu(void);
492
extern void __ldq_mmu(void);
493

    
494
extern void __stb_mmu(void);
495
extern void __stw_mmu(void);
496
extern void __stl_mmu(void);
497
extern void __stq_mmu(void);
498

    
499

    
500
static void *qemu_ld_helpers[4] = {
501
    __ldb_mmu,
502
    __ldw_mmu,
503
    __ldl_mmu,
504
    __ldq_mmu,
505
};
506

    
507
static void *qemu_st_helpers[4] = {
508
    __stb_mmu,
509
    __stw_mmu,
510
    __stl_mmu,
511
    __stq_mmu,
512
};
513
#endif
514

    
515
static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
516
                            int opc)
517
{
518
    int addr_reg, data_reg, r0, r1, mem_index, s_bits, bswap, rexw;
519
#if defined(CONFIG_SOFTMMU)
520
    uint8_t *label1_ptr, *label2_ptr;
521
#endif
522

    
523
    data_reg = *args++;
524
    addr_reg = *args++;
525
    mem_index = *args;
526
    s_bits = opc & 3;
527

    
528
    r0 = TCG_REG_RDI;
529
    r1 = TCG_REG_RSI;
530

    
531
#if TARGET_LONG_BITS == 32
532
    rexw = 0;
533
#else
534
    rexw = P_REXW;
535
#endif
536
#if defined(CONFIG_SOFTMMU)
537
    /* mov */
538
    tcg_out_modrm(s, 0x8b | rexw, r1, addr_reg);
539

    
540
    /* mov */
541
    tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg);
542
 
543
    tcg_out_modrm(s, 0xc1 | rexw, 5, r1); /* shr $x, r1 */
544
    tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); 
545
    
546
    tcg_out_modrm(s, 0x81 | rexw, 4, r0); /* andl $x, r0 */
547
    tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
548
    
549
    tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
550
    tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
551

    
552
    /* lea offset(r1, env), r1 */
553
    tcg_out_modrm_offset2(s, 0x8d | P_REXW, r1, r1, TCG_AREG0, 0,
554
                          offsetof(CPUState, tlb_table[mem_index][0].addr_read));
555

    
556
    /* cmp 0(r1), r0 */
557
    tcg_out_modrm_offset(s, 0x3b | rexw, r0, r1, 0);
558
    
559
    /* mov */
560
    tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg);
561
    
562
    /* je label1 */
563
    tcg_out8(s, 0x70 + JCC_JE);
564
    label1_ptr = s->code_ptr;
565
    s->code_ptr++;
566

    
567
    /* XXX: move that code at the end of the TB */
568
    tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_RSI, mem_index);
569
    tcg_out8(s, 0xe8);
570
    tcg_out32(s, (tcg_target_long)qemu_ld_helpers[s_bits] - 
571
              (tcg_target_long)s->code_ptr - 4);
572

    
573
    switch(opc) {
574
    case 0 | 4:
575
        /* movsbq */
576
        tcg_out_modrm(s, 0xbe | P_EXT | P_REXW, data_reg, TCG_REG_RAX);
577
        break;
578
    case 1 | 4:
579
        /* movswq */
580
        tcg_out_modrm(s, 0xbf | P_EXT | P_REXW, data_reg, TCG_REG_RAX);
581
        break;
582
    case 2 | 4:
583
        /* movslq */
584
        tcg_out_modrm(s, 0x63 | P_REXW, data_reg, TCG_REG_RAX);
585
        break;
586
    case 0:
587
    case 1:
588
    case 2:
589
    default:
590
        /* movl */
591
        tcg_out_modrm(s, 0x8b, data_reg, TCG_REG_RAX);
592
        break;
593
    case 3:
594
        tcg_out_mov(s, data_reg, TCG_REG_RAX);
595
        break;
596
    }
597

    
598
    /* jmp label2 */
599
    tcg_out8(s, 0xeb);
600
    label2_ptr = s->code_ptr;
601
    s->code_ptr++;
602
    
603
    /* label1: */
604
    *label1_ptr = s->code_ptr - label1_ptr - 1;
605

    
606
    /* add x(r1), r0 */
607
    tcg_out_modrm_offset(s, 0x03 | P_REXW, r0, r1, offsetof(CPUTLBEntry, addend) - 
608
                         offsetof(CPUTLBEntry, addr_read));
609
#else
610
    r0 = addr_reg;
611
#endif    
612

    
613
#ifdef TARGET_WORDS_BIGENDIAN
614
    bswap = 1;
615
#else
616
    bswap = 0;
617
#endif
618
    switch(opc) {
619
    case 0:
620
        /* movzbl */
621
        tcg_out_modrm_offset(s, 0xb6 | P_EXT, data_reg, r0, 0);
622
        break;
623
    case 0 | 4:
624
        /* movsbX */
625
        tcg_out_modrm_offset(s, 0xbe | P_EXT | rexw, data_reg, r0, 0);
626
        break;
627
    case 1:
628
        /* movzwl */
629
        tcg_out_modrm_offset(s, 0xb7 | P_EXT, data_reg, r0, 0);
630
        if (bswap) {
631
            /* rolw $8, data_reg */
632
            tcg_out8(s, 0x66); 
633
            tcg_out_modrm(s, 0xc1, 0, data_reg);
634
            tcg_out8(s, 8);
635
        }
636
        break;
637
    case 1 | 4:
638
        if (bswap) {
639
            /* movzwl */
640
            tcg_out_modrm_offset(s, 0xb7 | P_EXT, data_reg, r0, 0);
641
            /* rolw $8, data_reg */
642
            tcg_out8(s, 0x66); 
643
            tcg_out_modrm(s, 0xc1, 0, data_reg);
644
            tcg_out8(s, 8);
645

    
646
            /* movswX data_reg, data_reg */
647
            tcg_out_modrm(s, 0xbf | P_EXT | rexw, data_reg, data_reg);
648
        } else {
649
            /* movswX */
650
            tcg_out_modrm_offset(s, 0xbf | P_EXT | rexw, data_reg, r0, 0);
651
        }
652
        break;
653
    case 2:
654
        /* movl (r0), data_reg */
655
        tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0);
656
        if (bswap) {
657
            /* bswap */
658
            tcg_out_opc(s, (0xc8 + (data_reg & 7)) | P_EXT, 0, data_reg, 0);
659
        }
660
        break;
661
    case 2 | 4:
662
        if (bswap) {
663
            /* movl (r0), data_reg */
664
            tcg_out_modrm_offset(s, 0x8b, data_reg, r0, 0);
665
            /* bswap */
666
            tcg_out_opc(s, (0xc8 + (data_reg & 7)) | P_EXT, 0, data_reg, 0);
667
            /* movslq */
668
            tcg_out_modrm(s, 0x63 | P_REXW, data_reg, data_reg);
669
        } else {
670
            /* movslq */
671
            tcg_out_modrm_offset(s, 0x63 | P_REXW, data_reg, r0, 0);
672
        }
673
        break;
674
    case 3:
675
        /* movq (r0), data_reg */
676
        tcg_out_modrm_offset(s, 0x8b | P_REXW, data_reg, r0, 0);
677
        if (bswap) {
678
            /* bswap */
679
            tcg_out_opc(s, (0xc8 + (data_reg & 7)) | P_EXT | P_REXW, 0, data_reg, 0);
680
        }
681
        break;
682
    default:
683
        tcg_abort();
684
    }
685

    
686
#if defined(CONFIG_SOFTMMU)
687
    /* label2: */
688
    *label2_ptr = s->code_ptr - label2_ptr - 1;
689
#endif
690
}
691

    
692
static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
693
                            int opc)
694
{
695
    int addr_reg, data_reg, r0, r1, mem_index, s_bits, bswap, rexw;
696
#if defined(CONFIG_SOFTMMU)
697
    uint8_t *label1_ptr, *label2_ptr;
698
#endif
699

    
700
    data_reg = *args++;
701
    addr_reg = *args++;
702
    mem_index = *args;
703

    
704
    s_bits = opc;
705

    
706
    r0 = TCG_REG_RDI;
707
    r1 = TCG_REG_RSI;
708

    
709
#if TARGET_LONG_BITS == 32
710
    rexw = 0;
711
#else
712
    rexw = P_REXW;
713
#endif
714
#if defined(CONFIG_SOFTMMU)
715
    /* mov */
716
    tcg_out_modrm(s, 0x8b | rexw, r1, addr_reg);
717

    
718
    /* mov */
719
    tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg);
720
 
721
    tcg_out_modrm(s, 0xc1 | rexw, 5, r1); /* shr $x, r1 */
722
    tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS); 
723
    
724
    tcg_out_modrm(s, 0x81 | rexw, 4, r0); /* andl $x, r0 */
725
    tcg_out32(s, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
726
    
727
    tcg_out_modrm(s, 0x81, 4, r1); /* andl $x, r1 */
728
    tcg_out32(s, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
729

    
730
    /* lea offset(r1, env), r1 */
731
    tcg_out_modrm_offset2(s, 0x8d | P_REXW, r1, r1, TCG_AREG0, 0,
732
                          offsetof(CPUState, tlb_table[mem_index][0].addr_write));
733

    
734
    /* cmp 0(r1), r0 */
735
    tcg_out_modrm_offset(s, 0x3b | rexw, r0, r1, 0);
736
    
737
    /* mov */
738
    tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg);
739
    
740
    /* je label1 */
741
    tcg_out8(s, 0x70 + JCC_JE);
742
    label1_ptr = s->code_ptr;
743
    s->code_ptr++;
744

    
745
    /* XXX: move that code at the end of the TB */
746
    switch(opc) {
747
    case 0:
748
        /* movzbl */
749
        tcg_out_modrm(s, 0xb6 | P_EXT, TCG_REG_RSI, data_reg);
750
        break;
751
    case 1:
752
        /* movzwl */
753
        tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_RSI, data_reg);
754
        break;
755
    case 2:
756
        /* movl */
757
        tcg_out_modrm(s, 0x8b, TCG_REG_RSI, data_reg);
758
        break;
759
    default:
760
    case 3:
761
        tcg_out_mov(s, TCG_REG_RSI, data_reg);
762
        break;
763
    }
764
    tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_RDX, mem_index);
765
    tcg_out8(s, 0xe8);
766
    tcg_out32(s, (tcg_target_long)qemu_st_helpers[s_bits] - 
767
              (tcg_target_long)s->code_ptr - 4);
768

    
769
    /* jmp label2 */
770
    tcg_out8(s, 0xeb);
771
    label2_ptr = s->code_ptr;
772
    s->code_ptr++;
773
    
774
    /* label1: */
775
    *label1_ptr = s->code_ptr - label1_ptr - 1;
776

    
777
    /* add x(r1), r0 */
778
    tcg_out_modrm_offset(s, 0x03 | P_REXW, r0, r1, offsetof(CPUTLBEntry, addend) - 
779
                         offsetof(CPUTLBEntry, addr_write));
780
#else
781
    r0 = addr_reg;
782
#endif
783

    
784
#ifdef TARGET_WORDS_BIGENDIAN
785
    bswap = 1;
786
#else
787
    bswap = 0;
788
#endif
789
    switch(opc) {
790
    case 0:
791
        /* movb */
792
        tcg_out_modrm_offset(s, 0x88 | P_REX, data_reg, r0, 0);
793
        break;
794
    case 1:
795
        if (bswap) {
796
            tcg_out_modrm(s, 0x8b, r1, data_reg); /* movl */
797
            tcg_out8(s, 0x66); /* rolw $8, %ecx */
798
            tcg_out_modrm(s, 0xc1, 0, r1);
799
            tcg_out8(s, 8);
800
            data_reg = r1;
801
        }
802
        /* movw */
803
        tcg_out8(s, 0x66);
804
        tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
805
        break;
806
    case 2:
807
        if (bswap) {
808
            tcg_out_modrm(s, 0x8b, r1, data_reg); /* movl */
809
            /* bswap data_reg */
810
            tcg_out_opc(s, (0xc8 + r1) | P_EXT, 0, r1, 0);
811
            data_reg = r1;
812
        }
813
        /* movl */
814
        tcg_out_modrm_offset(s, 0x89, data_reg, r0, 0);
815
        break;
816
    case 3:
817
        if (bswap) {
818
            tcg_out_mov(s, r1, data_reg);
819
            /* bswap data_reg */
820
            tcg_out_opc(s, (0xc8 + r1) | P_EXT | P_REXW, 0, r1, 0);
821
            data_reg = r1;
822
        }
823
        /* movq */
824
        tcg_out_modrm_offset(s, 0x89 | P_REXW, data_reg, r0, 0);
825
        break;
826
    default:
827
        tcg_abort();
828
    }
829

    
830
#if defined(CONFIG_SOFTMMU)
831
    /* label2: */
832
    *label2_ptr = s->code_ptr - label2_ptr - 1;
833
#endif
834
}
835

    
836
static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
837
                              const int *const_args)
838
{
839
    int c;
840
    
841
    switch(opc) {
842
    case INDEX_op_exit_tb:
843
        tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_RAX, args[0]);
844
        tcg_out8(s, 0xc3); /* ret */
845
        break;
846
    case INDEX_op_goto_tb:
847
        if (s->tb_jmp_offset) {
848
            /* direct jump method */
849
            tcg_out8(s, 0xe9); /* jmp im */
850
            s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
851
            tcg_out32(s, 0);
852
        } else {
853
            /* indirect jump method */
854
            /* jmp Ev */
855
            tcg_out_modrm_offset(s, 0xff, 4, -1, 
856
                                 (tcg_target_long)(s->tb_next + 
857
                                                   args[0]));
858
        }
859
        s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
860
        break;
861
    case INDEX_op_call:
862
        if (const_args[0]) {
863
            tcg_out8(s, 0xe8);
864
            tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
865
        } else {
866
            tcg_out_modrm(s, 0xff, 2, args[0]);
867
        }
868
        break;
869
    case INDEX_op_jmp:
870
        if (const_args[0]) {
871
            tcg_out8(s, 0xe9);
872
            tcg_out32(s, args[0] - (tcg_target_long)s->code_ptr - 4);
873
        } else {
874
            tcg_out_modrm(s, 0xff, 4, args[0]);
875
        }
876
        break;
877
    case INDEX_op_br:
878
        tcg_out_jxx(s, JCC_JMP, args[0]);
879
        break;
880
    case INDEX_op_movi_i32:
881
        tcg_out_movi(s, TCG_TYPE_I32, args[0], (uint32_t)args[1]);
882
        break;
883
    case INDEX_op_movi_i64:
884
        tcg_out_movi(s, TCG_TYPE_I64, args[0], args[1]);
885
        break;
886
    case INDEX_op_ld8u_i32:
887
    case INDEX_op_ld8u_i64:
888
        /* movzbl */
889
        tcg_out_modrm_offset(s, 0xb6 | P_EXT, args[0], args[1], args[2]);
890
        break;
891
    case INDEX_op_ld8s_i32:
892
        /* movsbl */
893
        tcg_out_modrm_offset(s, 0xbe | P_EXT, args[0], args[1], args[2]);
894
        break;
895
    case INDEX_op_ld8s_i64:
896
        /* movsbq */
897
        tcg_out_modrm_offset(s, 0xbe | P_EXT | P_REXW, args[0], args[1], args[2]);
898
        break;
899
    case INDEX_op_ld16u_i32:
900
    case INDEX_op_ld16u_i64:
901
        /* movzwl */
902
        tcg_out_modrm_offset(s, 0xb7 | P_EXT, args[0], args[1], args[2]);
903
        break;
904
    case INDEX_op_ld16s_i32:
905
        /* movswl */
906
        tcg_out_modrm_offset(s, 0xbf | P_EXT, args[0], args[1], args[2]);
907
        break;
908
    case INDEX_op_ld16s_i64:
909
        /* movswq */
910
        tcg_out_modrm_offset(s, 0xbf | P_EXT | P_REXW, args[0], args[1], args[2]);
911
        break;
912
    case INDEX_op_ld_i32:
913
    case INDEX_op_ld32u_i64:
914
        /* movl */
915
        tcg_out_modrm_offset(s, 0x8b, args[0], args[1], args[2]);
916
        break;
917
    case INDEX_op_ld32s_i64:
918
        /* movslq */
919
        tcg_out_modrm_offset(s, 0x63 | P_REXW, args[0], args[1], args[2]);
920
        break;
921
    case INDEX_op_ld_i64:
922
        /* movq */
923
        tcg_out_modrm_offset(s, 0x8b | P_REXW, args[0], args[1], args[2]);
924
        break;
925
        
926
    case INDEX_op_st8_i32:
927
    case INDEX_op_st8_i64:
928
        /* movb */
929
        tcg_out_modrm_offset(s, 0x88 | P_REX, args[0], args[1], args[2]);
930
        break;
931
    case INDEX_op_st16_i32:
932
    case INDEX_op_st16_i64:
933
        /* movw */
934
        tcg_out8(s, 0x66);
935
        tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
936
        break;
937
    case INDEX_op_st_i32:
938
    case INDEX_op_st32_i64:
939
        /* movl */
940
        tcg_out_modrm_offset(s, 0x89, args[0], args[1], args[2]);
941
        break;
942
    case INDEX_op_st_i64:
943
        /* movq */
944
        tcg_out_modrm_offset(s, 0x89 | P_REXW, args[0], args[1], args[2]);
945
        break;
946

    
947
    case INDEX_op_sub_i32:
948
        c = ARITH_SUB;
949
        goto gen_arith32;
950
    case INDEX_op_and_i32:
951
        c = ARITH_AND;
952
        goto gen_arith32;
953
    case INDEX_op_or_i32:
954
        c = ARITH_OR;
955
        goto gen_arith32;
956
    case INDEX_op_xor_i32:
957
        c = ARITH_XOR;
958
        goto gen_arith32;
959
    case INDEX_op_add_i32:
960
        c = ARITH_ADD;
961
    gen_arith32:
962
        if (const_args[2]) {
963
            tgen_arithi32(s, c, args[0], args[2]);
964
        } else {
965
            tcg_out_modrm(s, 0x01 | (c << 3), args[2], args[0]);
966
        }
967
        break;
968

    
969
    case INDEX_op_sub_i64:
970
        c = ARITH_SUB;
971
        goto gen_arith64;
972
    case INDEX_op_and_i64:
973
        c = ARITH_AND;
974
        goto gen_arith64;
975
    case INDEX_op_or_i64:
976
        c = ARITH_OR;
977
        goto gen_arith64;
978
    case INDEX_op_xor_i64:
979
        c = ARITH_XOR;
980
        goto gen_arith64;
981
    case INDEX_op_add_i64:
982
        c = ARITH_ADD;
983
    gen_arith64:
984
        if (const_args[2]) {
985
            tgen_arithi64(s, c, args[0], args[2]);
986
        } else {
987
            tcg_out_modrm(s, 0x01 | (c << 3) | P_REXW, args[2], args[0]);
988
        }
989
        break;
990

    
991
    case INDEX_op_mul_i32:
992
        if (const_args[2]) {
993
            int32_t val;
994
            val = args[2];
995
            if (val == (int8_t)val) {
996
                tcg_out_modrm(s, 0x6b, args[0], args[0]);
997
                tcg_out8(s, val);
998
            } else {
999
                tcg_out_modrm(s, 0x69, args[0], args[0]);
1000
                tcg_out32(s, val);
1001
            }
1002
        } else {
1003
            tcg_out_modrm(s, 0xaf | P_EXT, args[0], args[2]);
1004
        }
1005
        break;
1006
    case INDEX_op_mul_i64:
1007
        if (const_args[2]) {
1008
            int32_t val;
1009
            val = args[2];
1010
            if (val == (int8_t)val) {
1011
                tcg_out_modrm(s, 0x6b | P_REXW, args[0], args[0]);
1012
                tcg_out8(s, val);
1013
            } else {
1014
                tcg_out_modrm(s, 0x69 | P_REXW, args[0], args[0]);
1015
                tcg_out32(s, val);
1016
            }
1017
        } else {
1018
            tcg_out_modrm(s, 0xaf | P_EXT | P_REXW, args[0], args[2]);
1019
        }
1020
        break;
1021
    case INDEX_op_div2_i32:
1022
        tcg_out_modrm(s, 0xf7, 7, args[4]);
1023
        break;
1024
    case INDEX_op_divu2_i32:
1025
        tcg_out_modrm(s, 0xf7, 6, args[4]);
1026
        break;
1027
    case INDEX_op_div2_i64:
1028
        tcg_out_modrm(s, 0xf7 | P_REXW, 7, args[4]);
1029
        break;
1030
    case INDEX_op_divu2_i64:
1031
        tcg_out_modrm(s, 0xf7 | P_REXW, 6, args[4]);
1032
        break;
1033

    
1034
    case INDEX_op_shl_i32:
1035
        c = SHIFT_SHL;
1036
    gen_shift32:
1037
        if (const_args[2]) {
1038
            if (args[2] == 1) {
1039
                tcg_out_modrm(s, 0xd1, c, args[0]);
1040
            } else {
1041
                tcg_out_modrm(s, 0xc1, c, args[0]);
1042
                tcg_out8(s, args[2]);
1043
            }
1044
        } else {
1045
            tcg_out_modrm(s, 0xd3, c, args[0]);
1046
        }
1047
        break;
1048
    case INDEX_op_shr_i32:
1049
        c = SHIFT_SHR;
1050
        goto gen_shift32;
1051
    case INDEX_op_sar_i32:
1052
        c = SHIFT_SAR;
1053
        goto gen_shift32;
1054
        
1055
    case INDEX_op_shl_i64:
1056
        c = SHIFT_SHL;
1057
    gen_shift64:
1058
        if (const_args[2]) {
1059
            if (args[2] == 1) {
1060
                tcg_out_modrm(s, 0xd1 | P_REXW, c, args[0]);
1061
            } else {
1062
                tcg_out_modrm(s, 0xc1 | P_REXW, c, args[0]);
1063
                tcg_out8(s, args[2]);
1064
            }
1065
        } else {
1066
            tcg_out_modrm(s, 0xd3 | P_REXW, c, args[0]);
1067
        }
1068
        break;
1069
    case INDEX_op_shr_i64:
1070
        c = SHIFT_SHR;
1071
        goto gen_shift64;
1072
    case INDEX_op_sar_i64:
1073
        c = SHIFT_SAR;
1074
        goto gen_shift64;
1075
        
1076
    case INDEX_op_brcond_i32:
1077
        tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], 
1078
                       args[3], 0);
1079
        break;
1080
    case INDEX_op_brcond_i64:
1081
        tcg_out_brcond(s, args[2], args[0], args[1], const_args[1], 
1082
                       args[3], P_REXW);
1083
        break;
1084

    
1085
    case INDEX_op_bswap_i32:
1086
        tcg_out_opc(s, (0xc8 + (args[0] & 7)) | P_EXT, 0, args[0], 0);
1087
        break;
1088
    case INDEX_op_bswap_i64:
1089
        tcg_out_opc(s, (0xc8 + (args[0] & 7)) | P_EXT | P_REXW, 0, args[0], 0);
1090
        break;
1091

    
1092
    case INDEX_op_qemu_ld8u:
1093
        tcg_out_qemu_ld(s, args, 0);
1094
        break;
1095
    case INDEX_op_qemu_ld8s:
1096
        tcg_out_qemu_ld(s, args, 0 | 4);
1097
        break;
1098
    case INDEX_op_qemu_ld16u:
1099
        tcg_out_qemu_ld(s, args, 1);
1100
        break;
1101
    case INDEX_op_qemu_ld16s:
1102
        tcg_out_qemu_ld(s, args, 1 | 4);
1103
        break;
1104
    case INDEX_op_qemu_ld32u:
1105
        tcg_out_qemu_ld(s, args, 2);
1106
        break;
1107
    case INDEX_op_qemu_ld32s:
1108
        tcg_out_qemu_ld(s, args, 2 | 4);
1109
        break;
1110
    case INDEX_op_qemu_ld64:
1111
        tcg_out_qemu_ld(s, args, 3);
1112
        break;
1113
        
1114
    case INDEX_op_qemu_st8:
1115
        tcg_out_qemu_st(s, args, 0);
1116
        break;
1117
    case INDEX_op_qemu_st16:
1118
        tcg_out_qemu_st(s, args, 1);
1119
        break;
1120
    case INDEX_op_qemu_st32:
1121
        tcg_out_qemu_st(s, args, 2);
1122
        break;
1123
    case INDEX_op_qemu_st64:
1124
        tcg_out_qemu_st(s, args, 3);
1125
        break;
1126

    
1127
    default:
1128
        tcg_abort();
1129
    }
1130
}
1131

    
1132
static const TCGTargetOpDef x86_64_op_defs[] = {
1133
    { INDEX_op_exit_tb, { } },
1134
    { INDEX_op_goto_tb, { } },
1135
    { INDEX_op_call, { "ri" } }, /* XXX: might need a specific constant constraint */
1136
    { INDEX_op_jmp, { "ri" } }, /* XXX: might need a specific constant constraint */
1137
    { INDEX_op_br, { } },
1138

    
1139
    { INDEX_op_mov_i32, { "r", "r" } },
1140
    { INDEX_op_movi_i32, { "r" } },
1141
    { INDEX_op_ld8u_i32, { "r", "r" } },
1142
    { INDEX_op_ld8s_i32, { "r", "r" } },
1143
    { INDEX_op_ld16u_i32, { "r", "r" } },
1144
    { INDEX_op_ld16s_i32, { "r", "r" } },
1145
    { INDEX_op_ld_i32, { "r", "r" } },
1146
    { INDEX_op_st8_i32, { "r", "r" } },
1147
    { INDEX_op_st16_i32, { "r", "r" } },
1148
    { INDEX_op_st_i32, { "r", "r" } },
1149

    
1150
    { INDEX_op_add_i32, { "r", "0", "ri" } },
1151
    { INDEX_op_mul_i32, { "r", "0", "ri" } },
1152
    { INDEX_op_div2_i32, { "a", "d", "0", "1", "r" } },
1153
    { INDEX_op_divu2_i32, { "a", "d", "0", "1", "r" } },
1154
    { INDEX_op_sub_i32, { "r", "0", "ri" } },
1155
    { INDEX_op_and_i32, { "r", "0", "ri" } },
1156
    { INDEX_op_or_i32, { "r", "0", "ri" } },
1157
    { INDEX_op_xor_i32, { "r", "0", "ri" } },
1158

    
1159
    { INDEX_op_shl_i32, { "r", "0", "ci" } },
1160
    { INDEX_op_shr_i32, { "r", "0", "ci" } },
1161
    { INDEX_op_sar_i32, { "r", "0", "ci" } },
1162

    
1163
    { INDEX_op_brcond_i32, { "r", "ri" } },
1164

    
1165
    { INDEX_op_mov_i64, { "r", "r" } },
1166
    { INDEX_op_movi_i64, { "r" } },
1167
    { INDEX_op_ld8u_i64, { "r", "r" } },
1168
    { INDEX_op_ld8s_i64, { "r", "r" } },
1169
    { INDEX_op_ld16u_i64, { "r", "r" } },
1170
    { INDEX_op_ld16s_i64, { "r", "r" } },
1171
    { INDEX_op_ld32u_i64, { "r", "r" } },
1172
    { INDEX_op_ld32s_i64, { "r", "r" } },
1173
    { INDEX_op_ld_i64, { "r", "r" } },
1174
    { INDEX_op_st8_i64, { "r", "r" } },
1175
    { INDEX_op_st16_i64, { "r", "r" } },
1176
    { INDEX_op_st32_i64, { "r", "r" } },
1177
    { INDEX_op_st_i64, { "r", "r" } },
1178

    
1179
    { INDEX_op_add_i64, { "r", "0", "re" } },
1180
    { INDEX_op_mul_i64, { "r", "0", "re" } },
1181
    { INDEX_op_div2_i64, { "a", "d", "0", "1", "r" } },
1182
    { INDEX_op_divu2_i64, { "a", "d", "0", "1", "r" } },
1183
    { INDEX_op_sub_i64, { "r", "0", "re" } },
1184
    { INDEX_op_and_i64, { "r", "0", "reZ" } },
1185
    { INDEX_op_or_i64, { "r", "0", "re" } },
1186
    { INDEX_op_xor_i64, { "r", "0", "re" } },
1187

    
1188
    { INDEX_op_shl_i64, { "r", "0", "ci" } },
1189
    { INDEX_op_shr_i64, { "r", "0", "ci" } },
1190
    { INDEX_op_sar_i64, { "r", "0", "ci" } },
1191

    
1192
    { INDEX_op_brcond_i64, { "r", "re" } },
1193

    
1194
    { INDEX_op_bswap_i32, { "r", "0" } },
1195
    { INDEX_op_bswap_i64, { "r", "0" } },
1196

    
1197
    { INDEX_op_qemu_ld8u, { "r", "L" } },
1198
    { INDEX_op_qemu_ld8s, { "r", "L" } },
1199
    { INDEX_op_qemu_ld16u, { "r", "L" } },
1200
    { INDEX_op_qemu_ld16s, { "r", "L" } },
1201
    { INDEX_op_qemu_ld32u, { "r", "L" } },
1202
    { INDEX_op_qemu_ld32s, { "r", "L" } },
1203
    { INDEX_op_qemu_ld64, { "r", "L" } },
1204

    
1205
    { INDEX_op_qemu_st8, { "L", "L" } },
1206
    { INDEX_op_qemu_st16, { "L", "L" } },
1207
    { INDEX_op_qemu_st32, { "L", "L" } },
1208
    { INDEX_op_qemu_st64, { "L", "L", "L" } },
1209

    
1210
    { -1 },
1211
};
1212

    
1213
void tcg_target_init(TCGContext *s)
1214
{
1215
    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);
1216
    tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffff);
1217
    tcg_regset_set32(tcg_target_call_clobber_regs, 0,
1218
                     (1 << TCG_REG_RDI) | 
1219
                     (1 << TCG_REG_RSI) | 
1220
                     (1 << TCG_REG_RDX) |
1221
                     (1 << TCG_REG_RCX) |
1222
                     (1 << TCG_REG_R8) |
1223
                     (1 << TCG_REG_R9) |
1224
                     (1 << TCG_REG_RAX) |
1225
                     (1 << TCG_REG_R10) |
1226
                     (1 << TCG_REG_R11));
1227
    
1228
    tcg_regset_clear(s->reserved_regs);
1229
    tcg_regset_set_reg(s->reserved_regs, TCG_REG_RSP);
1230
    /* XXX: will be suppresed when proper global TB entry code will be
1231
       generated */
1232
    tcg_regset_set_reg(s->reserved_regs, TCG_REG_RBX);
1233
    tcg_regset_set_reg(s->reserved_regs, TCG_REG_RBP);
1234
    
1235
    tcg_add_target_add_op_defs(x86_64_op_defs);
1236
}