root / target-i386 / machine.c @ f6584ee2
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#include "hw/hw.h" |
---|---|
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#include "hw/boards.h" |
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#include "hw/pc.h" |
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#include "hw/isa.h" |
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|
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#include "exec-all.h" |
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#include "kvm.h" |
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|
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static const VMStateDescription vmstate_segment = { |
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.name = "segment",
|
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
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VMSTATE_UINT32(selector, SegmentCache), |
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VMSTATE_UINTTL(base, SegmentCache), |
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VMSTATE_UINT32(limit, SegmentCache), |
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VMSTATE_UINT32(flags, SegmentCache), |
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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#define VMSTATE_SEGMENT(_field, _state) { \
|
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.name = (stringify(_field)), \ |
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.size = sizeof(SegmentCache), \
|
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.vmsd = &vmstate_segment, \ |
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.flags = VMS_STRUCT, \ |
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.offset = offsetof(_state, _field) \ |
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+ type_check(SegmentCache,typeof_field(_state, _field)) \ |
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} |
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|
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#define VMSTATE_SEGMENT_ARRAY(_field, _state, _n) \
|
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VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_segment, SegmentCache)
|
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|
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static const VMStateDescription vmstate_xmm_reg = { |
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.name = "xmm_reg",
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
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VMSTATE_UINT64(XMM_Q(0), XMMReg),
|
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VMSTATE_UINT64(XMM_Q(1), XMMReg),
|
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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#define VMSTATE_XMM_REGS(_field, _state, _n) \
|
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VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)
|
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|
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/* YMMH format is the same as XMM */
|
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static const VMStateDescription vmstate_ymmh_reg = { |
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.name = "ymmh_reg",
|
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
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VMSTATE_UINT64(XMM_Q(0), XMMReg),
|
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VMSTATE_UINT64(XMM_Q(1), XMMReg),
|
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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#define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v) \
|
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VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_ymmh_reg, XMMReg) |
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|
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static const VMStateDescription vmstate_mtrr_var = { |
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.name = "mtrr_var",
|
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.version_id = 1,
|
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.minimum_version_id = 1,
|
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.minimum_version_id_old = 1,
|
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.fields = (VMStateField []) { |
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VMSTATE_UINT64(base, MTRRVar), |
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VMSTATE_UINT64(mask, MTRRVar), |
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VMSTATE_END_OF_LIST() |
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} |
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}; |
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|
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#define VMSTATE_MTRR_VARS(_field, _state, _n, _v) \
|
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VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar) |
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|
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static void put_fpreg_error(QEMUFile *f, void *opaque, size_t size) |
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{ |
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fprintf(stderr, "call put_fpreg() with invalid arguments\n");
|
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exit(0);
|
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} |
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|
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#ifdef USE_X86LDOUBLE
|
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/* XXX: add that in a FPU generic layer */
|
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union x86_longdouble {
|
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uint64_t mant; |
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uint16_t exp; |
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}; |
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|
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#define MANTD1(fp) (fp & ((1LL << 52) - 1)) |
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#define EXPBIAS1 1023 |
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#define EXPD1(fp) ((fp >> 52) & 0x7FF) |
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#define SIGND1(fp) ((fp >> 32) & 0x80000000) |
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|
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static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp) |
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{ |
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int e;
|
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/* mantissa */
|
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p->mant = (MANTD1(temp) << 11) | (1LL << 63); |
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/* exponent + sign */
|
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e = EXPD1(temp) - EXPBIAS1 + 16383;
|
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e |= SIGND1(temp) >> 16;
|
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p->exp = e; |
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} |
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|
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static int get_fpreg(QEMUFile *f, void *opaque, size_t size) |
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{ |
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FPReg *fp_reg = opaque; |
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uint64_t mant; |
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uint16_t exp; |
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|
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qemu_get_be64s(f, &mant); |
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qemu_get_be16s(f, &exp); |
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fp_reg->d = cpu_set_fp80(mant, exp); |
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return 0; |
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} |
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|
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static void put_fpreg(QEMUFile *f, void *opaque, size_t size) |
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{ |
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FPReg *fp_reg = opaque; |
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uint64_t mant; |
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uint16_t exp; |
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/* we save the real CPU data (in case of MMX usage only 'mant'
|
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contains the MMX register */
|
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cpu_get_fp80(&mant, &exp, fp_reg->d); |
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qemu_put_be64s(f, &mant); |
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qemu_put_be16s(f, &exp); |
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} |
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|
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static const VMStateInfo vmstate_fpreg = { |
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.name = "fpreg",
|
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.get = get_fpreg, |
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.put = put_fpreg, |
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}; |
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|
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static int get_fpreg_1_mmx(QEMUFile *f, void *opaque, size_t size) |
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{ |
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union x86_longdouble *p = opaque;
|
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uint64_t mant; |
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|
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qemu_get_be64s(f, &mant); |
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p->mant = mant; |
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p->exp = 0xffff;
|
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return 0; |
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} |
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|
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static const VMStateInfo vmstate_fpreg_1_mmx = { |
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.name = "fpreg_1_mmx",
|
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.get = get_fpreg_1_mmx, |
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.put = put_fpreg_error, |
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}; |
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|
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static int get_fpreg_1_no_mmx(QEMUFile *f, void *opaque, size_t size) |
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{ |
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union x86_longdouble *p = opaque;
|
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uint64_t mant; |
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|
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qemu_get_be64s(f, &mant); |
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fp64_to_fp80(p, mant); |
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return 0; |
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} |
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|
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static const VMStateInfo vmstate_fpreg_1_no_mmx = { |
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.name = "fpreg_1_no_mmx",
|
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.get = get_fpreg_1_no_mmx, |
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.put = put_fpreg_error, |
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}; |
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|
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static bool fpregs_is_0(void *opaque, int version_id) |
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{ |
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CPUState *env = opaque; |
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|
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return (env->fpregs_format_vmstate == 0); |
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} |
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|
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static bool fpregs_is_1_mmx(void *opaque, int version_id) |
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{ |
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CPUState *env = opaque; |
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int guess_mmx;
|
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|
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guess_mmx = ((env->fptag_vmstate == 0xff) &&
|
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(env->fpus_vmstate & 0x3800) == 0); |
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return (guess_mmx && (env->fpregs_format_vmstate == 1)); |
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} |
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|
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static bool fpregs_is_1_no_mmx(void *opaque, int version_id) |
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{ |
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CPUState *env = opaque; |
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int guess_mmx;
|
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|
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guess_mmx = ((env->fptag_vmstate == 0xff) &&
|
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(env->fpus_vmstate & 0x3800) == 0); |
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return (!guess_mmx && (env->fpregs_format_vmstate == 1)); |
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} |
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|
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#define VMSTATE_FP_REGS(_field, _state, _n) \
|
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0, vmstate_fpreg, FPReg), \ |
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \ |
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg) |
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|
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#else
|
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static int get_fpreg(QEMUFile *f, void *opaque, size_t size) |
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{ |
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FPReg *fp_reg = opaque; |
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|
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qemu_get_be64s(f, &fp_reg->mmx.MMX_Q(0));
|
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return 0; |
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} |
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|
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static void put_fpreg(QEMUFile *f, void *opaque, size_t size) |
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{ |
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FPReg *fp_reg = opaque; |
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/* if we use doubles for float emulation, we save the doubles to
|
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avoid losing information in case of MMX usage. It can give
|
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problems if the image is restored on a CPU where long
|
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doubles are used instead. */
|
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qemu_put_be64s(f, &fp_reg->mmx.MMX_Q(0));
|
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} |
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|
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const VMStateInfo vmstate_fpreg = {
|
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.name = "fpreg",
|
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.get = get_fpreg, |
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.put = put_fpreg, |
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}; |
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|
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static int get_fpreg_0_mmx(QEMUFile *f, void *opaque, size_t size) |
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{ |
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FPReg *fp_reg = opaque; |
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uint64_t mant; |
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uint16_t exp; |
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|
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qemu_get_be64s(f, &mant); |
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qemu_get_be16s(f, &exp); |
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fp_reg->mmx.MMX_Q(0) = mant;
|
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return 0; |
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} |
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|
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const VMStateInfo vmstate_fpreg_0_mmx = {
|
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.name = "fpreg_0_mmx",
|
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.get = get_fpreg_0_mmx, |
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.put = put_fpreg_error, |
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}; |
247 |
|
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static int get_fpreg_0_no_mmx(QEMUFile *f, void *opaque, size_t size) |
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{ |
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FPReg *fp_reg = opaque; |
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uint64_t mant; |
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uint16_t exp; |
253 |
|
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qemu_get_be64s(f, &mant); |
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qemu_get_be16s(f, &exp); |
256 |
|
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fp_reg->d = cpu_set_fp80(mant, exp); |
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return 0; |
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} |
260 |
|
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const VMStateInfo vmstate_fpreg_0_no_mmx = {
|
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.name = "fpreg_0_no_mmx",
|
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.get = get_fpreg_0_no_mmx, |
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.put = put_fpreg_error, |
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}; |
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|
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static bool fpregs_is_1(void *opaque, int version_id) |
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{ |
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CPUState *env = opaque; |
270 |
|
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return env->fpregs_format_vmstate == 1; |
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} |
273 |
|
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static bool fpregs_is_0_mmx(void *opaque, int version_id) |
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{ |
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CPUState *env = opaque; |
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int guess_mmx;
|
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|
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guess_mmx = ((env->fptag_vmstate == 0xff) &&
|
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(env->fpus_vmstate & 0x3800) == 0); |
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return guess_mmx && env->fpregs_format_vmstate == 0; |
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} |
283 |
|
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static bool fpregs_is_0_no_mmx(void *opaque, int version_id) |
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{ |
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CPUState *env = opaque; |
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int guess_mmx;
|
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|
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guess_mmx = ((env->fptag_vmstate == 0xff) &&
|
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(env->fpus_vmstate & 0x3800) == 0); |
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return !guess_mmx && env->fpregs_format_vmstate == 0; |
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} |
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|
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#define VMSTATE_FP_REGS(_field, _state, _n) \
|
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1, vmstate_fpreg, FPReg), \ |
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_mmx, vmstate_fpreg_0_mmx, FPReg), \ |
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VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0_no_mmx, vmstate_fpreg_0_no_mmx, FPReg) |
298 |
|
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#endif /* USE_X86LDOUBLE */ |
300 |
|
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static bool version_is_5(void *opaque, int version_id) |
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{ |
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return version_id == 5; |
304 |
} |
305 |
|
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#ifdef TARGET_X86_64
|
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static bool less_than_7(void *opaque, int version_id) |
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{ |
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return version_id < 7; |
310 |
} |
311 |
|
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static int get_uint64_as_uint32(QEMUFile *f, void *pv, size_t size) |
313 |
{ |
314 |
uint64_t *v = pv; |
315 |
*v = qemu_get_be32(f); |
316 |
return 0; |
317 |
} |
318 |
|
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static void put_uint64_as_uint32(QEMUFile *f, void *pv, size_t size) |
320 |
{ |
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uint64_t *v = pv; |
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qemu_put_be32(f, *v); |
323 |
} |
324 |
|
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static const VMStateInfo vmstate_hack_uint64_as_uint32 = { |
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.name = "uint64_as_uint32",
|
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.get = get_uint64_as_uint32, |
328 |
.put = put_uint64_as_uint32, |
329 |
}; |
330 |
|
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#define VMSTATE_HACK_UINT32(_f, _s, _t) \
|
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VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint64_as_uint32, uint64_t)
|
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#endif
|
334 |
|
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static void cpu_pre_save(void *opaque) |
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{ |
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CPUState *env = opaque; |
338 |
int i;
|
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|
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/* FPU */
|
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env->fpus_vmstate = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; |
342 |
env->fptag_vmstate = 0;
|
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for(i = 0; i < 8; i++) { |
344 |
env->fptag_vmstate |= ((!env->fptags[i]) << i); |
345 |
} |
346 |
|
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#ifdef USE_X86LDOUBLE
|
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env->fpregs_format_vmstate = 0;
|
349 |
#else
|
350 |
env->fpregs_format_vmstate = 1;
|
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#endif
|
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} |
353 |
|
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static int cpu_post_load(void *opaque, int version_id) |
355 |
{ |
356 |
CPUState *env = opaque; |
357 |
int i;
|
358 |
|
359 |
/* XXX: restore FPU round state */
|
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env->fpstt = (env->fpus_vmstate >> 11) & 7; |
361 |
env->fpus = env->fpus_vmstate & ~0x3800;
|
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env->fptag_vmstate ^= 0xff;
|
363 |
for(i = 0; i < 8; i++) { |
364 |
env->fptags[i] = (env->fptag_vmstate >> i) & 1;
|
365 |
} |
366 |
|
367 |
cpu_breakpoint_remove_all(env, BP_CPU); |
368 |
cpu_watchpoint_remove_all(env, BP_CPU); |
369 |
for (i = 0; i < 4; i++) |
370 |
hw_breakpoint_insert(env, i); |
371 |
|
372 |
tlb_flush(env, 1);
|
373 |
return 0; |
374 |
} |
375 |
|
376 |
static bool async_pf_msr_needed(void *opaque) |
377 |
{ |
378 |
CPUState *cpu = opaque; |
379 |
|
380 |
return cpu->async_pf_en_msr != 0; |
381 |
} |
382 |
|
383 |
static const VMStateDescription vmstate_async_pf_msr = { |
384 |
.name = "cpu/async_pf_msr",
|
385 |
.version_id = 1,
|
386 |
.minimum_version_id = 1,
|
387 |
.minimum_version_id_old = 1,
|
388 |
.fields = (VMStateField []) { |
389 |
VMSTATE_UINT64(async_pf_en_msr, CPUState), |
390 |
VMSTATE_END_OF_LIST() |
391 |
} |
392 |
}; |
393 |
|
394 |
static const VMStateDescription vmstate_cpu = { |
395 |
.name = "cpu",
|
396 |
.version_id = CPU_SAVE_VERSION, |
397 |
.minimum_version_id = 3,
|
398 |
.minimum_version_id_old = 3,
|
399 |
.pre_save = cpu_pre_save, |
400 |
.post_load = cpu_post_load, |
401 |
.fields = (VMStateField []) { |
402 |
VMSTATE_UINTTL_ARRAY(regs, CPUState, CPU_NB_REGS), |
403 |
VMSTATE_UINTTL(eip, CPUState), |
404 |
VMSTATE_UINTTL(eflags, CPUState), |
405 |
VMSTATE_UINT32(hflags, CPUState), |
406 |
/* FPU */
|
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VMSTATE_UINT16(fpuc, CPUState), |
408 |
VMSTATE_UINT16(fpus_vmstate, CPUState), |
409 |
VMSTATE_UINT16(fptag_vmstate, CPUState), |
410 |
VMSTATE_UINT16(fpregs_format_vmstate, CPUState), |
411 |
VMSTATE_FP_REGS(fpregs, CPUState, 8),
|
412 |
|
413 |
VMSTATE_SEGMENT_ARRAY(segs, CPUState, 6),
|
414 |
VMSTATE_SEGMENT(ldt, CPUState), |
415 |
VMSTATE_SEGMENT(tr, CPUState), |
416 |
VMSTATE_SEGMENT(gdt, CPUState), |
417 |
VMSTATE_SEGMENT(idt, CPUState), |
418 |
|
419 |
VMSTATE_UINT32(sysenter_cs, CPUState), |
420 |
#ifdef TARGET_X86_64
|
421 |
/* Hack: In v7 size changed from 32 to 64 bits on x86_64 */
|
422 |
VMSTATE_HACK_UINT32(sysenter_esp, CPUState, less_than_7), |
423 |
VMSTATE_HACK_UINT32(sysenter_eip, CPUState, less_than_7), |
424 |
VMSTATE_UINTTL_V(sysenter_esp, CPUState, 7),
|
425 |
VMSTATE_UINTTL_V(sysenter_eip, CPUState, 7),
|
426 |
#else
|
427 |
VMSTATE_UINTTL(sysenter_esp, CPUState), |
428 |
VMSTATE_UINTTL(sysenter_eip, CPUState), |
429 |
#endif
|
430 |
|
431 |
VMSTATE_UINTTL(cr[0], CPUState),
|
432 |
VMSTATE_UINTTL(cr[2], CPUState),
|
433 |
VMSTATE_UINTTL(cr[3], CPUState),
|
434 |
VMSTATE_UINTTL(cr[4], CPUState),
|
435 |
VMSTATE_UINTTL_ARRAY(dr, CPUState, 8),
|
436 |
/* MMU */
|
437 |
VMSTATE_INT32(a20_mask, CPUState), |
438 |
/* XMM */
|
439 |
VMSTATE_UINT32(mxcsr, CPUState), |
440 |
VMSTATE_XMM_REGS(xmm_regs, CPUState, CPU_NB_REGS), |
441 |
|
442 |
#ifdef TARGET_X86_64
|
443 |
VMSTATE_UINT64(efer, CPUState), |
444 |
VMSTATE_UINT64(star, CPUState), |
445 |
VMSTATE_UINT64(lstar, CPUState), |
446 |
VMSTATE_UINT64(cstar, CPUState), |
447 |
VMSTATE_UINT64(fmask, CPUState), |
448 |
VMSTATE_UINT64(kernelgsbase, CPUState), |
449 |
#endif
|
450 |
VMSTATE_UINT32_V(smbase, CPUState, 4),
|
451 |
|
452 |
VMSTATE_UINT64_V(pat, CPUState, 5),
|
453 |
VMSTATE_UINT32_V(hflags2, CPUState, 5),
|
454 |
|
455 |
VMSTATE_UINT32_TEST(halted, CPUState, version_is_5), |
456 |
VMSTATE_UINT64_V(vm_hsave, CPUState, 5),
|
457 |
VMSTATE_UINT64_V(vm_vmcb, CPUState, 5),
|
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VMSTATE_UINT64_V(tsc_offset, CPUState, 5),
|
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VMSTATE_UINT64_V(intercept, CPUState, 5),
|
460 |
VMSTATE_UINT16_V(intercept_cr_read, CPUState, 5),
|
461 |
VMSTATE_UINT16_V(intercept_cr_write, CPUState, 5),
|
462 |
VMSTATE_UINT16_V(intercept_dr_read, CPUState, 5),
|
463 |
VMSTATE_UINT16_V(intercept_dr_write, CPUState, 5),
|
464 |
VMSTATE_UINT32_V(intercept_exceptions, CPUState, 5),
|
465 |
VMSTATE_UINT8_V(v_tpr, CPUState, 5),
|
466 |
/* MTRRs */
|
467 |
VMSTATE_UINT64_ARRAY_V(mtrr_fixed, CPUState, 11, 8), |
468 |
VMSTATE_UINT64_V(mtrr_deftype, CPUState, 8),
|
469 |
VMSTATE_MTRR_VARS(mtrr_var, CPUState, 8, 8), |
470 |
/* KVM-related states */
|
471 |
VMSTATE_INT32_V(interrupt_injected, CPUState, 9),
|
472 |
VMSTATE_UINT32_V(mp_state, CPUState, 9),
|
473 |
VMSTATE_UINT64_V(tsc, CPUState, 9),
|
474 |
VMSTATE_INT32_V(exception_injected, CPUState, 11),
|
475 |
VMSTATE_UINT8_V(soft_interrupt, CPUState, 11),
|
476 |
VMSTATE_UINT8_V(nmi_injected, CPUState, 11),
|
477 |
VMSTATE_UINT8_V(nmi_pending, CPUState, 11),
|
478 |
VMSTATE_UINT8_V(has_error_code, CPUState, 11),
|
479 |
VMSTATE_UINT32_V(sipi_vector, CPUState, 11),
|
480 |
/* MCE */
|
481 |
VMSTATE_UINT64_V(mcg_cap, CPUState, 10),
|
482 |
VMSTATE_UINT64_V(mcg_status, CPUState, 10),
|
483 |
VMSTATE_UINT64_V(mcg_ctl, CPUState, 10),
|
484 |
VMSTATE_UINT64_ARRAY_V(mce_banks, CPUState, MCE_BANKS_DEF *4, 10), |
485 |
/* rdtscp */
|
486 |
VMSTATE_UINT64_V(tsc_aux, CPUState, 11),
|
487 |
/* KVM pvclock msr */
|
488 |
VMSTATE_UINT64_V(system_time_msr, CPUState, 11),
|
489 |
VMSTATE_UINT64_V(wall_clock_msr, CPUState, 11),
|
490 |
/* XSAVE related fields */
|
491 |
VMSTATE_UINT64_V(xcr0, CPUState, 12),
|
492 |
VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
|
493 |
VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
|
494 |
VMSTATE_END_OF_LIST() |
495 |
/* The above list is not sorted /wrt version numbers, watch out! */
|
496 |
}, |
497 |
.subsections = (VMStateSubsection []) { |
498 |
{ |
499 |
.vmsd = &vmstate_async_pf_msr, |
500 |
.needed = async_pf_msr_needed, |
501 |
} , { |
502 |
/* empty */
|
503 |
} |
504 |
} |
505 |
}; |
506 |
|
507 |
void cpu_save(QEMUFile *f, void *opaque) |
508 |
{ |
509 |
vmstate_save_state(f, &vmstate_cpu, opaque); |
510 |
} |
511 |
|
512 |
int cpu_load(QEMUFile *f, void *opaque, int version_id) |
513 |
{ |
514 |
return vmstate_load_state(f, &vmstate_cpu, opaque, version_id);
|
515 |
} |