Revision f65ed4c1 hw/e1000.c

b/hw/e1000.c
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                uint32_t addr, uint32_t size, int type)
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{
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    E1000State *d = (E1000State *)pci_dev;
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    int i;
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    const uint32_t excluded_regs[] = {
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        E1000_MDIC, E1000_ICR, E1000_ICS, E1000_IMS,
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        E1000_IMC, E1000_TCTL, E1000_TDT, PNPMMIO_SIZE
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    };
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    DBGOUT(MMIO, "e1000_mmio_map addr=0x%08x 0x%08x\n", addr, size);
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    cpu_register_physical_memory(addr, PNPMMIO_SIZE, d->mmio_index);
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    qemu_register_coalesced_mmio(addr, excluded_regs[0]);
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    for (i = 0; excluded_regs[i] != PNPMMIO_SIZE; i++)
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        qemu_register_coalesced_mmio(addr + excluded_regs[i] + 4,
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                                     excluded_regs[i + 1] -
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                                     excluded_regs[i] - 4);
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}
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void

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