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1 | 05330448 | aliguori | /*
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2 | 05330448 | aliguori | * QEMU KVM support
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3 | 05330448 | aliguori | *
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4 | 05330448 | aliguori | * Copyright (C) 2006-2008 Qumranet Technologies
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5 | 05330448 | aliguori | * Copyright IBM, Corp. 2008
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6 | 05330448 | aliguori | *
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7 | 05330448 | aliguori | * Authors:
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8 | 05330448 | aliguori | * Anthony Liguori <aliguori@us.ibm.com>
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9 | 05330448 | aliguori | *
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10 | 05330448 | aliguori | * This work is licensed under the terms of the GNU GPL, version 2 or later.
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11 | 05330448 | aliguori | * See the COPYING file in the top-level directory.
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12 | 05330448 | aliguori | *
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13 | 05330448 | aliguori | */
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14 | 05330448 | aliguori | |
15 | 05330448 | aliguori | #include <sys/types.h> |
16 | 05330448 | aliguori | #include <sys/ioctl.h> |
17 | 05330448 | aliguori | #include <sys/mman.h> |
18 | 05330448 | aliguori | |
19 | 05330448 | aliguori | #include <linux/kvm.h> |
20 | 05330448 | aliguori | |
21 | 05330448 | aliguori | #include "qemu-common.h" |
22 | 05330448 | aliguori | #include "sysemu.h" |
23 | 05330448 | aliguori | #include "kvm.h" |
24 | 05330448 | aliguori | #include "cpu.h" |
25 | e22a25c9 | aliguori | #include "gdbstub.h" |
26 | 0e607a80 | Jan Kiszka | #include "host-utils.h" |
27 | 4c5b10b7 | Jes Sorensen | #include "hw/pc.h" |
28 | 408392b3 | Sheng Yang | #include "hw/apic.h" |
29 | 35bed8ee | Paul Brook | #include "ioport.h" |
30 | e7701825 | Marcelo Tosatti | #include "kvm_x86.h" |
31 | 05330448 | aliguori | |
32 | bb0300dc | Gleb Natapov | #ifdef CONFIG_KVM_PARA
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33 | bb0300dc | Gleb Natapov | #include <linux/kvm_para.h> |
34 | bb0300dc | Gleb Natapov | #endif
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35 | bb0300dc | Gleb Natapov | //
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36 | 05330448 | aliguori | //#define DEBUG_KVM
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37 | 05330448 | aliguori | |
38 | 05330448 | aliguori | #ifdef DEBUG_KVM
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39 | 8c0d577e | Blue Swirl | #define DPRINTF(fmt, ...) \
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40 | 05330448 | aliguori | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) |
41 | 05330448 | aliguori | #else
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42 | 8c0d577e | Blue Swirl | #define DPRINTF(fmt, ...) \
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43 | 05330448 | aliguori | do { } while (0) |
44 | 05330448 | aliguori | #endif
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45 | 05330448 | aliguori | |
46 | 1a03675d | Glauber Costa | #define MSR_KVM_WALL_CLOCK 0x11 |
47 | 1a03675d | Glauber Costa | #define MSR_KVM_SYSTEM_TIME 0x12 |
48 | 1a03675d | Glauber Costa | |
49 | c0532a76 | Marcelo Tosatti | #ifndef BUS_MCEERR_AR
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50 | c0532a76 | Marcelo Tosatti | #define BUS_MCEERR_AR 4 |
51 | c0532a76 | Marcelo Tosatti | #endif
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52 | c0532a76 | Marcelo Tosatti | #ifndef BUS_MCEERR_AO
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53 | c0532a76 | Marcelo Tosatti | #define BUS_MCEERR_AO 5 |
54 | c0532a76 | Marcelo Tosatti | #endif
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55 | c0532a76 | Marcelo Tosatti | |
56 | b827df58 | Avi Kivity | #ifdef KVM_CAP_EXT_CPUID
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57 | b827df58 | Avi Kivity | |
58 | b827df58 | Avi Kivity | static struct kvm_cpuid2 *try_get_cpuid(KVMState *s, int max) |
59 | b827df58 | Avi Kivity | { |
60 | b827df58 | Avi Kivity | struct kvm_cpuid2 *cpuid;
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61 | b827df58 | Avi Kivity | int r, size;
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62 | b827df58 | Avi Kivity | |
63 | b827df58 | Avi Kivity | size = sizeof(*cpuid) + max * sizeof(*cpuid->entries); |
64 | b827df58 | Avi Kivity | cpuid = (struct kvm_cpuid2 *)qemu_mallocz(size);
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65 | b827df58 | Avi Kivity | cpuid->nent = max; |
66 | b827df58 | Avi Kivity | r = kvm_ioctl(s, KVM_GET_SUPPORTED_CPUID, cpuid); |
67 | 76ae317f | Mark McLoughlin | if (r == 0 && cpuid->nent >= max) { |
68 | 76ae317f | Mark McLoughlin | r = -E2BIG; |
69 | 76ae317f | Mark McLoughlin | } |
70 | b827df58 | Avi Kivity | if (r < 0) { |
71 | b827df58 | Avi Kivity | if (r == -E2BIG) {
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72 | b827df58 | Avi Kivity | qemu_free(cpuid); |
73 | b827df58 | Avi Kivity | return NULL; |
74 | b827df58 | Avi Kivity | } else {
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75 | b827df58 | Avi Kivity | fprintf(stderr, "KVM_GET_SUPPORTED_CPUID failed: %s\n",
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76 | b827df58 | Avi Kivity | strerror(-r)); |
77 | b827df58 | Avi Kivity | exit(1);
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78 | b827df58 | Avi Kivity | } |
79 | b827df58 | Avi Kivity | } |
80 | b827df58 | Avi Kivity | return cpuid;
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81 | b827df58 | Avi Kivity | } |
82 | b827df58 | Avi Kivity | |
83 | c958a8bd | Sheng Yang | uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function, |
84 | c958a8bd | Sheng Yang | uint32_t index, int reg)
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85 | b827df58 | Avi Kivity | { |
86 | b827df58 | Avi Kivity | struct kvm_cpuid2 *cpuid;
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87 | b827df58 | Avi Kivity | int i, max;
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88 | b827df58 | Avi Kivity | uint32_t ret = 0;
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89 | b827df58 | Avi Kivity | uint32_t cpuid_1_edx; |
90 | b827df58 | Avi Kivity | |
91 | b827df58 | Avi Kivity | if (!kvm_check_extension(env->kvm_state, KVM_CAP_EXT_CPUID)) {
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92 | b827df58 | Avi Kivity | return -1U; |
93 | b827df58 | Avi Kivity | } |
94 | b827df58 | Avi Kivity | |
95 | b827df58 | Avi Kivity | max = 1;
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96 | b827df58 | Avi Kivity | while ((cpuid = try_get_cpuid(env->kvm_state, max)) == NULL) { |
97 | b827df58 | Avi Kivity | max *= 2;
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98 | b827df58 | Avi Kivity | } |
99 | b827df58 | Avi Kivity | |
100 | b827df58 | Avi Kivity | for (i = 0; i < cpuid->nent; ++i) { |
101 | c958a8bd | Sheng Yang | if (cpuid->entries[i].function == function &&
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102 | c958a8bd | Sheng Yang | cpuid->entries[i].index == index) { |
103 | b827df58 | Avi Kivity | switch (reg) {
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104 | b827df58 | Avi Kivity | case R_EAX:
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105 | b827df58 | Avi Kivity | ret = cpuid->entries[i].eax; |
106 | b827df58 | Avi Kivity | break;
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107 | b827df58 | Avi Kivity | case R_EBX:
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108 | b827df58 | Avi Kivity | ret = cpuid->entries[i].ebx; |
109 | b827df58 | Avi Kivity | break;
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110 | b827df58 | Avi Kivity | case R_ECX:
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111 | b827df58 | Avi Kivity | ret = cpuid->entries[i].ecx; |
112 | b827df58 | Avi Kivity | break;
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113 | b827df58 | Avi Kivity | case R_EDX:
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114 | b827df58 | Avi Kivity | ret = cpuid->entries[i].edx; |
115 | 19ccb8ea | Jan Kiszka | switch (function) {
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116 | 19ccb8ea | Jan Kiszka | case 1: |
117 | 19ccb8ea | Jan Kiszka | /* KVM before 2.6.30 misreports the following features */
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118 | 19ccb8ea | Jan Kiszka | ret |= CPUID_MTRR | CPUID_PAT | CPUID_MCE | CPUID_MCA; |
119 | 19ccb8ea | Jan Kiszka | break;
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120 | 19ccb8ea | Jan Kiszka | case 0x80000001: |
121 | b827df58 | Avi Kivity | /* On Intel, kvm returns cpuid according to the Intel spec,
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122 | b827df58 | Avi Kivity | * so add missing bits according to the AMD spec:
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123 | b827df58 | Avi Kivity | */
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124 | c958a8bd | Sheng Yang | cpuid_1_edx = kvm_arch_get_supported_cpuid(env, 1, 0, R_EDX); |
125 | c1667e40 | Gleb Natapov | ret |= cpuid_1_edx & 0x183f7ff;
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126 | 19ccb8ea | Jan Kiszka | break;
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127 | b827df58 | Avi Kivity | } |
128 | b827df58 | Avi Kivity | break;
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129 | b827df58 | Avi Kivity | } |
130 | b827df58 | Avi Kivity | } |
131 | b827df58 | Avi Kivity | } |
132 | b827df58 | Avi Kivity | |
133 | b827df58 | Avi Kivity | qemu_free(cpuid); |
134 | b827df58 | Avi Kivity | |
135 | b827df58 | Avi Kivity | return ret;
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136 | b827df58 | Avi Kivity | } |
137 | b827df58 | Avi Kivity | |
138 | b827df58 | Avi Kivity | #else
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139 | b827df58 | Avi Kivity | |
140 | c958a8bd | Sheng Yang | uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function, |
141 | c958a8bd | Sheng Yang | uint32_t index, int reg)
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142 | b827df58 | Avi Kivity | { |
143 | b827df58 | Avi Kivity | return -1U; |
144 | b827df58 | Avi Kivity | } |
145 | b827df58 | Avi Kivity | |
146 | b827df58 | Avi Kivity | #endif
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147 | b827df58 | Avi Kivity | |
148 | bb0300dc | Gleb Natapov | #ifdef CONFIG_KVM_PARA
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149 | bb0300dc | Gleb Natapov | struct kvm_para_features {
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150 | bb0300dc | Gleb Natapov | int cap;
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151 | bb0300dc | Gleb Natapov | int feature;
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152 | bb0300dc | Gleb Natapov | } para_features[] = { |
153 | bb0300dc | Gleb Natapov | #ifdef KVM_CAP_CLOCKSOURCE
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154 | bb0300dc | Gleb Natapov | { KVM_CAP_CLOCKSOURCE, KVM_FEATURE_CLOCKSOURCE }, |
155 | bb0300dc | Gleb Natapov | #endif
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156 | bb0300dc | Gleb Natapov | #ifdef KVM_CAP_NOP_IO_DELAY
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157 | bb0300dc | Gleb Natapov | { KVM_CAP_NOP_IO_DELAY, KVM_FEATURE_NOP_IO_DELAY }, |
158 | bb0300dc | Gleb Natapov | #endif
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159 | bb0300dc | Gleb Natapov | #ifdef KVM_CAP_PV_MMU
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160 | bb0300dc | Gleb Natapov | { KVM_CAP_PV_MMU, KVM_FEATURE_MMU_OP }, |
161 | bb0300dc | Gleb Natapov | #endif
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162 | bb0300dc | Gleb Natapov | { -1, -1 } |
163 | bb0300dc | Gleb Natapov | }; |
164 | bb0300dc | Gleb Natapov | |
165 | bb0300dc | Gleb Natapov | static int get_para_features(CPUState *env) |
166 | bb0300dc | Gleb Natapov | { |
167 | bb0300dc | Gleb Natapov | int i, features = 0; |
168 | bb0300dc | Gleb Natapov | |
169 | bb0300dc | Gleb Natapov | for (i = 0; i < ARRAY_SIZE(para_features) - 1; i++) { |
170 | bb0300dc | Gleb Natapov | if (kvm_check_extension(env->kvm_state, para_features[i].cap))
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171 | bb0300dc | Gleb Natapov | features |= (1 << para_features[i].feature);
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172 | bb0300dc | Gleb Natapov | } |
173 | bb0300dc | Gleb Natapov | |
174 | bb0300dc | Gleb Natapov | return features;
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175 | bb0300dc | Gleb Natapov | } |
176 | bb0300dc | Gleb Natapov | #endif
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177 | bb0300dc | Gleb Natapov | |
178 | e7701825 | Marcelo Tosatti | #ifdef KVM_CAP_MCE
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179 | e7701825 | Marcelo Tosatti | static int kvm_get_mce_cap_supported(KVMState *s, uint64_t *mce_cap, |
180 | e7701825 | Marcelo Tosatti | int *max_banks)
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181 | e7701825 | Marcelo Tosatti | { |
182 | e7701825 | Marcelo Tosatti | int r;
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183 | e7701825 | Marcelo Tosatti | |
184 | e7701825 | Marcelo Tosatti | r = kvm_ioctl(s, KVM_CHECK_EXTENSION, KVM_CAP_MCE); |
185 | e7701825 | Marcelo Tosatti | if (r > 0) { |
186 | e7701825 | Marcelo Tosatti | *max_banks = r; |
187 | e7701825 | Marcelo Tosatti | return kvm_ioctl(s, KVM_X86_GET_MCE_CAP_SUPPORTED, mce_cap);
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188 | e7701825 | Marcelo Tosatti | } |
189 | e7701825 | Marcelo Tosatti | return -ENOSYS;
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190 | e7701825 | Marcelo Tosatti | } |
191 | e7701825 | Marcelo Tosatti | |
192 | e7701825 | Marcelo Tosatti | static int kvm_setup_mce(CPUState *env, uint64_t *mcg_cap) |
193 | e7701825 | Marcelo Tosatti | { |
194 | e7701825 | Marcelo Tosatti | return kvm_vcpu_ioctl(env, KVM_X86_SETUP_MCE, mcg_cap);
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195 | e7701825 | Marcelo Tosatti | } |
196 | e7701825 | Marcelo Tosatti | |
197 | e7701825 | Marcelo Tosatti | static int kvm_set_mce(CPUState *env, struct kvm_x86_mce *m) |
198 | e7701825 | Marcelo Tosatti | { |
199 | e7701825 | Marcelo Tosatti | return kvm_vcpu_ioctl(env, KVM_X86_SET_MCE, m);
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200 | e7701825 | Marcelo Tosatti | } |
201 | e7701825 | Marcelo Tosatti | |
202 | c0532a76 | Marcelo Tosatti | static int kvm_get_msr(CPUState *env, struct kvm_msr_entry *msrs, int n) |
203 | c0532a76 | Marcelo Tosatti | { |
204 | c0532a76 | Marcelo Tosatti | struct kvm_msrs *kmsrs = qemu_malloc(sizeof *kmsrs + n * sizeof *msrs); |
205 | c0532a76 | Marcelo Tosatti | int r;
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206 | c0532a76 | Marcelo Tosatti | |
207 | c0532a76 | Marcelo Tosatti | kmsrs->nmsrs = n; |
208 | c0532a76 | Marcelo Tosatti | memcpy(kmsrs->entries, msrs, n * sizeof *msrs);
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209 | c0532a76 | Marcelo Tosatti | r = kvm_vcpu_ioctl(env, KVM_GET_MSRS, kmsrs); |
210 | c0532a76 | Marcelo Tosatti | memcpy(msrs, kmsrs->entries, n * sizeof *msrs);
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211 | c0532a76 | Marcelo Tosatti | free(kmsrs); |
212 | c0532a76 | Marcelo Tosatti | return r;
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213 | c0532a76 | Marcelo Tosatti | } |
214 | c0532a76 | Marcelo Tosatti | |
215 | c0532a76 | Marcelo Tosatti | /* FIXME: kill this and kvm_get_msr, use env->mcg_status instead */
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216 | c0532a76 | Marcelo Tosatti | static int kvm_mce_in_exception(CPUState *env) |
217 | c0532a76 | Marcelo Tosatti | { |
218 | c0532a76 | Marcelo Tosatti | struct kvm_msr_entry msr_mcg_status = {
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219 | c0532a76 | Marcelo Tosatti | .index = MSR_MCG_STATUS, |
220 | c0532a76 | Marcelo Tosatti | }; |
221 | c0532a76 | Marcelo Tosatti | int r;
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222 | c0532a76 | Marcelo Tosatti | |
223 | c0532a76 | Marcelo Tosatti | r = kvm_get_msr(env, &msr_mcg_status, 1);
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224 | c0532a76 | Marcelo Tosatti | if (r == -1 || r == 0) { |
225 | c0532a76 | Marcelo Tosatti | return -1; |
226 | c0532a76 | Marcelo Tosatti | } |
227 | c0532a76 | Marcelo Tosatti | return !!(msr_mcg_status.data & MCG_STATUS_MCIP);
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228 | c0532a76 | Marcelo Tosatti | } |
229 | c0532a76 | Marcelo Tosatti | |
230 | e7701825 | Marcelo Tosatti | struct kvm_x86_mce_data
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231 | e7701825 | Marcelo Tosatti | { |
232 | e7701825 | Marcelo Tosatti | CPUState *env; |
233 | e7701825 | Marcelo Tosatti | struct kvm_x86_mce *mce;
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234 | c0532a76 | Marcelo Tosatti | int abort_on_error;
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235 | e7701825 | Marcelo Tosatti | }; |
236 | e7701825 | Marcelo Tosatti | |
237 | e7701825 | Marcelo Tosatti | static void kvm_do_inject_x86_mce(void *_data) |
238 | e7701825 | Marcelo Tosatti | { |
239 | e7701825 | Marcelo Tosatti | struct kvm_x86_mce_data *data = _data;
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240 | e7701825 | Marcelo Tosatti | int r;
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241 | e7701825 | Marcelo Tosatti | |
242 | f8502cfb | Hidetoshi Seto | /* If there is an MCE exception being processed, ignore this SRAO MCE */
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243 | f8502cfb | Hidetoshi Seto | if ((data->env->mcg_cap & MCG_SER_P) &&
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244 | f8502cfb | Hidetoshi Seto | !(data->mce->status & MCI_STATUS_AR)) { |
245 | f8502cfb | Hidetoshi Seto | r = kvm_mce_in_exception(data->env); |
246 | f8502cfb | Hidetoshi Seto | if (r == -1) { |
247 | f8502cfb | Hidetoshi Seto | fprintf(stderr, "Failed to get MCE status\n");
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248 | f8502cfb | Hidetoshi Seto | } else if (r) { |
249 | f8502cfb | Hidetoshi Seto | return;
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250 | f8502cfb | Hidetoshi Seto | } |
251 | f8502cfb | Hidetoshi Seto | } |
252 | c0532a76 | Marcelo Tosatti | |
253 | e7701825 | Marcelo Tosatti | r = kvm_set_mce(data->env, data->mce); |
254 | c0532a76 | Marcelo Tosatti | if (r < 0) { |
255 | e7701825 | Marcelo Tosatti | perror("kvm_set_mce FAILED");
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256 | c0532a76 | Marcelo Tosatti | if (data->abort_on_error) {
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257 | c0532a76 | Marcelo Tosatti | abort(); |
258 | c0532a76 | Marcelo Tosatti | } |
259 | c0532a76 | Marcelo Tosatti | } |
260 | e7701825 | Marcelo Tosatti | } |
261 | e7701825 | Marcelo Tosatti | #endif
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262 | e7701825 | Marcelo Tosatti | |
263 | e7701825 | Marcelo Tosatti | void kvm_inject_x86_mce(CPUState *cenv, int bank, uint64_t status, |
264 | c0532a76 | Marcelo Tosatti | uint64_t mcg_status, uint64_t addr, uint64_t misc, |
265 | c0532a76 | Marcelo Tosatti | int abort_on_error)
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266 | e7701825 | Marcelo Tosatti | { |
267 | e7701825 | Marcelo Tosatti | #ifdef KVM_CAP_MCE
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268 | e7701825 | Marcelo Tosatti | struct kvm_x86_mce mce = {
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269 | e7701825 | Marcelo Tosatti | .bank = bank, |
270 | e7701825 | Marcelo Tosatti | .status = status, |
271 | e7701825 | Marcelo Tosatti | .mcg_status = mcg_status, |
272 | e7701825 | Marcelo Tosatti | .addr = addr, |
273 | e7701825 | Marcelo Tosatti | .misc = misc, |
274 | e7701825 | Marcelo Tosatti | }; |
275 | e7701825 | Marcelo Tosatti | struct kvm_x86_mce_data data = {
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276 | e7701825 | Marcelo Tosatti | .env = cenv, |
277 | e7701825 | Marcelo Tosatti | .mce = &mce, |
278 | e7701825 | Marcelo Tosatti | }; |
279 | e7701825 | Marcelo Tosatti | |
280 | c0532a76 | Marcelo Tosatti | if (!cenv->mcg_cap) {
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281 | c0532a76 | Marcelo Tosatti | fprintf(stderr, "MCE support is not enabled!\n");
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282 | c0532a76 | Marcelo Tosatti | return;
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283 | c0532a76 | Marcelo Tosatti | } |
284 | c0532a76 | Marcelo Tosatti | |
285 | e7701825 | Marcelo Tosatti | run_on_cpu(cenv, kvm_do_inject_x86_mce, &data); |
286 | c0532a76 | Marcelo Tosatti | #else
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287 | c0532a76 | Marcelo Tosatti | if (abort_on_error)
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288 | c0532a76 | Marcelo Tosatti | abort(); |
289 | e7701825 | Marcelo Tosatti | #endif
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290 | e7701825 | Marcelo Tosatti | } |
291 | e7701825 | Marcelo Tosatti | |
292 | 05330448 | aliguori | int kvm_arch_init_vcpu(CPUState *env)
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293 | 05330448 | aliguori | { |
294 | 05330448 | aliguori | struct {
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295 | 486bd5a2 | aliguori | struct kvm_cpuid2 cpuid;
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296 | 486bd5a2 | aliguori | struct kvm_cpuid_entry2 entries[100]; |
297 | 05330448 | aliguori | } __attribute__((packed)) cpuid_data; |
298 | 486bd5a2 | aliguori | uint32_t limit, i, j, cpuid_i; |
299 | a33609ca | aliguori | uint32_t unused; |
300 | bb0300dc | Gleb Natapov | struct kvm_cpuid_entry2 *c;
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301 | bb0300dc | Gleb Natapov | #ifdef KVM_CPUID_SIGNATURE
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302 | bb0300dc | Gleb Natapov | uint32_t signature[3];
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303 | bb0300dc | Gleb Natapov | #endif
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304 | 05330448 | aliguori | |
305 | f8d926e9 | Jan Kiszka | env->mp_state = KVM_MP_STATE_RUNNABLE; |
306 | f8d926e9 | Jan Kiszka | |
307 | c958a8bd | Sheng Yang | env->cpuid_features &= kvm_arch_get_supported_cpuid(env, 1, 0, R_EDX); |
308 | 6c0d7ee8 | Andre Przywara | |
309 | 6c0d7ee8 | Andre Przywara | i = env->cpuid_ext_features & CPUID_EXT_HYPERVISOR; |
310 | c958a8bd | Sheng Yang | env->cpuid_ext_features &= kvm_arch_get_supported_cpuid(env, 1, 0, R_ECX); |
311 | 6c0d7ee8 | Andre Przywara | env->cpuid_ext_features |= i; |
312 | 6c0d7ee8 | Andre Przywara | |
313 | 457dfed6 | Andre Przywara | env->cpuid_ext2_features &= kvm_arch_get_supported_cpuid(env, 0x80000001,
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314 | c958a8bd | Sheng Yang | 0, R_EDX);
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315 | 457dfed6 | Andre Przywara | env->cpuid_ext3_features &= kvm_arch_get_supported_cpuid(env, 0x80000001,
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316 | c958a8bd | Sheng Yang | 0, R_ECX);
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317 | 296acb64 | Joerg Roedel | env->cpuid_svm_features &= kvm_arch_get_supported_cpuid(env, 0x8000000A,
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318 | 296acb64 | Joerg Roedel | 0, R_EDX);
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319 | 296acb64 | Joerg Roedel | |
320 | 6c1f42fe | Andre Przywara | |
321 | 05330448 | aliguori | cpuid_i = 0;
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322 | 05330448 | aliguori | |
323 | bb0300dc | Gleb Natapov | #ifdef CONFIG_KVM_PARA
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324 | bb0300dc | Gleb Natapov | /* Paravirtualization CPUIDs */
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325 | bb0300dc | Gleb Natapov | memcpy(signature, "KVMKVMKVM\0\0\0", 12); |
326 | bb0300dc | Gleb Natapov | c = &cpuid_data.entries[cpuid_i++]; |
327 | bb0300dc | Gleb Natapov | memset(c, 0, sizeof(*c)); |
328 | bb0300dc | Gleb Natapov | c->function = KVM_CPUID_SIGNATURE; |
329 | bb0300dc | Gleb Natapov | c->eax = 0;
|
330 | bb0300dc | Gleb Natapov | c->ebx = signature[0];
|
331 | bb0300dc | Gleb Natapov | c->ecx = signature[1];
|
332 | bb0300dc | Gleb Natapov | c->edx = signature[2];
|
333 | bb0300dc | Gleb Natapov | |
334 | bb0300dc | Gleb Natapov | c = &cpuid_data.entries[cpuid_i++]; |
335 | bb0300dc | Gleb Natapov | memset(c, 0, sizeof(*c)); |
336 | bb0300dc | Gleb Natapov | c->function = KVM_CPUID_FEATURES; |
337 | bb0300dc | Gleb Natapov | c->eax = env->cpuid_kvm_features & get_para_features(env); |
338 | bb0300dc | Gleb Natapov | #endif
|
339 | bb0300dc | Gleb Natapov | |
340 | a33609ca | aliguori | cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused); |
341 | 05330448 | aliguori | |
342 | 05330448 | aliguori | for (i = 0; i <= limit; i++) { |
343 | bb0300dc | Gleb Natapov | c = &cpuid_data.entries[cpuid_i++]; |
344 | 486bd5a2 | aliguori | |
345 | 486bd5a2 | aliguori | switch (i) {
|
346 | a36b1029 | aliguori | case 2: { |
347 | a36b1029 | aliguori | /* Keep reading function 2 till all the input is received */
|
348 | a36b1029 | aliguori | int times;
|
349 | a36b1029 | aliguori | |
350 | a36b1029 | aliguori | c->function = i; |
351 | a33609ca | aliguori | c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC | |
352 | a33609ca | aliguori | KVM_CPUID_FLAG_STATE_READ_NEXT; |
353 | a33609ca | aliguori | cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
|
354 | a33609ca | aliguori | times = c->eax & 0xff;
|
355 | a36b1029 | aliguori | |
356 | a36b1029 | aliguori | for (j = 1; j < times; ++j) { |
357 | a33609ca | aliguori | c = &cpuid_data.entries[cpuid_i++]; |
358 | a36b1029 | aliguori | c->function = i; |
359 | a33609ca | aliguori | c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC; |
360 | a33609ca | aliguori | cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
|
361 | a36b1029 | aliguori | } |
362 | a36b1029 | aliguori | break;
|
363 | a36b1029 | aliguori | } |
364 | 486bd5a2 | aliguori | case 4: |
365 | 486bd5a2 | aliguori | case 0xb: |
366 | 486bd5a2 | aliguori | case 0xd: |
367 | 486bd5a2 | aliguori | for (j = 0; ; j++) { |
368 | 486bd5a2 | aliguori | c->function = i; |
369 | 486bd5a2 | aliguori | c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; |
370 | 486bd5a2 | aliguori | c->index = j; |
371 | a33609ca | aliguori | cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx); |
372 | 486bd5a2 | aliguori | |
373 | a33609ca | aliguori | if (i == 4 && c->eax == 0) |
374 | 486bd5a2 | aliguori | break;
|
375 | a33609ca | aliguori | if (i == 0xb && !(c->ecx & 0xff00)) |
376 | 486bd5a2 | aliguori | break;
|
377 | a33609ca | aliguori | if (i == 0xd && c->eax == 0) |
378 | 486bd5a2 | aliguori | break;
|
379 | a33609ca | aliguori | |
380 | a33609ca | aliguori | c = &cpuid_data.entries[cpuid_i++]; |
381 | 486bd5a2 | aliguori | } |
382 | 486bd5a2 | aliguori | break;
|
383 | 486bd5a2 | aliguori | default:
|
384 | 486bd5a2 | aliguori | c->function = i; |
385 | a33609ca | aliguori | c->flags = 0;
|
386 | a33609ca | aliguori | cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
|
387 | 486bd5a2 | aliguori | break;
|
388 | 486bd5a2 | aliguori | } |
389 | 05330448 | aliguori | } |
390 | a33609ca | aliguori | cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused); |
391 | 05330448 | aliguori | |
392 | 05330448 | aliguori | for (i = 0x80000000; i <= limit; i++) { |
393 | bb0300dc | Gleb Natapov | c = &cpuid_data.entries[cpuid_i++]; |
394 | 05330448 | aliguori | |
395 | 05330448 | aliguori | c->function = i; |
396 | a33609ca | aliguori | c->flags = 0;
|
397 | a33609ca | aliguori | cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
|
398 | 05330448 | aliguori | } |
399 | 05330448 | aliguori | |
400 | 05330448 | aliguori | cpuid_data.cpuid.nent = cpuid_i; |
401 | 05330448 | aliguori | |
402 | e7701825 | Marcelo Tosatti | #ifdef KVM_CAP_MCE
|
403 | e7701825 | Marcelo Tosatti | if (((env->cpuid_version >> 8)&0xF) >= 6 |
404 | e7701825 | Marcelo Tosatti | && (env->cpuid_features&(CPUID_MCE|CPUID_MCA)) == (CPUID_MCE|CPUID_MCA) |
405 | e7701825 | Marcelo Tosatti | && kvm_check_extension(env->kvm_state, KVM_CAP_MCE) > 0) {
|
406 | e7701825 | Marcelo Tosatti | uint64_t mcg_cap; |
407 | e7701825 | Marcelo Tosatti | int banks;
|
408 | e7701825 | Marcelo Tosatti | |
409 | e7701825 | Marcelo Tosatti | if (kvm_get_mce_cap_supported(env->kvm_state, &mcg_cap, &banks))
|
410 | e7701825 | Marcelo Tosatti | perror("kvm_get_mce_cap_supported FAILED");
|
411 | e7701825 | Marcelo Tosatti | else {
|
412 | e7701825 | Marcelo Tosatti | if (banks > MCE_BANKS_DEF)
|
413 | e7701825 | Marcelo Tosatti | banks = MCE_BANKS_DEF; |
414 | e7701825 | Marcelo Tosatti | mcg_cap &= MCE_CAP_DEF; |
415 | e7701825 | Marcelo Tosatti | mcg_cap |= banks; |
416 | e7701825 | Marcelo Tosatti | if (kvm_setup_mce(env, &mcg_cap))
|
417 | e7701825 | Marcelo Tosatti | perror("kvm_setup_mce FAILED");
|
418 | e7701825 | Marcelo Tosatti | else
|
419 | e7701825 | Marcelo Tosatti | env->mcg_cap = mcg_cap; |
420 | e7701825 | Marcelo Tosatti | } |
421 | e7701825 | Marcelo Tosatti | } |
422 | e7701825 | Marcelo Tosatti | #endif
|
423 | e7701825 | Marcelo Tosatti | |
424 | 486bd5a2 | aliguori | return kvm_vcpu_ioctl(env, KVM_SET_CPUID2, &cpuid_data);
|
425 | 05330448 | aliguori | } |
426 | 05330448 | aliguori | |
427 | caa5af0f | Jan Kiszka | void kvm_arch_reset_vcpu(CPUState *env)
|
428 | caa5af0f | Jan Kiszka | { |
429 | e73223a5 | Gleb Natapov | env->exception_injected = -1;
|
430 | 0e607a80 | Jan Kiszka | env->interrupt_injected = -1;
|
431 | a0fb002c | Jan Kiszka | env->nmi_injected = 0;
|
432 | a0fb002c | Jan Kiszka | env->nmi_pending = 0;
|
433 | ddced198 | Marcelo Tosatti | if (kvm_irqchip_in_kernel()) {
|
434 | ddced198 | Marcelo Tosatti | env->mp_state = cpu_is_bsp(env) ? KVM_MP_STATE_RUNNABLE : |
435 | ddced198 | Marcelo Tosatti | KVM_MP_STATE_UNINITIALIZED; |
436 | ddced198 | Marcelo Tosatti | } else {
|
437 | ddced198 | Marcelo Tosatti | env->mp_state = KVM_MP_STATE_RUNNABLE; |
438 | ddced198 | Marcelo Tosatti | } |
439 | caa5af0f | Jan Kiszka | } |
440 | caa5af0f | Jan Kiszka | |
441 | 05330448 | aliguori | static int kvm_has_msr_star(CPUState *env) |
442 | 05330448 | aliguori | { |
443 | 05330448 | aliguori | static int has_msr_star; |
444 | 05330448 | aliguori | int ret;
|
445 | 05330448 | aliguori | |
446 | 05330448 | aliguori | /* first time */
|
447 | 05330448 | aliguori | if (has_msr_star == 0) { |
448 | 05330448 | aliguori | struct kvm_msr_list msr_list, *kvm_msr_list;
|
449 | 05330448 | aliguori | |
450 | 05330448 | aliguori | has_msr_star = -1;
|
451 | 05330448 | aliguori | |
452 | 05330448 | aliguori | /* Obtain MSR list from KVM. These are the MSRs that we must
|
453 | 05330448 | aliguori | * save/restore */
|
454 | 4c9f7372 | aliguori | msr_list.nmsrs = 0;
|
455 | 05330448 | aliguori | ret = kvm_ioctl(env->kvm_state, KVM_GET_MSR_INDEX_LIST, &msr_list); |
456 | 6fb6d245 | Jan Kiszka | if (ret < 0 && ret != -E2BIG) { |
457 | 05330448 | aliguori | return 0; |
458 | 6fb6d245 | Jan Kiszka | } |
459 | d9db889f | Jan Kiszka | /* Old kernel modules had a bug and could write beyond the provided
|
460 | d9db889f | Jan Kiszka | memory. Allocate at least a safe amount of 1K. */
|
461 | d9db889f | Jan Kiszka | kvm_msr_list = qemu_mallocz(MAX(1024, sizeof(msr_list) + |
462 | d9db889f | Jan Kiszka | msr_list.nmsrs * |
463 | d9db889f | Jan Kiszka | sizeof(msr_list.indices[0]))); |
464 | 05330448 | aliguori | |
465 | 55308450 | aliguori | kvm_msr_list->nmsrs = msr_list.nmsrs; |
466 | 05330448 | aliguori | ret = kvm_ioctl(env->kvm_state, KVM_GET_MSR_INDEX_LIST, kvm_msr_list); |
467 | 05330448 | aliguori | if (ret >= 0) { |
468 | 05330448 | aliguori | int i;
|
469 | 05330448 | aliguori | |
470 | 05330448 | aliguori | for (i = 0; i < kvm_msr_list->nmsrs; i++) { |
471 | 05330448 | aliguori | if (kvm_msr_list->indices[i] == MSR_STAR) {
|
472 | 05330448 | aliguori | has_msr_star = 1;
|
473 | 05330448 | aliguori | break;
|
474 | 05330448 | aliguori | } |
475 | 05330448 | aliguori | } |
476 | 05330448 | aliguori | } |
477 | 05330448 | aliguori | |
478 | 05330448 | aliguori | free(kvm_msr_list); |
479 | 05330448 | aliguori | } |
480 | 05330448 | aliguori | |
481 | 05330448 | aliguori | if (has_msr_star == 1) |
482 | 05330448 | aliguori | return 1; |
483 | 05330448 | aliguori | return 0; |
484 | 05330448 | aliguori | } |
485 | 05330448 | aliguori | |
486 | 20420430 | Sheng Yang | static int kvm_init_identity_map_page(KVMState *s) |
487 | 20420430 | Sheng Yang | { |
488 | 20420430 | Sheng Yang | #ifdef KVM_CAP_SET_IDENTITY_MAP_ADDR
|
489 | 20420430 | Sheng Yang | int ret;
|
490 | 20420430 | Sheng Yang | uint64_t addr = 0xfffbc000;
|
491 | 20420430 | Sheng Yang | |
492 | 20420430 | Sheng Yang | if (!kvm_check_extension(s, KVM_CAP_SET_IDENTITY_MAP_ADDR)) {
|
493 | 20420430 | Sheng Yang | return 0; |
494 | 20420430 | Sheng Yang | } |
495 | 20420430 | Sheng Yang | |
496 | 20420430 | Sheng Yang | ret = kvm_vm_ioctl(s, KVM_SET_IDENTITY_MAP_ADDR, &addr); |
497 | 20420430 | Sheng Yang | if (ret < 0) { |
498 | 20420430 | Sheng Yang | fprintf(stderr, "kvm_set_identity_map_addr: %s\n", strerror(ret));
|
499 | 20420430 | Sheng Yang | return ret;
|
500 | 20420430 | Sheng Yang | } |
501 | 20420430 | Sheng Yang | #endif
|
502 | 20420430 | Sheng Yang | return 0; |
503 | 20420430 | Sheng Yang | } |
504 | 20420430 | Sheng Yang | |
505 | 05330448 | aliguori | int kvm_arch_init(KVMState *s, int smp_cpus) |
506 | 05330448 | aliguori | { |
507 | 05330448 | aliguori | int ret;
|
508 | 05330448 | aliguori | |
509 | 05330448 | aliguori | /* create vm86 tss. KVM uses vm86 mode to emulate 16-bit code
|
510 | 05330448 | aliguori | * directly. In order to use vm86 mode, a TSS is needed. Since this
|
511 | 05330448 | aliguori | * must be part of guest physical memory, we need to allocate it. Older
|
512 | 05330448 | aliguori | * versions of KVM just assumed that it would be at the end of physical
|
513 | 05330448 | aliguori | * memory but that doesn't work with more than 4GB of memory. We simply
|
514 | 05330448 | aliguori | * refuse to work with those older versions of KVM. */
|
515 | 984b5181 | aliguori | ret = kvm_ioctl(s, KVM_CHECK_EXTENSION, KVM_CAP_SET_TSS_ADDR); |
516 | 05330448 | aliguori | if (ret <= 0) { |
517 | 05330448 | aliguori | fprintf(stderr, "kvm does not support KVM_CAP_SET_TSS_ADDR\n");
|
518 | 05330448 | aliguori | return ret;
|
519 | 05330448 | aliguori | } |
520 | 05330448 | aliguori | |
521 | 05330448 | aliguori | /* this address is 3 pages before the bios, and the bios should present
|
522 | 05330448 | aliguori | * as unavaible memory. FIXME, need to ensure the e820 map deals with
|
523 | 05330448 | aliguori | * this?
|
524 | 05330448 | aliguori | */
|
525 | 4c5b10b7 | Jes Sorensen | /*
|
526 | 4c5b10b7 | Jes Sorensen | * Tell fw_cfg to notify the BIOS to reserve the range.
|
527 | 4c5b10b7 | Jes Sorensen | */
|
528 | 4c5b10b7 | Jes Sorensen | if (e820_add_entry(0xfffbc000, 0x4000, E820_RESERVED) < 0) { |
529 | 4c5b10b7 | Jes Sorensen | perror("e820_add_entry() table is full");
|
530 | 4c5b10b7 | Jes Sorensen | exit(1);
|
531 | 4c5b10b7 | Jes Sorensen | } |
532 | 20420430 | Sheng Yang | ret = kvm_vm_ioctl(s, KVM_SET_TSS_ADDR, 0xfffbd000);
|
533 | 20420430 | Sheng Yang | if (ret < 0) { |
534 | 20420430 | Sheng Yang | return ret;
|
535 | 20420430 | Sheng Yang | } |
536 | 20420430 | Sheng Yang | |
537 | 20420430 | Sheng Yang | return kvm_init_identity_map_page(s);
|
538 | 05330448 | aliguori | } |
539 | 05330448 | aliguori | |
540 | 05330448 | aliguori | static void set_v8086_seg(struct kvm_segment *lhs, const SegmentCache *rhs) |
541 | 05330448 | aliguori | { |
542 | 05330448 | aliguori | lhs->selector = rhs->selector; |
543 | 05330448 | aliguori | lhs->base = rhs->base; |
544 | 05330448 | aliguori | lhs->limit = rhs->limit; |
545 | 05330448 | aliguori | lhs->type = 3;
|
546 | 05330448 | aliguori | lhs->present = 1;
|
547 | 05330448 | aliguori | lhs->dpl = 3;
|
548 | 05330448 | aliguori | lhs->db = 0;
|
549 | 05330448 | aliguori | lhs->s = 1;
|
550 | 05330448 | aliguori | lhs->l = 0;
|
551 | 05330448 | aliguori | lhs->g = 0;
|
552 | 05330448 | aliguori | lhs->avl = 0;
|
553 | 05330448 | aliguori | lhs->unusable = 0;
|
554 | 05330448 | aliguori | } |
555 | 05330448 | aliguori | |
556 | 05330448 | aliguori | static void set_seg(struct kvm_segment *lhs, const SegmentCache *rhs) |
557 | 05330448 | aliguori | { |
558 | 05330448 | aliguori | unsigned flags = rhs->flags;
|
559 | 05330448 | aliguori | lhs->selector = rhs->selector; |
560 | 05330448 | aliguori | lhs->base = rhs->base; |
561 | 05330448 | aliguori | lhs->limit = rhs->limit; |
562 | 05330448 | aliguori | lhs->type = (flags >> DESC_TYPE_SHIFT) & 15;
|
563 | 05330448 | aliguori | lhs->present = (flags & DESC_P_MASK) != 0;
|
564 | 05330448 | aliguori | lhs->dpl = rhs->selector & 3;
|
565 | 05330448 | aliguori | lhs->db = (flags >> DESC_B_SHIFT) & 1;
|
566 | 05330448 | aliguori | lhs->s = (flags & DESC_S_MASK) != 0;
|
567 | 05330448 | aliguori | lhs->l = (flags >> DESC_L_SHIFT) & 1;
|
568 | 05330448 | aliguori | lhs->g = (flags & DESC_G_MASK) != 0;
|
569 | 05330448 | aliguori | lhs->avl = (flags & DESC_AVL_MASK) != 0;
|
570 | 05330448 | aliguori | lhs->unusable = 0;
|
571 | 05330448 | aliguori | } |
572 | 05330448 | aliguori | |
573 | 05330448 | aliguori | static void get_seg(SegmentCache *lhs, const struct kvm_segment *rhs) |
574 | 05330448 | aliguori | { |
575 | 05330448 | aliguori | lhs->selector = rhs->selector; |
576 | 05330448 | aliguori | lhs->base = rhs->base; |
577 | 05330448 | aliguori | lhs->limit = rhs->limit; |
578 | 05330448 | aliguori | lhs->flags = |
579 | 05330448 | aliguori | (rhs->type << DESC_TYPE_SHIFT) |
580 | 05330448 | aliguori | | (rhs->present * DESC_P_MASK) |
581 | 05330448 | aliguori | | (rhs->dpl << DESC_DPL_SHIFT) |
582 | 05330448 | aliguori | | (rhs->db << DESC_B_SHIFT) |
583 | 05330448 | aliguori | | (rhs->s * DESC_S_MASK) |
584 | 05330448 | aliguori | | (rhs->l << DESC_L_SHIFT) |
585 | 05330448 | aliguori | | (rhs->g * DESC_G_MASK) |
586 | 05330448 | aliguori | | (rhs->avl * DESC_AVL_MASK); |
587 | 05330448 | aliguori | } |
588 | 05330448 | aliguori | |
589 | 05330448 | aliguori | static void kvm_getput_reg(__u64 *kvm_reg, target_ulong *qemu_reg, int set) |
590 | 05330448 | aliguori | { |
591 | 05330448 | aliguori | if (set)
|
592 | 05330448 | aliguori | *kvm_reg = *qemu_reg; |
593 | 05330448 | aliguori | else
|
594 | 05330448 | aliguori | *qemu_reg = *kvm_reg; |
595 | 05330448 | aliguori | } |
596 | 05330448 | aliguori | |
597 | 05330448 | aliguori | static int kvm_getput_regs(CPUState *env, int set) |
598 | 05330448 | aliguori | { |
599 | 05330448 | aliguori | struct kvm_regs regs;
|
600 | 05330448 | aliguori | int ret = 0; |
601 | 05330448 | aliguori | |
602 | 05330448 | aliguori | if (!set) {
|
603 | 05330448 | aliguori | ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, ®s); |
604 | 05330448 | aliguori | if (ret < 0) |
605 | 05330448 | aliguori | return ret;
|
606 | 05330448 | aliguori | } |
607 | 05330448 | aliguori | |
608 | 05330448 | aliguori | kvm_getput_reg(®s.rax, &env->regs[R_EAX], set); |
609 | 05330448 | aliguori | kvm_getput_reg(®s.rbx, &env->regs[R_EBX], set); |
610 | 05330448 | aliguori | kvm_getput_reg(®s.rcx, &env->regs[R_ECX], set); |
611 | 05330448 | aliguori | kvm_getput_reg(®s.rdx, &env->regs[R_EDX], set); |
612 | 05330448 | aliguori | kvm_getput_reg(®s.rsi, &env->regs[R_ESI], set); |
613 | 05330448 | aliguori | kvm_getput_reg(®s.rdi, &env->regs[R_EDI], set); |
614 | 05330448 | aliguori | kvm_getput_reg(®s.rsp, &env->regs[R_ESP], set); |
615 | 05330448 | aliguori | kvm_getput_reg(®s.rbp, &env->regs[R_EBP], set); |
616 | 05330448 | aliguori | #ifdef TARGET_X86_64
|
617 | 05330448 | aliguori | kvm_getput_reg(®s.r8, &env->regs[8], set);
|
618 | 05330448 | aliguori | kvm_getput_reg(®s.r9, &env->regs[9], set);
|
619 | 05330448 | aliguori | kvm_getput_reg(®s.r10, &env->regs[10], set);
|
620 | 05330448 | aliguori | kvm_getput_reg(®s.r11, &env->regs[11], set);
|
621 | 05330448 | aliguori | kvm_getput_reg(®s.r12, &env->regs[12], set);
|
622 | 05330448 | aliguori | kvm_getput_reg(®s.r13, &env->regs[13], set);
|
623 | 05330448 | aliguori | kvm_getput_reg(®s.r14, &env->regs[14], set);
|
624 | 05330448 | aliguori | kvm_getput_reg(®s.r15, &env->regs[15], set);
|
625 | 05330448 | aliguori | #endif
|
626 | 05330448 | aliguori | |
627 | 05330448 | aliguori | kvm_getput_reg(®s.rflags, &env->eflags, set); |
628 | 05330448 | aliguori | kvm_getput_reg(®s.rip, &env->eip, set); |
629 | 05330448 | aliguori | |
630 | 05330448 | aliguori | if (set)
|
631 | 05330448 | aliguori | ret = kvm_vcpu_ioctl(env, KVM_SET_REGS, ®s); |
632 | 05330448 | aliguori | |
633 | 05330448 | aliguori | return ret;
|
634 | 05330448 | aliguori | } |
635 | 05330448 | aliguori | |
636 | 05330448 | aliguori | static int kvm_put_fpu(CPUState *env) |
637 | 05330448 | aliguori | { |
638 | 05330448 | aliguori | struct kvm_fpu fpu;
|
639 | 05330448 | aliguori | int i;
|
640 | 05330448 | aliguori | |
641 | 05330448 | aliguori | memset(&fpu, 0, sizeof fpu); |
642 | 05330448 | aliguori | fpu.fsw = env->fpus & ~(7 << 11); |
643 | 05330448 | aliguori | fpu.fsw |= (env->fpstt & 7) << 11; |
644 | 05330448 | aliguori | fpu.fcw = env->fpuc; |
645 | 05330448 | aliguori | for (i = 0; i < 8; ++i) |
646 | 05330448 | aliguori | fpu.ftwx |= (!env->fptags[i]) << i; |
647 | 05330448 | aliguori | memcpy(fpu.fpr, env->fpregs, sizeof env->fpregs);
|
648 | 05330448 | aliguori | memcpy(fpu.xmm, env->xmm_regs, sizeof env->xmm_regs);
|
649 | 05330448 | aliguori | fpu.mxcsr = env->mxcsr; |
650 | 05330448 | aliguori | |
651 | 05330448 | aliguori | return kvm_vcpu_ioctl(env, KVM_SET_FPU, &fpu);
|
652 | 05330448 | aliguori | } |
653 | 05330448 | aliguori | |
654 | f1665b21 | Sheng Yang | #ifdef KVM_CAP_XSAVE
|
655 | f1665b21 | Sheng Yang | #define XSAVE_CWD_RIP 2 |
656 | f1665b21 | Sheng Yang | #define XSAVE_CWD_RDP 4 |
657 | f1665b21 | Sheng Yang | #define XSAVE_MXCSR 6 |
658 | f1665b21 | Sheng Yang | #define XSAVE_ST_SPACE 8 |
659 | f1665b21 | Sheng Yang | #define XSAVE_XMM_SPACE 40 |
660 | f1665b21 | Sheng Yang | #define XSAVE_XSTATE_BV 128 |
661 | f1665b21 | Sheng Yang | #define XSAVE_YMMH_SPACE 144 |
662 | f1665b21 | Sheng Yang | #endif
|
663 | f1665b21 | Sheng Yang | |
664 | f1665b21 | Sheng Yang | static int kvm_put_xsave(CPUState *env) |
665 | f1665b21 | Sheng Yang | { |
666 | f1665b21 | Sheng Yang | #ifdef KVM_CAP_XSAVE
|
667 | 0f53994f | Marcelo Tosatti | int i, r;
|
668 | f1665b21 | Sheng Yang | struct kvm_xsave* xsave;
|
669 | f1665b21 | Sheng Yang | uint16_t cwd, swd, twd, fop; |
670 | f1665b21 | Sheng Yang | |
671 | f1665b21 | Sheng Yang | if (!kvm_has_xsave())
|
672 | f1665b21 | Sheng Yang | return kvm_put_fpu(env);
|
673 | f1665b21 | Sheng Yang | |
674 | f1665b21 | Sheng Yang | xsave = qemu_memalign(4096, sizeof(struct kvm_xsave)); |
675 | f1665b21 | Sheng Yang | memset(xsave, 0, sizeof(struct kvm_xsave)); |
676 | f1665b21 | Sheng Yang | cwd = swd = twd = fop = 0;
|
677 | f1665b21 | Sheng Yang | swd = env->fpus & ~(7 << 11); |
678 | f1665b21 | Sheng Yang | swd |= (env->fpstt & 7) << 11; |
679 | f1665b21 | Sheng Yang | cwd = env->fpuc; |
680 | f1665b21 | Sheng Yang | for (i = 0; i < 8; ++i) |
681 | f1665b21 | Sheng Yang | twd |= (!env->fptags[i]) << i; |
682 | f1665b21 | Sheng Yang | xsave->region[0] = (uint32_t)(swd << 16) + cwd; |
683 | f1665b21 | Sheng Yang | xsave->region[1] = (uint32_t)(fop << 16) + twd; |
684 | f1665b21 | Sheng Yang | memcpy(&xsave->region[XSAVE_ST_SPACE], env->fpregs, |
685 | f1665b21 | Sheng Yang | sizeof env->fpregs);
|
686 | f1665b21 | Sheng Yang | memcpy(&xsave->region[XSAVE_XMM_SPACE], env->xmm_regs, |
687 | f1665b21 | Sheng Yang | sizeof env->xmm_regs);
|
688 | f1665b21 | Sheng Yang | xsave->region[XSAVE_MXCSR] = env->mxcsr; |
689 | f1665b21 | Sheng Yang | *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV] = env->xstate_bv; |
690 | f1665b21 | Sheng Yang | memcpy(&xsave->region[XSAVE_YMMH_SPACE], env->ymmh_regs, |
691 | f1665b21 | Sheng Yang | sizeof env->ymmh_regs);
|
692 | 0f53994f | Marcelo Tosatti | r = kvm_vcpu_ioctl(env, KVM_SET_XSAVE, xsave); |
693 | 0f53994f | Marcelo Tosatti | qemu_free(xsave); |
694 | 0f53994f | Marcelo Tosatti | return r;
|
695 | f1665b21 | Sheng Yang | #else
|
696 | f1665b21 | Sheng Yang | return kvm_put_fpu(env);
|
697 | f1665b21 | Sheng Yang | #endif
|
698 | f1665b21 | Sheng Yang | } |
699 | f1665b21 | Sheng Yang | |
700 | f1665b21 | Sheng Yang | static int kvm_put_xcrs(CPUState *env) |
701 | f1665b21 | Sheng Yang | { |
702 | f1665b21 | Sheng Yang | #ifdef KVM_CAP_XCRS
|
703 | f1665b21 | Sheng Yang | struct kvm_xcrs xcrs;
|
704 | f1665b21 | Sheng Yang | |
705 | f1665b21 | Sheng Yang | if (!kvm_has_xcrs())
|
706 | f1665b21 | Sheng Yang | return 0; |
707 | f1665b21 | Sheng Yang | |
708 | f1665b21 | Sheng Yang | xcrs.nr_xcrs = 1;
|
709 | f1665b21 | Sheng Yang | xcrs.flags = 0;
|
710 | f1665b21 | Sheng Yang | xcrs.xcrs[0].xcr = 0; |
711 | f1665b21 | Sheng Yang | xcrs.xcrs[0].value = env->xcr0;
|
712 | f1665b21 | Sheng Yang | return kvm_vcpu_ioctl(env, KVM_SET_XCRS, &xcrs);
|
713 | f1665b21 | Sheng Yang | #else
|
714 | f1665b21 | Sheng Yang | return 0; |
715 | f1665b21 | Sheng Yang | #endif
|
716 | f1665b21 | Sheng Yang | } |
717 | f1665b21 | Sheng Yang | |
718 | 05330448 | aliguori | static int kvm_put_sregs(CPUState *env) |
719 | 05330448 | aliguori | { |
720 | 05330448 | aliguori | struct kvm_sregs sregs;
|
721 | 05330448 | aliguori | |
722 | 0e607a80 | Jan Kiszka | memset(sregs.interrupt_bitmap, 0, sizeof(sregs.interrupt_bitmap)); |
723 | 0e607a80 | Jan Kiszka | if (env->interrupt_injected >= 0) { |
724 | 0e607a80 | Jan Kiszka | sregs.interrupt_bitmap[env->interrupt_injected / 64] |=
|
725 | 0e607a80 | Jan Kiszka | (uint64_t)1 << (env->interrupt_injected % 64); |
726 | 0e607a80 | Jan Kiszka | } |
727 | 05330448 | aliguori | |
728 | 05330448 | aliguori | if ((env->eflags & VM_MASK)) {
|
729 | 05330448 | aliguori | set_v8086_seg(&sregs.cs, &env->segs[R_CS]); |
730 | 05330448 | aliguori | set_v8086_seg(&sregs.ds, &env->segs[R_DS]); |
731 | 05330448 | aliguori | set_v8086_seg(&sregs.es, &env->segs[R_ES]); |
732 | 05330448 | aliguori | set_v8086_seg(&sregs.fs, &env->segs[R_FS]); |
733 | 05330448 | aliguori | set_v8086_seg(&sregs.gs, &env->segs[R_GS]); |
734 | 05330448 | aliguori | set_v8086_seg(&sregs.ss, &env->segs[R_SS]); |
735 | 05330448 | aliguori | } else {
|
736 | 05330448 | aliguori | set_seg(&sregs.cs, &env->segs[R_CS]); |
737 | 05330448 | aliguori | set_seg(&sregs.ds, &env->segs[R_DS]); |
738 | 05330448 | aliguori | set_seg(&sregs.es, &env->segs[R_ES]); |
739 | 05330448 | aliguori | set_seg(&sregs.fs, &env->segs[R_FS]); |
740 | 05330448 | aliguori | set_seg(&sregs.gs, &env->segs[R_GS]); |
741 | 05330448 | aliguori | set_seg(&sregs.ss, &env->segs[R_SS]); |
742 | 05330448 | aliguori | |
743 | 05330448 | aliguori | if (env->cr[0] & CR0_PE_MASK) { |
744 | 05330448 | aliguori | /* force ss cpl to cs cpl */
|
745 | 05330448 | aliguori | sregs.ss.selector = (sregs.ss.selector & ~3) |
|
746 | 05330448 | aliguori | (sregs.cs.selector & 3);
|
747 | 05330448 | aliguori | sregs.ss.dpl = sregs.ss.selector & 3;
|
748 | 05330448 | aliguori | } |
749 | 05330448 | aliguori | } |
750 | 05330448 | aliguori | |
751 | 05330448 | aliguori | set_seg(&sregs.tr, &env->tr); |
752 | 05330448 | aliguori | set_seg(&sregs.ldt, &env->ldt); |
753 | 05330448 | aliguori | |
754 | 05330448 | aliguori | sregs.idt.limit = env->idt.limit; |
755 | 05330448 | aliguori | sregs.idt.base = env->idt.base; |
756 | 05330448 | aliguori | sregs.gdt.limit = env->gdt.limit; |
757 | 05330448 | aliguori | sregs.gdt.base = env->gdt.base; |
758 | 05330448 | aliguori | |
759 | 05330448 | aliguori | sregs.cr0 = env->cr[0];
|
760 | 05330448 | aliguori | sregs.cr2 = env->cr[2];
|
761 | 05330448 | aliguori | sregs.cr3 = env->cr[3];
|
762 | 05330448 | aliguori | sregs.cr4 = env->cr[4];
|
763 | 05330448 | aliguori | |
764 | 4a942cea | Blue Swirl | sregs.cr8 = cpu_get_apic_tpr(env->apic_state); |
765 | 4a942cea | Blue Swirl | sregs.apic_base = cpu_get_apic_base(env->apic_state); |
766 | 05330448 | aliguori | |
767 | 05330448 | aliguori | sregs.efer = env->efer; |
768 | 05330448 | aliguori | |
769 | 05330448 | aliguori | return kvm_vcpu_ioctl(env, KVM_SET_SREGS, &sregs);
|
770 | 05330448 | aliguori | } |
771 | 05330448 | aliguori | |
772 | 05330448 | aliguori | static void kvm_msr_entry_set(struct kvm_msr_entry *entry, |
773 | 05330448 | aliguori | uint32_t index, uint64_t value) |
774 | 05330448 | aliguori | { |
775 | 05330448 | aliguori | entry->index = index; |
776 | 05330448 | aliguori | entry->data = value; |
777 | 05330448 | aliguori | } |
778 | 05330448 | aliguori | |
779 | ea643051 | Jan Kiszka | static int kvm_put_msrs(CPUState *env, int level) |
780 | 05330448 | aliguori | { |
781 | 05330448 | aliguori | struct {
|
782 | 05330448 | aliguori | struct kvm_msrs info;
|
783 | 05330448 | aliguori | struct kvm_msr_entry entries[100]; |
784 | 05330448 | aliguori | } msr_data; |
785 | 05330448 | aliguori | struct kvm_msr_entry *msrs = msr_data.entries;
|
786 | 57780495 | Marcelo Tosatti | int i, n = 0; |
787 | 05330448 | aliguori | |
788 | 05330448 | aliguori | kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_CS, env->sysenter_cs); |
789 | 05330448 | aliguori | kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_ESP, env->sysenter_esp); |
790 | 05330448 | aliguori | kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_EIP, env->sysenter_eip); |
791 | 05330448 | aliguori | if (kvm_has_msr_star(env))
|
792 | 05330448 | aliguori | kvm_msr_entry_set(&msrs[n++], MSR_STAR, env->star); |
793 | 05330448 | aliguori | #ifdef TARGET_X86_64
|
794 | 05330448 | aliguori | /* FIXME if lm capable */
|
795 | 05330448 | aliguori | kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar); |
796 | 05330448 | aliguori | kvm_msr_entry_set(&msrs[n++], MSR_KERNELGSBASE, env->kernelgsbase); |
797 | 05330448 | aliguori | kvm_msr_entry_set(&msrs[n++], MSR_FMASK, env->fmask); |
798 | 05330448 | aliguori | kvm_msr_entry_set(&msrs[n++], MSR_LSTAR, env->lstar); |
799 | 05330448 | aliguori | #endif
|
800 | ea643051 | Jan Kiszka | if (level == KVM_PUT_FULL_STATE) {
|
801 | ea643051 | Jan Kiszka | kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSC, env->tsc); |
802 | ea643051 | Jan Kiszka | kvm_msr_entry_set(&msrs[n++], MSR_KVM_SYSTEM_TIME, |
803 | ea643051 | Jan Kiszka | env->system_time_msr); |
804 | ea643051 | Jan Kiszka | kvm_msr_entry_set(&msrs[n++], MSR_KVM_WALL_CLOCK, env->wall_clock_msr); |
805 | ea643051 | Jan Kiszka | } |
806 | 57780495 | Marcelo Tosatti | #ifdef KVM_CAP_MCE
|
807 | 57780495 | Marcelo Tosatti | if (env->mcg_cap) {
|
808 | 57780495 | Marcelo Tosatti | if (level == KVM_PUT_RESET_STATE)
|
809 | 57780495 | Marcelo Tosatti | kvm_msr_entry_set(&msrs[n++], MSR_MCG_STATUS, env->mcg_status); |
810 | 57780495 | Marcelo Tosatti | else if (level == KVM_PUT_FULL_STATE) { |
811 | 57780495 | Marcelo Tosatti | kvm_msr_entry_set(&msrs[n++], MSR_MCG_STATUS, env->mcg_status); |
812 | 57780495 | Marcelo Tosatti | kvm_msr_entry_set(&msrs[n++], MSR_MCG_CTL, env->mcg_ctl); |
813 | 57780495 | Marcelo Tosatti | for (i = 0; i < (env->mcg_cap & 0xff) * 4; i++) |
814 | 57780495 | Marcelo Tosatti | kvm_msr_entry_set(&msrs[n++], MSR_MC0_CTL + i, env->mce_banks[i]); |
815 | 57780495 | Marcelo Tosatti | } |
816 | 57780495 | Marcelo Tosatti | } |
817 | 57780495 | Marcelo Tosatti | #endif
|
818 | 1a03675d | Glauber Costa | |
819 | 05330448 | aliguori | msr_data.info.nmsrs = n; |
820 | 05330448 | aliguori | |
821 | 05330448 | aliguori | return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data);
|
822 | 05330448 | aliguori | |
823 | 05330448 | aliguori | } |
824 | 05330448 | aliguori | |
825 | 05330448 | aliguori | |
826 | 05330448 | aliguori | static int kvm_get_fpu(CPUState *env) |
827 | 05330448 | aliguori | { |
828 | 05330448 | aliguori | struct kvm_fpu fpu;
|
829 | 05330448 | aliguori | int i, ret;
|
830 | 05330448 | aliguori | |
831 | 05330448 | aliguori | ret = kvm_vcpu_ioctl(env, KVM_GET_FPU, &fpu); |
832 | 05330448 | aliguori | if (ret < 0) |
833 | 05330448 | aliguori | return ret;
|
834 | 05330448 | aliguori | |
835 | 05330448 | aliguori | env->fpstt = (fpu.fsw >> 11) & 7; |
836 | 05330448 | aliguori | env->fpus = fpu.fsw; |
837 | 05330448 | aliguori | env->fpuc = fpu.fcw; |
838 | 05330448 | aliguori | for (i = 0; i < 8; ++i) |
839 | 05330448 | aliguori | env->fptags[i] = !((fpu.ftwx >> i) & 1);
|
840 | 05330448 | aliguori | memcpy(env->fpregs, fpu.fpr, sizeof env->fpregs);
|
841 | 05330448 | aliguori | memcpy(env->xmm_regs, fpu.xmm, sizeof env->xmm_regs);
|
842 | 05330448 | aliguori | env->mxcsr = fpu.mxcsr; |
843 | 05330448 | aliguori | |
844 | 05330448 | aliguori | return 0; |
845 | 05330448 | aliguori | } |
846 | 05330448 | aliguori | |
847 | f1665b21 | Sheng Yang | static int kvm_get_xsave(CPUState *env) |
848 | f1665b21 | Sheng Yang | { |
849 | f1665b21 | Sheng Yang | #ifdef KVM_CAP_XSAVE
|
850 | f1665b21 | Sheng Yang | struct kvm_xsave* xsave;
|
851 | f1665b21 | Sheng Yang | int ret, i;
|
852 | f1665b21 | Sheng Yang | uint16_t cwd, swd, twd, fop; |
853 | f1665b21 | Sheng Yang | |
854 | f1665b21 | Sheng Yang | if (!kvm_has_xsave())
|
855 | f1665b21 | Sheng Yang | return kvm_get_fpu(env);
|
856 | f1665b21 | Sheng Yang | |
857 | f1665b21 | Sheng Yang | xsave = qemu_memalign(4096, sizeof(struct kvm_xsave)); |
858 | f1665b21 | Sheng Yang | ret = kvm_vcpu_ioctl(env, KVM_GET_XSAVE, xsave); |
859 | 0f53994f | Marcelo Tosatti | if (ret < 0) { |
860 | 0f53994f | Marcelo Tosatti | qemu_free(xsave); |
861 | f1665b21 | Sheng Yang | return ret;
|
862 | 0f53994f | Marcelo Tosatti | } |
863 | f1665b21 | Sheng Yang | |
864 | f1665b21 | Sheng Yang | cwd = (uint16_t)xsave->region[0];
|
865 | f1665b21 | Sheng Yang | swd = (uint16_t)(xsave->region[0] >> 16); |
866 | f1665b21 | Sheng Yang | twd = (uint16_t)xsave->region[1];
|
867 | f1665b21 | Sheng Yang | fop = (uint16_t)(xsave->region[1] >> 16); |
868 | f1665b21 | Sheng Yang | env->fpstt = (swd >> 11) & 7; |
869 | f1665b21 | Sheng Yang | env->fpus = swd; |
870 | f1665b21 | Sheng Yang | env->fpuc = cwd; |
871 | f1665b21 | Sheng Yang | for (i = 0; i < 8; ++i) |
872 | f1665b21 | Sheng Yang | env->fptags[i] = !((twd >> i) & 1);
|
873 | f1665b21 | Sheng Yang | env->mxcsr = xsave->region[XSAVE_MXCSR]; |
874 | f1665b21 | Sheng Yang | memcpy(env->fpregs, &xsave->region[XSAVE_ST_SPACE], |
875 | f1665b21 | Sheng Yang | sizeof env->fpregs);
|
876 | f1665b21 | Sheng Yang | memcpy(env->xmm_regs, &xsave->region[XSAVE_XMM_SPACE], |
877 | f1665b21 | Sheng Yang | sizeof env->xmm_regs);
|
878 | f1665b21 | Sheng Yang | env->xstate_bv = *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV]; |
879 | f1665b21 | Sheng Yang | memcpy(env->ymmh_regs, &xsave->region[XSAVE_YMMH_SPACE], |
880 | f1665b21 | Sheng Yang | sizeof env->ymmh_regs);
|
881 | 0f53994f | Marcelo Tosatti | qemu_free(xsave); |
882 | f1665b21 | Sheng Yang | return 0; |
883 | f1665b21 | Sheng Yang | #else
|
884 | f1665b21 | Sheng Yang | return kvm_get_fpu(env);
|
885 | f1665b21 | Sheng Yang | #endif
|
886 | f1665b21 | Sheng Yang | } |
887 | f1665b21 | Sheng Yang | |
888 | f1665b21 | Sheng Yang | static int kvm_get_xcrs(CPUState *env) |
889 | f1665b21 | Sheng Yang | { |
890 | f1665b21 | Sheng Yang | #ifdef KVM_CAP_XCRS
|
891 | f1665b21 | Sheng Yang | int i, ret;
|
892 | f1665b21 | Sheng Yang | struct kvm_xcrs xcrs;
|
893 | f1665b21 | Sheng Yang | |
894 | f1665b21 | Sheng Yang | if (!kvm_has_xcrs())
|
895 | f1665b21 | Sheng Yang | return 0; |
896 | f1665b21 | Sheng Yang | |
897 | f1665b21 | Sheng Yang | ret = kvm_vcpu_ioctl(env, KVM_GET_XCRS, &xcrs); |
898 | f1665b21 | Sheng Yang | if (ret < 0) |
899 | f1665b21 | Sheng Yang | return ret;
|
900 | f1665b21 | Sheng Yang | |
901 | f1665b21 | Sheng Yang | for (i = 0; i < xcrs.nr_xcrs; i++) |
902 | f1665b21 | Sheng Yang | /* Only support xcr0 now */
|
903 | f1665b21 | Sheng Yang | if (xcrs.xcrs[0].xcr == 0) { |
904 | f1665b21 | Sheng Yang | env->xcr0 = xcrs.xcrs[0].value;
|
905 | f1665b21 | Sheng Yang | break;
|
906 | f1665b21 | Sheng Yang | } |
907 | f1665b21 | Sheng Yang | return 0; |
908 | f1665b21 | Sheng Yang | #else
|
909 | f1665b21 | Sheng Yang | return 0; |
910 | f1665b21 | Sheng Yang | #endif
|
911 | f1665b21 | Sheng Yang | } |
912 | f1665b21 | Sheng Yang | |
913 | 05330448 | aliguori | static int kvm_get_sregs(CPUState *env) |
914 | 05330448 | aliguori | { |
915 | 05330448 | aliguori | struct kvm_sregs sregs;
|
916 | 05330448 | aliguori | uint32_t hflags; |
917 | 0e607a80 | Jan Kiszka | int bit, i, ret;
|
918 | 05330448 | aliguori | |
919 | 05330448 | aliguori | ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs); |
920 | 05330448 | aliguori | if (ret < 0) |
921 | 05330448 | aliguori | return ret;
|
922 | 05330448 | aliguori | |
923 | 0e607a80 | Jan Kiszka | /* There can only be one pending IRQ set in the bitmap at a time, so try
|
924 | 0e607a80 | Jan Kiszka | to find it and save its number instead (-1 for none). */
|
925 | 0e607a80 | Jan Kiszka | env->interrupt_injected = -1;
|
926 | 0e607a80 | Jan Kiszka | for (i = 0; i < ARRAY_SIZE(sregs.interrupt_bitmap); i++) { |
927 | 0e607a80 | Jan Kiszka | if (sregs.interrupt_bitmap[i]) {
|
928 | 0e607a80 | Jan Kiszka | bit = ctz64(sregs.interrupt_bitmap[i]); |
929 | 0e607a80 | Jan Kiszka | env->interrupt_injected = i * 64 + bit;
|
930 | 0e607a80 | Jan Kiszka | break;
|
931 | 0e607a80 | Jan Kiszka | } |
932 | 0e607a80 | Jan Kiszka | } |
933 | 05330448 | aliguori | |
934 | 05330448 | aliguori | get_seg(&env->segs[R_CS], &sregs.cs); |
935 | 05330448 | aliguori | get_seg(&env->segs[R_DS], &sregs.ds); |
936 | 05330448 | aliguori | get_seg(&env->segs[R_ES], &sregs.es); |
937 | 05330448 | aliguori | get_seg(&env->segs[R_FS], &sregs.fs); |
938 | 05330448 | aliguori | get_seg(&env->segs[R_GS], &sregs.gs); |
939 | 05330448 | aliguori | get_seg(&env->segs[R_SS], &sregs.ss); |
940 | 05330448 | aliguori | |
941 | 05330448 | aliguori | get_seg(&env->tr, &sregs.tr); |
942 | 05330448 | aliguori | get_seg(&env->ldt, &sregs.ldt); |
943 | 05330448 | aliguori | |
944 | 05330448 | aliguori | env->idt.limit = sregs.idt.limit; |
945 | 05330448 | aliguori | env->idt.base = sregs.idt.base; |
946 | 05330448 | aliguori | env->gdt.limit = sregs.gdt.limit; |
947 | 05330448 | aliguori | env->gdt.base = sregs.gdt.base; |
948 | 05330448 | aliguori | |
949 | 05330448 | aliguori | env->cr[0] = sregs.cr0;
|
950 | 05330448 | aliguori | env->cr[2] = sregs.cr2;
|
951 | 05330448 | aliguori | env->cr[3] = sregs.cr3;
|
952 | 05330448 | aliguori | env->cr[4] = sregs.cr4;
|
953 | 05330448 | aliguori | |
954 | 4a942cea | Blue Swirl | cpu_set_apic_base(env->apic_state, sregs.apic_base); |
955 | 05330448 | aliguori | |
956 | 05330448 | aliguori | env->efer = sregs.efer; |
957 | 4a942cea | Blue Swirl | //cpu_set_apic_tpr(env->apic_state, sregs.cr8);
|
958 | 05330448 | aliguori | |
959 | 05330448 | aliguori | #define HFLAG_COPY_MASK ~( \
|
960 | 05330448 | aliguori | HF_CPL_MASK | HF_PE_MASK | HF_MP_MASK | HF_EM_MASK | \ |
961 | 05330448 | aliguori | HF_TS_MASK | HF_TF_MASK | HF_VM_MASK | HF_IOPL_MASK | \ |
962 | 05330448 | aliguori | HF_OSFXSR_MASK | HF_LMA_MASK | HF_CS32_MASK | \ |
963 | 05330448 | aliguori | HF_SS32_MASK | HF_CS64_MASK | HF_ADDSEG_MASK) |
964 | 05330448 | aliguori | |
965 | 05330448 | aliguori | |
966 | 05330448 | aliguori | |
967 | 05330448 | aliguori | hflags = (env->segs[R_CS].flags >> DESC_DPL_SHIFT) & HF_CPL_MASK; |
968 | 05330448 | aliguori | hflags |= (env->cr[0] & CR0_PE_MASK) << (HF_PE_SHIFT - CR0_PE_SHIFT);
|
969 | 05330448 | aliguori | hflags |= (env->cr[0] << (HF_MP_SHIFT - CR0_MP_SHIFT)) &
|
970 | 05330448 | aliguori | (HF_MP_MASK | HF_EM_MASK | HF_TS_MASK); |
971 | 05330448 | aliguori | hflags |= (env->eflags & (HF_TF_MASK | HF_VM_MASK | HF_IOPL_MASK)); |
972 | 05330448 | aliguori | hflags |= (env->cr[4] & CR4_OSFXSR_MASK) <<
|
973 | 05330448 | aliguori | (HF_OSFXSR_SHIFT - CR4_OSFXSR_SHIFT); |
974 | 05330448 | aliguori | |
975 | 05330448 | aliguori | if (env->efer & MSR_EFER_LMA) {
|
976 | 05330448 | aliguori | hflags |= HF_LMA_MASK; |
977 | 05330448 | aliguori | } |
978 | 05330448 | aliguori | |
979 | 05330448 | aliguori | if ((hflags & HF_LMA_MASK) && (env->segs[R_CS].flags & DESC_L_MASK)) {
|
980 | 05330448 | aliguori | hflags |= HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK; |
981 | 05330448 | aliguori | } else {
|
982 | 05330448 | aliguori | hflags |= (env->segs[R_CS].flags & DESC_B_MASK) >> |
983 | 05330448 | aliguori | (DESC_B_SHIFT - HF_CS32_SHIFT); |
984 | 05330448 | aliguori | hflags |= (env->segs[R_SS].flags & DESC_B_MASK) >> |
985 | 05330448 | aliguori | (DESC_B_SHIFT - HF_SS32_SHIFT); |
986 | 05330448 | aliguori | if (!(env->cr[0] & CR0_PE_MASK) || |
987 | 05330448 | aliguori | (env->eflags & VM_MASK) || |
988 | 05330448 | aliguori | !(hflags & HF_CS32_MASK)) { |
989 | 05330448 | aliguori | hflags |= HF_ADDSEG_MASK; |
990 | 05330448 | aliguori | } else {
|
991 | 05330448 | aliguori | hflags |= ((env->segs[R_DS].base | |
992 | 05330448 | aliguori | env->segs[R_ES].base | |
993 | 05330448 | aliguori | env->segs[R_SS].base) != 0) <<
|
994 | 05330448 | aliguori | HF_ADDSEG_SHIFT; |
995 | 05330448 | aliguori | } |
996 | 05330448 | aliguori | } |
997 | 05330448 | aliguori | env->hflags = (env->hflags & HFLAG_COPY_MASK) | hflags; |
998 | 05330448 | aliguori | |
999 | 05330448 | aliguori | return 0; |
1000 | 05330448 | aliguori | } |
1001 | 05330448 | aliguori | |
1002 | 05330448 | aliguori | static int kvm_get_msrs(CPUState *env) |
1003 | 05330448 | aliguori | { |
1004 | 05330448 | aliguori | struct {
|
1005 | 05330448 | aliguori | struct kvm_msrs info;
|
1006 | 05330448 | aliguori | struct kvm_msr_entry entries[100]; |
1007 | 05330448 | aliguori | } msr_data; |
1008 | 05330448 | aliguori | struct kvm_msr_entry *msrs = msr_data.entries;
|
1009 | 05330448 | aliguori | int ret, i, n;
|
1010 | 05330448 | aliguori | |
1011 | 05330448 | aliguori | n = 0;
|
1012 | 05330448 | aliguori | msrs[n++].index = MSR_IA32_SYSENTER_CS; |
1013 | 05330448 | aliguori | msrs[n++].index = MSR_IA32_SYSENTER_ESP; |
1014 | 05330448 | aliguori | msrs[n++].index = MSR_IA32_SYSENTER_EIP; |
1015 | 05330448 | aliguori | if (kvm_has_msr_star(env))
|
1016 | 05330448 | aliguori | msrs[n++].index = MSR_STAR; |
1017 | 05330448 | aliguori | msrs[n++].index = MSR_IA32_TSC; |
1018 | 05330448 | aliguori | #ifdef TARGET_X86_64
|
1019 | 05330448 | aliguori | /* FIXME lm_capable_kernel */
|
1020 | 05330448 | aliguori | msrs[n++].index = MSR_CSTAR; |
1021 | 05330448 | aliguori | msrs[n++].index = MSR_KERNELGSBASE; |
1022 | 05330448 | aliguori | msrs[n++].index = MSR_FMASK; |
1023 | 05330448 | aliguori | msrs[n++].index = MSR_LSTAR; |
1024 | 05330448 | aliguori | #endif
|
1025 | 1a03675d | Glauber Costa | msrs[n++].index = MSR_KVM_SYSTEM_TIME; |
1026 | 1a03675d | Glauber Costa | msrs[n++].index = MSR_KVM_WALL_CLOCK; |
1027 | 1a03675d | Glauber Costa | |
1028 | 57780495 | Marcelo Tosatti | #ifdef KVM_CAP_MCE
|
1029 | 57780495 | Marcelo Tosatti | if (env->mcg_cap) {
|
1030 | 57780495 | Marcelo Tosatti | msrs[n++].index = MSR_MCG_STATUS; |
1031 | 57780495 | Marcelo Tosatti | msrs[n++].index = MSR_MCG_CTL; |
1032 | 57780495 | Marcelo Tosatti | for (i = 0; i < (env->mcg_cap & 0xff) * 4; i++) |
1033 | 57780495 | Marcelo Tosatti | msrs[n++].index = MSR_MC0_CTL + i; |
1034 | 57780495 | Marcelo Tosatti | } |
1035 | 57780495 | Marcelo Tosatti | #endif
|
1036 | 57780495 | Marcelo Tosatti | |
1037 | 05330448 | aliguori | msr_data.info.nmsrs = n; |
1038 | 05330448 | aliguori | ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data); |
1039 | 05330448 | aliguori | if (ret < 0) |
1040 | 05330448 | aliguori | return ret;
|
1041 | 05330448 | aliguori | |
1042 | 05330448 | aliguori | for (i = 0; i < ret; i++) { |
1043 | 05330448 | aliguori | switch (msrs[i].index) {
|
1044 | 05330448 | aliguori | case MSR_IA32_SYSENTER_CS:
|
1045 | 05330448 | aliguori | env->sysenter_cs = msrs[i].data; |
1046 | 05330448 | aliguori | break;
|
1047 | 05330448 | aliguori | case MSR_IA32_SYSENTER_ESP:
|
1048 | 05330448 | aliguori | env->sysenter_esp = msrs[i].data; |
1049 | 05330448 | aliguori | break;
|
1050 | 05330448 | aliguori | case MSR_IA32_SYSENTER_EIP:
|
1051 | 05330448 | aliguori | env->sysenter_eip = msrs[i].data; |
1052 | 05330448 | aliguori | break;
|
1053 | 05330448 | aliguori | case MSR_STAR:
|
1054 | 05330448 | aliguori | env->star = msrs[i].data; |
1055 | 05330448 | aliguori | break;
|
1056 | 05330448 | aliguori | #ifdef TARGET_X86_64
|
1057 | 05330448 | aliguori | case MSR_CSTAR:
|
1058 | 05330448 | aliguori | env->cstar = msrs[i].data; |
1059 | 05330448 | aliguori | break;
|
1060 | 05330448 | aliguori | case MSR_KERNELGSBASE:
|
1061 | 05330448 | aliguori | env->kernelgsbase = msrs[i].data; |
1062 | 05330448 | aliguori | break;
|
1063 | 05330448 | aliguori | case MSR_FMASK:
|
1064 | 05330448 | aliguori | env->fmask = msrs[i].data; |
1065 | 05330448 | aliguori | break;
|
1066 | 05330448 | aliguori | case MSR_LSTAR:
|
1067 | 05330448 | aliguori | env->lstar = msrs[i].data; |
1068 | 05330448 | aliguori | break;
|
1069 | 05330448 | aliguori | #endif
|
1070 | 05330448 | aliguori | case MSR_IA32_TSC:
|
1071 | 05330448 | aliguori | env->tsc = msrs[i].data; |
1072 | 05330448 | aliguori | break;
|
1073 | 1a03675d | Glauber Costa | case MSR_KVM_SYSTEM_TIME:
|
1074 | 1a03675d | Glauber Costa | env->system_time_msr = msrs[i].data; |
1075 | 1a03675d | Glauber Costa | break;
|
1076 | 1a03675d | Glauber Costa | case MSR_KVM_WALL_CLOCK:
|
1077 | 1a03675d | Glauber Costa | env->wall_clock_msr = msrs[i].data; |
1078 | 1a03675d | Glauber Costa | break;
|
1079 | 57780495 | Marcelo Tosatti | #ifdef KVM_CAP_MCE
|
1080 | 57780495 | Marcelo Tosatti | case MSR_MCG_STATUS:
|
1081 | 57780495 | Marcelo Tosatti | env->mcg_status = msrs[i].data; |
1082 | 57780495 | Marcelo Tosatti | break;
|
1083 | 57780495 | Marcelo Tosatti | case MSR_MCG_CTL:
|
1084 | 57780495 | Marcelo Tosatti | env->mcg_ctl = msrs[i].data; |
1085 | 57780495 | Marcelo Tosatti | break;
|
1086 | 57780495 | Marcelo Tosatti | #endif
|
1087 | 57780495 | Marcelo Tosatti | default:
|
1088 | 57780495 | Marcelo Tosatti | #ifdef KVM_CAP_MCE
|
1089 | 57780495 | Marcelo Tosatti | if (msrs[i].index >= MSR_MC0_CTL &&
|
1090 | 57780495 | Marcelo Tosatti | msrs[i].index < MSR_MC0_CTL + (env->mcg_cap & 0xff) * 4) { |
1091 | 57780495 | Marcelo Tosatti | env->mce_banks[msrs[i].index - MSR_MC0_CTL] = msrs[i].data; |
1092 | 57780495 | Marcelo Tosatti | break;
|
1093 | 57780495 | Marcelo Tosatti | } |
1094 | 57780495 | Marcelo Tosatti | #endif
|
1095 | 05330448 | aliguori | } |
1096 | 05330448 | aliguori | } |
1097 | 05330448 | aliguori | |
1098 | 05330448 | aliguori | return 0; |
1099 | 05330448 | aliguori | } |
1100 | 05330448 | aliguori | |
1101 | 9bdbe550 | Hollis Blanchard | static int kvm_put_mp_state(CPUState *env) |
1102 | 9bdbe550 | Hollis Blanchard | { |
1103 | 9bdbe550 | Hollis Blanchard | struct kvm_mp_state mp_state = { .mp_state = env->mp_state };
|
1104 | 9bdbe550 | Hollis Blanchard | |
1105 | 9bdbe550 | Hollis Blanchard | return kvm_vcpu_ioctl(env, KVM_SET_MP_STATE, &mp_state);
|
1106 | 9bdbe550 | Hollis Blanchard | } |
1107 | 9bdbe550 | Hollis Blanchard | |
1108 | 9bdbe550 | Hollis Blanchard | static int kvm_get_mp_state(CPUState *env) |
1109 | 9bdbe550 | Hollis Blanchard | { |
1110 | 9bdbe550 | Hollis Blanchard | struct kvm_mp_state mp_state;
|
1111 | 9bdbe550 | Hollis Blanchard | int ret;
|
1112 | 9bdbe550 | Hollis Blanchard | |
1113 | 9bdbe550 | Hollis Blanchard | ret = kvm_vcpu_ioctl(env, KVM_GET_MP_STATE, &mp_state); |
1114 | 9bdbe550 | Hollis Blanchard | if (ret < 0) { |
1115 | 9bdbe550 | Hollis Blanchard | return ret;
|
1116 | 9bdbe550 | Hollis Blanchard | } |
1117 | 9bdbe550 | Hollis Blanchard | env->mp_state = mp_state.mp_state; |
1118 | 9bdbe550 | Hollis Blanchard | return 0; |
1119 | 9bdbe550 | Hollis Blanchard | } |
1120 | 9bdbe550 | Hollis Blanchard | |
1121 | ea643051 | Jan Kiszka | static int kvm_put_vcpu_events(CPUState *env, int level) |
1122 | a0fb002c | Jan Kiszka | { |
1123 | a0fb002c | Jan Kiszka | #ifdef KVM_CAP_VCPU_EVENTS
|
1124 | a0fb002c | Jan Kiszka | struct kvm_vcpu_events events;
|
1125 | a0fb002c | Jan Kiszka | |
1126 | a0fb002c | Jan Kiszka | if (!kvm_has_vcpu_events()) {
|
1127 | a0fb002c | Jan Kiszka | return 0; |
1128 | a0fb002c | Jan Kiszka | } |
1129 | a0fb002c | Jan Kiszka | |
1130 | 31827373 | Jan Kiszka | events.exception.injected = (env->exception_injected >= 0);
|
1131 | 31827373 | Jan Kiszka | events.exception.nr = env->exception_injected; |
1132 | a0fb002c | Jan Kiszka | events.exception.has_error_code = env->has_error_code; |
1133 | a0fb002c | Jan Kiszka | events.exception.error_code = env->error_code; |
1134 | a0fb002c | Jan Kiszka | |
1135 | a0fb002c | Jan Kiszka | events.interrupt.injected = (env->interrupt_injected >= 0);
|
1136 | a0fb002c | Jan Kiszka | events.interrupt.nr = env->interrupt_injected; |
1137 | a0fb002c | Jan Kiszka | events.interrupt.soft = env->soft_interrupt; |
1138 | a0fb002c | Jan Kiszka | |
1139 | a0fb002c | Jan Kiszka | events.nmi.injected = env->nmi_injected; |
1140 | a0fb002c | Jan Kiszka | events.nmi.pending = env->nmi_pending; |
1141 | a0fb002c | Jan Kiszka | events.nmi.masked = !!(env->hflags2 & HF2_NMI_MASK); |
1142 | a0fb002c | Jan Kiszka | |
1143 | a0fb002c | Jan Kiszka | events.sipi_vector = env->sipi_vector; |
1144 | a0fb002c | Jan Kiszka | |
1145 | ea643051 | Jan Kiszka | events.flags = 0;
|
1146 | ea643051 | Jan Kiszka | if (level >= KVM_PUT_RESET_STATE) {
|
1147 | ea643051 | Jan Kiszka | events.flags |= |
1148 | ea643051 | Jan Kiszka | KVM_VCPUEVENT_VALID_NMI_PENDING | KVM_VCPUEVENT_VALID_SIPI_VECTOR; |
1149 | ea643051 | Jan Kiszka | } |
1150 | aee028b9 | Jan Kiszka | |
1151 | a0fb002c | Jan Kiszka | return kvm_vcpu_ioctl(env, KVM_SET_VCPU_EVENTS, &events);
|
1152 | a0fb002c | Jan Kiszka | #else
|
1153 | a0fb002c | Jan Kiszka | return 0; |
1154 | a0fb002c | Jan Kiszka | #endif
|
1155 | a0fb002c | Jan Kiszka | } |
1156 | a0fb002c | Jan Kiszka | |
1157 | a0fb002c | Jan Kiszka | static int kvm_get_vcpu_events(CPUState *env) |
1158 | a0fb002c | Jan Kiszka | { |
1159 | a0fb002c | Jan Kiszka | #ifdef KVM_CAP_VCPU_EVENTS
|
1160 | a0fb002c | Jan Kiszka | struct kvm_vcpu_events events;
|
1161 | a0fb002c | Jan Kiszka | int ret;
|
1162 | a0fb002c | Jan Kiszka | |
1163 | a0fb002c | Jan Kiszka | if (!kvm_has_vcpu_events()) {
|
1164 | a0fb002c | Jan Kiszka | return 0; |
1165 | a0fb002c | Jan Kiszka | } |
1166 | a0fb002c | Jan Kiszka | |
1167 | a0fb002c | Jan Kiszka | ret = kvm_vcpu_ioctl(env, KVM_GET_VCPU_EVENTS, &events); |
1168 | a0fb002c | Jan Kiszka | if (ret < 0) { |
1169 | a0fb002c | Jan Kiszka | return ret;
|
1170 | a0fb002c | Jan Kiszka | } |
1171 | 31827373 | Jan Kiszka | env->exception_injected = |
1172 | a0fb002c | Jan Kiszka | events.exception.injected ? events.exception.nr : -1;
|
1173 | a0fb002c | Jan Kiszka | env->has_error_code = events.exception.has_error_code; |
1174 | a0fb002c | Jan Kiszka | env->error_code = events.exception.error_code; |
1175 | a0fb002c | Jan Kiszka | |
1176 | a0fb002c | Jan Kiszka | env->interrupt_injected = |
1177 | a0fb002c | Jan Kiszka | events.interrupt.injected ? events.interrupt.nr : -1;
|
1178 | a0fb002c | Jan Kiszka | env->soft_interrupt = events.interrupt.soft; |
1179 | a0fb002c | Jan Kiszka | |
1180 | a0fb002c | Jan Kiszka | env->nmi_injected = events.nmi.injected; |
1181 | a0fb002c | Jan Kiszka | env->nmi_pending = events.nmi.pending; |
1182 | a0fb002c | Jan Kiszka | if (events.nmi.masked) {
|
1183 | a0fb002c | Jan Kiszka | env->hflags2 |= HF2_NMI_MASK; |
1184 | a0fb002c | Jan Kiszka | } else {
|
1185 | a0fb002c | Jan Kiszka | env->hflags2 &= ~HF2_NMI_MASK; |
1186 | a0fb002c | Jan Kiszka | } |
1187 | a0fb002c | Jan Kiszka | |
1188 | a0fb002c | Jan Kiszka | env->sipi_vector = events.sipi_vector; |
1189 | a0fb002c | Jan Kiszka | #endif
|
1190 | a0fb002c | Jan Kiszka | |
1191 | a0fb002c | Jan Kiszka | return 0; |
1192 | a0fb002c | Jan Kiszka | } |
1193 | a0fb002c | Jan Kiszka | |
1194 | b0b1d690 | Jan Kiszka | static int kvm_guest_debug_workarounds(CPUState *env) |
1195 | b0b1d690 | Jan Kiszka | { |
1196 | b0b1d690 | Jan Kiszka | int ret = 0; |
1197 | b0b1d690 | Jan Kiszka | #ifdef KVM_CAP_SET_GUEST_DEBUG
|
1198 | b0b1d690 | Jan Kiszka | unsigned long reinject_trap = 0; |
1199 | b0b1d690 | Jan Kiszka | |
1200 | b0b1d690 | Jan Kiszka | if (!kvm_has_vcpu_events()) {
|
1201 | b0b1d690 | Jan Kiszka | if (env->exception_injected == 1) { |
1202 | b0b1d690 | Jan Kiszka | reinject_trap = KVM_GUESTDBG_INJECT_DB; |
1203 | b0b1d690 | Jan Kiszka | } else if (env->exception_injected == 3) { |
1204 | b0b1d690 | Jan Kiszka | reinject_trap = KVM_GUESTDBG_INJECT_BP; |
1205 | b0b1d690 | Jan Kiszka | } |
1206 | b0b1d690 | Jan Kiszka | env->exception_injected = -1;
|
1207 | b0b1d690 | Jan Kiszka | } |
1208 | b0b1d690 | Jan Kiszka | |
1209 | b0b1d690 | Jan Kiszka | /*
|
1210 | b0b1d690 | Jan Kiszka | * Kernels before KVM_CAP_X86_ROBUST_SINGLESTEP overwrote flags.TF
|
1211 | b0b1d690 | Jan Kiszka | * injected via SET_GUEST_DEBUG while updating GP regs. Work around this
|
1212 | b0b1d690 | Jan Kiszka | * by updating the debug state once again if single-stepping is on.
|
1213 | b0b1d690 | Jan Kiszka | * Another reason to call kvm_update_guest_debug here is a pending debug
|
1214 | b0b1d690 | Jan Kiszka | * trap raise by the guest. On kernels without SET_VCPU_EVENTS we have to
|
1215 | b0b1d690 | Jan Kiszka | * reinject them via SET_GUEST_DEBUG.
|
1216 | b0b1d690 | Jan Kiszka | */
|
1217 | b0b1d690 | Jan Kiszka | if (reinject_trap ||
|
1218 | b0b1d690 | Jan Kiszka | (!kvm_has_robust_singlestep() && env->singlestep_enabled)) { |
1219 | b0b1d690 | Jan Kiszka | ret = kvm_update_guest_debug(env, reinject_trap); |
1220 | b0b1d690 | Jan Kiszka | } |
1221 | b0b1d690 | Jan Kiszka | #endif /* KVM_CAP_SET_GUEST_DEBUG */ |
1222 | b0b1d690 | Jan Kiszka | return ret;
|
1223 | b0b1d690 | Jan Kiszka | } |
1224 | b0b1d690 | Jan Kiszka | |
1225 | ff44f1a3 | Jan Kiszka | static int kvm_put_debugregs(CPUState *env) |
1226 | ff44f1a3 | Jan Kiszka | { |
1227 | ff44f1a3 | Jan Kiszka | #ifdef KVM_CAP_DEBUGREGS
|
1228 | ff44f1a3 | Jan Kiszka | struct kvm_debugregs dbgregs;
|
1229 | ff44f1a3 | Jan Kiszka | int i;
|
1230 | ff44f1a3 | Jan Kiszka | |
1231 | ff44f1a3 | Jan Kiszka | if (!kvm_has_debugregs()) {
|
1232 | ff44f1a3 | Jan Kiszka | return 0; |
1233 | ff44f1a3 | Jan Kiszka | } |
1234 | ff44f1a3 | Jan Kiszka | |
1235 | ff44f1a3 | Jan Kiszka | for (i = 0; i < 4; i++) { |
1236 | ff44f1a3 | Jan Kiszka | dbgregs.db[i] = env->dr[i]; |
1237 | ff44f1a3 | Jan Kiszka | } |
1238 | ff44f1a3 | Jan Kiszka | dbgregs.dr6 = env->dr[6];
|
1239 | ff44f1a3 | Jan Kiszka | dbgregs.dr7 = env->dr[7];
|
1240 | ff44f1a3 | Jan Kiszka | dbgregs.flags = 0;
|
1241 | ff44f1a3 | Jan Kiszka | |
1242 | ff44f1a3 | Jan Kiszka | return kvm_vcpu_ioctl(env, KVM_SET_DEBUGREGS, &dbgregs);
|
1243 | ff44f1a3 | Jan Kiszka | #else
|
1244 | ff44f1a3 | Jan Kiszka | return 0; |
1245 | ff44f1a3 | Jan Kiszka | #endif
|
1246 | ff44f1a3 | Jan Kiszka | } |
1247 | ff44f1a3 | Jan Kiszka | |
1248 | ff44f1a3 | Jan Kiszka | static int kvm_get_debugregs(CPUState *env) |
1249 | ff44f1a3 | Jan Kiszka | { |
1250 | ff44f1a3 | Jan Kiszka | #ifdef KVM_CAP_DEBUGREGS
|
1251 | ff44f1a3 | Jan Kiszka | struct kvm_debugregs dbgregs;
|
1252 | ff44f1a3 | Jan Kiszka | int i, ret;
|
1253 | ff44f1a3 | Jan Kiszka | |
1254 | ff44f1a3 | Jan Kiszka | if (!kvm_has_debugregs()) {
|
1255 | ff44f1a3 | Jan Kiszka | return 0; |
1256 | ff44f1a3 | Jan Kiszka | } |
1257 | ff44f1a3 | Jan Kiszka | |
1258 | ff44f1a3 | Jan Kiszka | ret = kvm_vcpu_ioctl(env, KVM_GET_DEBUGREGS, &dbgregs); |
1259 | ff44f1a3 | Jan Kiszka | if (ret < 0) { |
1260 | ff44f1a3 | Jan Kiszka | return ret;
|
1261 | ff44f1a3 | Jan Kiszka | } |
1262 | ff44f1a3 | Jan Kiszka | for (i = 0; i < 4; i++) { |
1263 | ff44f1a3 | Jan Kiszka | env->dr[i] = dbgregs.db[i]; |
1264 | ff44f1a3 | Jan Kiszka | } |
1265 | ff44f1a3 | Jan Kiszka | env->dr[4] = env->dr[6] = dbgregs.dr6; |
1266 | ff44f1a3 | Jan Kiszka | env->dr[5] = env->dr[7] = dbgregs.dr7; |
1267 | ff44f1a3 | Jan Kiszka | #endif
|
1268 | ff44f1a3 | Jan Kiszka | |
1269 | ff44f1a3 | Jan Kiszka | return 0; |
1270 | ff44f1a3 | Jan Kiszka | } |
1271 | ff44f1a3 | Jan Kiszka | |
1272 | ea375f9a | Jan Kiszka | int kvm_arch_put_registers(CPUState *env, int level) |
1273 | 05330448 | aliguori | { |
1274 | 05330448 | aliguori | int ret;
|
1275 | 05330448 | aliguori | |
1276 | dbaa07c4 | Jan Kiszka | assert(cpu_is_stopped(env) || qemu_cpu_self(env)); |
1277 | dbaa07c4 | Jan Kiszka | |
1278 | 05330448 | aliguori | ret = kvm_getput_regs(env, 1);
|
1279 | 05330448 | aliguori | if (ret < 0) |
1280 | 05330448 | aliguori | return ret;
|
1281 | 05330448 | aliguori | |
1282 | f1665b21 | Sheng Yang | ret = kvm_put_xsave(env); |
1283 | f1665b21 | Sheng Yang | if (ret < 0) |
1284 | f1665b21 | Sheng Yang | return ret;
|
1285 | f1665b21 | Sheng Yang | |
1286 | f1665b21 | Sheng Yang | ret = kvm_put_xcrs(env); |
1287 | 05330448 | aliguori | if (ret < 0) |
1288 | 05330448 | aliguori | return ret;
|
1289 | 05330448 | aliguori | |
1290 | 05330448 | aliguori | ret = kvm_put_sregs(env); |
1291 | 05330448 | aliguori | if (ret < 0) |
1292 | 05330448 | aliguori | return ret;
|
1293 | 05330448 | aliguori | |
1294 | ea643051 | Jan Kiszka | ret = kvm_put_msrs(env, level); |
1295 | 05330448 | aliguori | if (ret < 0) |
1296 | 05330448 | aliguori | return ret;
|
1297 | 05330448 | aliguori | |
1298 | ea643051 | Jan Kiszka | if (level >= KVM_PUT_RESET_STATE) {
|
1299 | ea643051 | Jan Kiszka | ret = kvm_put_mp_state(env); |
1300 | ea643051 | Jan Kiszka | if (ret < 0) |
1301 | ea643051 | Jan Kiszka | return ret;
|
1302 | ea643051 | Jan Kiszka | } |
1303 | f8d926e9 | Jan Kiszka | |
1304 | ea643051 | Jan Kiszka | ret = kvm_put_vcpu_events(env, level); |
1305 | a0fb002c | Jan Kiszka | if (ret < 0) |
1306 | a0fb002c | Jan Kiszka | return ret;
|
1307 | a0fb002c | Jan Kiszka | |
1308 | b0b1d690 | Jan Kiszka | /* must be last */
|
1309 | b0b1d690 | Jan Kiszka | ret = kvm_guest_debug_workarounds(env); |
1310 | b0b1d690 | Jan Kiszka | if (ret < 0) |
1311 | b0b1d690 | Jan Kiszka | return ret;
|
1312 | b0b1d690 | Jan Kiszka | |
1313 | ff44f1a3 | Jan Kiszka | ret = kvm_put_debugregs(env); |
1314 | ff44f1a3 | Jan Kiszka | if (ret < 0) |
1315 | ff44f1a3 | Jan Kiszka | return ret;
|
1316 | ff44f1a3 | Jan Kiszka | |
1317 | 05330448 | aliguori | return 0; |
1318 | 05330448 | aliguori | } |
1319 | 05330448 | aliguori | |
1320 | 05330448 | aliguori | int kvm_arch_get_registers(CPUState *env)
|
1321 | 05330448 | aliguori | { |
1322 | 05330448 | aliguori | int ret;
|
1323 | 05330448 | aliguori | |
1324 | dbaa07c4 | Jan Kiszka | assert(cpu_is_stopped(env) || qemu_cpu_self(env)); |
1325 | dbaa07c4 | Jan Kiszka | |
1326 | 05330448 | aliguori | ret = kvm_getput_regs(env, 0);
|
1327 | 05330448 | aliguori | if (ret < 0) |
1328 | 05330448 | aliguori | return ret;
|
1329 | 05330448 | aliguori | |
1330 | f1665b21 | Sheng Yang | ret = kvm_get_xsave(env); |
1331 | f1665b21 | Sheng Yang | if (ret < 0) |
1332 | f1665b21 | Sheng Yang | return ret;
|
1333 | f1665b21 | Sheng Yang | |
1334 | f1665b21 | Sheng Yang | ret = kvm_get_xcrs(env); |
1335 | 05330448 | aliguori | if (ret < 0) |
1336 | 05330448 | aliguori | return ret;
|
1337 | 05330448 | aliguori | |
1338 | 05330448 | aliguori | ret = kvm_get_sregs(env); |
1339 | 05330448 | aliguori | if (ret < 0) |
1340 | 05330448 | aliguori | return ret;
|
1341 | 05330448 | aliguori | |
1342 | 05330448 | aliguori | ret = kvm_get_msrs(env); |
1343 | 05330448 | aliguori | if (ret < 0) |
1344 | 05330448 | aliguori | return ret;
|
1345 | 05330448 | aliguori | |
1346 | 5a2e3c2e | Jan Kiszka | ret = kvm_get_mp_state(env); |
1347 | 5a2e3c2e | Jan Kiszka | if (ret < 0) |
1348 | 5a2e3c2e | Jan Kiszka | return ret;
|
1349 | 5a2e3c2e | Jan Kiszka | |
1350 | a0fb002c | Jan Kiszka | ret = kvm_get_vcpu_events(env); |
1351 | a0fb002c | Jan Kiszka | if (ret < 0) |
1352 | a0fb002c | Jan Kiszka | return ret;
|
1353 | a0fb002c | Jan Kiszka | |
1354 | ff44f1a3 | Jan Kiszka | ret = kvm_get_debugregs(env); |
1355 | ff44f1a3 | Jan Kiszka | if (ret < 0) |
1356 | ff44f1a3 | Jan Kiszka | return ret;
|
1357 | ff44f1a3 | Jan Kiszka | |
1358 | 05330448 | aliguori | return 0; |
1359 | 05330448 | aliguori | } |
1360 | 05330448 | aliguori | |
1361 | 05330448 | aliguori | int kvm_arch_pre_run(CPUState *env, struct kvm_run *run) |
1362 | 05330448 | aliguori | { |
1363 | 05330448 | aliguori | /* Try to inject an interrupt if the guest can accept it */
|
1364 | 05330448 | aliguori | if (run->ready_for_interrupt_injection &&
|
1365 | 05330448 | aliguori | (env->interrupt_request & CPU_INTERRUPT_HARD) && |
1366 | 05330448 | aliguori | (env->eflags & IF_MASK)) { |
1367 | 05330448 | aliguori | int irq;
|
1368 | 05330448 | aliguori | |
1369 | 05330448 | aliguori | env->interrupt_request &= ~CPU_INTERRUPT_HARD; |
1370 | 05330448 | aliguori | irq = cpu_get_pic_interrupt(env); |
1371 | 05330448 | aliguori | if (irq >= 0) { |
1372 | 05330448 | aliguori | struct kvm_interrupt intr;
|
1373 | 05330448 | aliguori | intr.irq = irq; |
1374 | 05330448 | aliguori | /* FIXME: errors */
|
1375 | 8c0d577e | Blue Swirl | DPRINTF("injected interrupt %d\n", irq);
|
1376 | 05330448 | aliguori | kvm_vcpu_ioctl(env, KVM_INTERRUPT, &intr); |
1377 | 05330448 | aliguori | } |
1378 | 05330448 | aliguori | } |
1379 | 05330448 | aliguori | |
1380 | 05330448 | aliguori | /* If we have an interrupt but the guest is not ready to receive an
|
1381 | 05330448 | aliguori | * interrupt, request an interrupt window exit. This will
|
1382 | 05330448 | aliguori | * cause a return to userspace as soon as the guest is ready to
|
1383 | 05330448 | aliguori | * receive interrupts. */
|
1384 | 05330448 | aliguori | if ((env->interrupt_request & CPU_INTERRUPT_HARD))
|
1385 | 05330448 | aliguori | run->request_interrupt_window = 1;
|
1386 | 05330448 | aliguori | else
|
1387 | 05330448 | aliguori | run->request_interrupt_window = 0;
|
1388 | 05330448 | aliguori | |
1389 | 8c0d577e | Blue Swirl | DPRINTF("setting tpr\n");
|
1390 | 4a942cea | Blue Swirl | run->cr8 = cpu_get_apic_tpr(env->apic_state); |
1391 | 05330448 | aliguori | |
1392 | 05330448 | aliguori | return 0; |
1393 | 05330448 | aliguori | } |
1394 | 05330448 | aliguori | |
1395 | 05330448 | aliguori | int kvm_arch_post_run(CPUState *env, struct kvm_run *run) |
1396 | 05330448 | aliguori | { |
1397 | 05330448 | aliguori | if (run->if_flag)
|
1398 | 05330448 | aliguori | env->eflags |= IF_MASK; |
1399 | 05330448 | aliguori | else
|
1400 | 05330448 | aliguori | env->eflags &= ~IF_MASK; |
1401 | 05330448 | aliguori | |
1402 | 4a942cea | Blue Swirl | cpu_set_apic_tpr(env->apic_state, run->cr8); |
1403 | 4a942cea | Blue Swirl | cpu_set_apic_base(env->apic_state, run->apic_base); |
1404 | 05330448 | aliguori | |
1405 | 05330448 | aliguori | return 0; |
1406 | 05330448 | aliguori | } |
1407 | 05330448 | aliguori | |
1408 | 0af691d7 | Marcelo Tosatti | int kvm_arch_process_irqchip_events(CPUState *env)
|
1409 | 0af691d7 | Marcelo Tosatti | { |
1410 | 0af691d7 | Marcelo Tosatti | if (env->interrupt_request & CPU_INTERRUPT_INIT) {
|
1411 | 0af691d7 | Marcelo Tosatti | kvm_cpu_synchronize_state(env); |
1412 | 0af691d7 | Marcelo Tosatti | do_cpu_init(env); |
1413 | 0af691d7 | Marcelo Tosatti | env->exception_index = EXCP_HALTED; |
1414 | 0af691d7 | Marcelo Tosatti | } |
1415 | 0af691d7 | Marcelo Tosatti | |
1416 | 0af691d7 | Marcelo Tosatti | if (env->interrupt_request & CPU_INTERRUPT_SIPI) {
|
1417 | 0af691d7 | Marcelo Tosatti | kvm_cpu_synchronize_state(env); |
1418 | 0af691d7 | Marcelo Tosatti | do_cpu_sipi(env); |
1419 | 0af691d7 | Marcelo Tosatti | } |
1420 | 0af691d7 | Marcelo Tosatti | |
1421 | 0af691d7 | Marcelo Tosatti | return env->halted;
|
1422 | 0af691d7 | Marcelo Tosatti | } |
1423 | 0af691d7 | Marcelo Tosatti | |
1424 | 05330448 | aliguori | static int kvm_handle_halt(CPUState *env) |
1425 | 05330448 | aliguori | { |
1426 | 05330448 | aliguori | if (!((env->interrupt_request & CPU_INTERRUPT_HARD) &&
|
1427 | 05330448 | aliguori | (env->eflags & IF_MASK)) && |
1428 | 05330448 | aliguori | !(env->interrupt_request & CPU_INTERRUPT_NMI)) { |
1429 | 05330448 | aliguori | env->halted = 1;
|
1430 | 05330448 | aliguori | env->exception_index = EXCP_HLT; |
1431 | 05330448 | aliguori | return 0; |
1432 | 05330448 | aliguori | } |
1433 | 05330448 | aliguori | |
1434 | 05330448 | aliguori | return 1; |
1435 | 05330448 | aliguori | } |
1436 | 05330448 | aliguori | |
1437 | 05330448 | aliguori | int kvm_arch_handle_exit(CPUState *env, struct kvm_run *run) |
1438 | 05330448 | aliguori | { |
1439 | 05330448 | aliguori | int ret = 0; |
1440 | 05330448 | aliguori | |
1441 | 05330448 | aliguori | switch (run->exit_reason) {
|
1442 | 05330448 | aliguori | case KVM_EXIT_HLT:
|
1443 | 8c0d577e | Blue Swirl | DPRINTF("handle_hlt\n");
|
1444 | 05330448 | aliguori | ret = kvm_handle_halt(env); |
1445 | 05330448 | aliguori | break;
|
1446 | 05330448 | aliguori | } |
1447 | 05330448 | aliguori | |
1448 | 05330448 | aliguori | return ret;
|
1449 | 05330448 | aliguori | } |
1450 | e22a25c9 | aliguori | |
1451 | e22a25c9 | aliguori | #ifdef KVM_CAP_SET_GUEST_DEBUG
|
1452 | e22a25c9 | aliguori | int kvm_arch_insert_sw_breakpoint(CPUState *env, struct kvm_sw_breakpoint *bp) |
1453 | e22a25c9 | aliguori | { |
1454 | 38972938 | Juan Quintela | static const uint8_t int3 = 0xcc; |
1455 | 64bf3f4e | aliguori | |
1456 | e22a25c9 | aliguori | if (cpu_memory_rw_debug(env, bp->pc, (uint8_t *)&bp->saved_insn, 1, 0) || |
1457 | 64bf3f4e | aliguori | cpu_memory_rw_debug(env, bp->pc, (uint8_t *)&int3, 1, 1)) |
1458 | e22a25c9 | aliguori | return -EINVAL;
|
1459 | e22a25c9 | aliguori | return 0; |
1460 | e22a25c9 | aliguori | } |
1461 | e22a25c9 | aliguori | |
1462 | e22a25c9 | aliguori | int kvm_arch_remove_sw_breakpoint(CPUState *env, struct kvm_sw_breakpoint *bp) |
1463 | e22a25c9 | aliguori | { |
1464 | e22a25c9 | aliguori | uint8_t int3; |
1465 | e22a25c9 | aliguori | |
1466 | e22a25c9 | aliguori | if (cpu_memory_rw_debug(env, bp->pc, &int3, 1, 0) || int3 != 0xcc || |
1467 | 64bf3f4e | aliguori | cpu_memory_rw_debug(env, bp->pc, (uint8_t *)&bp->saved_insn, 1, 1)) |
1468 | e22a25c9 | aliguori | return -EINVAL;
|
1469 | e22a25c9 | aliguori | return 0; |
1470 | e22a25c9 | aliguori | } |
1471 | e22a25c9 | aliguori | |
1472 | e22a25c9 | aliguori | static struct { |
1473 | e22a25c9 | aliguori | target_ulong addr; |
1474 | e22a25c9 | aliguori | int len;
|
1475 | e22a25c9 | aliguori | int type;
|
1476 | e22a25c9 | aliguori | } hw_breakpoint[4];
|
1477 | e22a25c9 | aliguori | |
1478 | e22a25c9 | aliguori | static int nb_hw_breakpoint; |
1479 | e22a25c9 | aliguori | |
1480 | e22a25c9 | aliguori | static int find_hw_breakpoint(target_ulong addr, int len, int type) |
1481 | e22a25c9 | aliguori | { |
1482 | e22a25c9 | aliguori | int n;
|
1483 | e22a25c9 | aliguori | |
1484 | e22a25c9 | aliguori | for (n = 0; n < nb_hw_breakpoint; n++) |
1485 | e22a25c9 | aliguori | if (hw_breakpoint[n].addr == addr && hw_breakpoint[n].type == type &&
|
1486 | e22a25c9 | aliguori | (hw_breakpoint[n].len == len || len == -1))
|
1487 | e22a25c9 | aliguori | return n;
|
1488 | e22a25c9 | aliguori | return -1; |
1489 | e22a25c9 | aliguori | } |
1490 | e22a25c9 | aliguori | |
1491 | e22a25c9 | aliguori | int kvm_arch_insert_hw_breakpoint(target_ulong addr,
|
1492 | e22a25c9 | aliguori | target_ulong len, int type)
|
1493 | e22a25c9 | aliguori | { |
1494 | e22a25c9 | aliguori | switch (type) {
|
1495 | e22a25c9 | aliguori | case GDB_BREAKPOINT_HW:
|
1496 | e22a25c9 | aliguori | len = 1;
|
1497 | e22a25c9 | aliguori | break;
|
1498 | e22a25c9 | aliguori | case GDB_WATCHPOINT_WRITE:
|
1499 | e22a25c9 | aliguori | case GDB_WATCHPOINT_ACCESS:
|
1500 | e22a25c9 | aliguori | switch (len) {
|
1501 | e22a25c9 | aliguori | case 1: |
1502 | e22a25c9 | aliguori | break;
|
1503 | e22a25c9 | aliguori | case 2: |
1504 | e22a25c9 | aliguori | case 4: |
1505 | e22a25c9 | aliguori | case 8: |
1506 | e22a25c9 | aliguori | if (addr & (len - 1)) |
1507 | e22a25c9 | aliguori | return -EINVAL;
|
1508 | e22a25c9 | aliguori | break;
|
1509 | e22a25c9 | aliguori | default:
|
1510 | e22a25c9 | aliguori | return -EINVAL;
|
1511 | e22a25c9 | aliguori | } |
1512 | e22a25c9 | aliguori | break;
|
1513 | e22a25c9 | aliguori | default:
|
1514 | e22a25c9 | aliguori | return -ENOSYS;
|
1515 | e22a25c9 | aliguori | } |
1516 | e22a25c9 | aliguori | |
1517 | e22a25c9 | aliguori | if (nb_hw_breakpoint == 4) |
1518 | e22a25c9 | aliguori | return -ENOBUFS;
|
1519 | e22a25c9 | aliguori | |
1520 | e22a25c9 | aliguori | if (find_hw_breakpoint(addr, len, type) >= 0) |
1521 | e22a25c9 | aliguori | return -EEXIST;
|
1522 | e22a25c9 | aliguori | |
1523 | e22a25c9 | aliguori | hw_breakpoint[nb_hw_breakpoint].addr = addr; |
1524 | e22a25c9 | aliguori | hw_breakpoint[nb_hw_breakpoint].len = len; |
1525 | e22a25c9 | aliguori | hw_breakpoint[nb_hw_breakpoint].type = type; |
1526 | e22a25c9 | aliguori | nb_hw_breakpoint++; |
1527 | e22a25c9 | aliguori | |
1528 | e22a25c9 | aliguori | return 0; |
1529 | e22a25c9 | aliguori | } |
1530 | e22a25c9 | aliguori | |
1531 | e22a25c9 | aliguori | int kvm_arch_remove_hw_breakpoint(target_ulong addr,
|
1532 | e22a25c9 | aliguori | target_ulong len, int type)
|
1533 | e22a25c9 | aliguori | { |
1534 | e22a25c9 | aliguori | int n;
|
1535 | e22a25c9 | aliguori | |
1536 | e22a25c9 | aliguori | n = find_hw_breakpoint(addr, (type == GDB_BREAKPOINT_HW) ? 1 : len, type);
|
1537 | e22a25c9 | aliguori | if (n < 0) |
1538 | e22a25c9 | aliguori | return -ENOENT;
|
1539 | e22a25c9 | aliguori | |
1540 | e22a25c9 | aliguori | nb_hw_breakpoint--; |
1541 | e22a25c9 | aliguori | hw_breakpoint[n] = hw_breakpoint[nb_hw_breakpoint]; |
1542 | e22a25c9 | aliguori | |
1543 | e22a25c9 | aliguori | return 0; |
1544 | e22a25c9 | aliguori | } |
1545 | e22a25c9 | aliguori | |
1546 | e22a25c9 | aliguori | void kvm_arch_remove_all_hw_breakpoints(void) |
1547 | e22a25c9 | aliguori | { |
1548 | e22a25c9 | aliguori | nb_hw_breakpoint = 0;
|
1549 | e22a25c9 | aliguori | } |
1550 | e22a25c9 | aliguori | |
1551 | e22a25c9 | aliguori | static CPUWatchpoint hw_watchpoint;
|
1552 | e22a25c9 | aliguori | |
1553 | e22a25c9 | aliguori | int kvm_arch_debug(struct kvm_debug_exit_arch *arch_info) |
1554 | e22a25c9 | aliguori | { |
1555 | e22a25c9 | aliguori | int handle = 0; |
1556 | e22a25c9 | aliguori | int n;
|
1557 | e22a25c9 | aliguori | |
1558 | e22a25c9 | aliguori | if (arch_info->exception == 1) { |
1559 | e22a25c9 | aliguori | if (arch_info->dr6 & (1 << 14)) { |
1560 | e22a25c9 | aliguori | if (cpu_single_env->singlestep_enabled)
|
1561 | e22a25c9 | aliguori | handle = 1;
|
1562 | e22a25c9 | aliguori | } else {
|
1563 | e22a25c9 | aliguori | for (n = 0; n < 4; n++) |
1564 | e22a25c9 | aliguori | if (arch_info->dr6 & (1 << n)) |
1565 | e22a25c9 | aliguori | switch ((arch_info->dr7 >> (16 + n*4)) & 0x3) { |
1566 | e22a25c9 | aliguori | case 0x0: |
1567 | e22a25c9 | aliguori | handle = 1;
|
1568 | e22a25c9 | aliguori | break;
|
1569 | e22a25c9 | aliguori | case 0x1: |
1570 | e22a25c9 | aliguori | handle = 1;
|
1571 | e22a25c9 | aliguori | cpu_single_env->watchpoint_hit = &hw_watchpoint; |
1572 | e22a25c9 | aliguori | hw_watchpoint.vaddr = hw_breakpoint[n].addr; |
1573 | e22a25c9 | aliguori | hw_watchpoint.flags = BP_MEM_WRITE; |
1574 | e22a25c9 | aliguori | break;
|
1575 | e22a25c9 | aliguori | case 0x3: |
1576 | e22a25c9 | aliguori | handle = 1;
|
1577 | e22a25c9 | aliguori | cpu_single_env->watchpoint_hit = &hw_watchpoint; |
1578 | e22a25c9 | aliguori | hw_watchpoint.vaddr = hw_breakpoint[n].addr; |
1579 | e22a25c9 | aliguori | hw_watchpoint.flags = BP_MEM_ACCESS; |
1580 | e22a25c9 | aliguori | break;
|
1581 | e22a25c9 | aliguori | } |
1582 | e22a25c9 | aliguori | } |
1583 | e22a25c9 | aliguori | } else if (kvm_find_sw_breakpoint(cpu_single_env, arch_info->pc)) |
1584 | e22a25c9 | aliguori | handle = 1;
|
1585 | e22a25c9 | aliguori | |
1586 | b0b1d690 | Jan Kiszka | if (!handle) {
|
1587 | b0b1d690 | Jan Kiszka | cpu_synchronize_state(cpu_single_env); |
1588 | b0b1d690 | Jan Kiszka | assert(cpu_single_env->exception_injected == -1);
|
1589 | b0b1d690 | Jan Kiszka | |
1590 | b0b1d690 | Jan Kiszka | cpu_single_env->exception_injected = arch_info->exception; |
1591 | b0b1d690 | Jan Kiszka | cpu_single_env->has_error_code = 0;
|
1592 | b0b1d690 | Jan Kiszka | } |
1593 | e22a25c9 | aliguori | |
1594 | e22a25c9 | aliguori | return handle;
|
1595 | e22a25c9 | aliguori | } |
1596 | e22a25c9 | aliguori | |
1597 | e22a25c9 | aliguori | void kvm_arch_update_guest_debug(CPUState *env, struct kvm_guest_debug *dbg) |
1598 | e22a25c9 | aliguori | { |
1599 | e22a25c9 | aliguori | const uint8_t type_code[] = {
|
1600 | e22a25c9 | aliguori | [GDB_BREAKPOINT_HW] = 0x0,
|
1601 | e22a25c9 | aliguori | [GDB_WATCHPOINT_WRITE] = 0x1,
|
1602 | e22a25c9 | aliguori | [GDB_WATCHPOINT_ACCESS] = 0x3
|
1603 | e22a25c9 | aliguori | }; |
1604 | e22a25c9 | aliguori | const uint8_t len_code[] = {
|
1605 | e22a25c9 | aliguori | [1] = 0x0, [2] = 0x1, [4] = 0x3, [8] = 0x2 |
1606 | e22a25c9 | aliguori | }; |
1607 | e22a25c9 | aliguori | int n;
|
1608 | e22a25c9 | aliguori | |
1609 | e22a25c9 | aliguori | if (kvm_sw_breakpoints_active(env))
|
1610 | e22a25c9 | aliguori | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP; |
1611 | e22a25c9 | aliguori | |
1612 | e22a25c9 | aliguori | if (nb_hw_breakpoint > 0) { |
1613 | e22a25c9 | aliguori | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; |
1614 | e22a25c9 | aliguori | dbg->arch.debugreg[7] = 0x0600; |
1615 | e22a25c9 | aliguori | for (n = 0; n < nb_hw_breakpoint; n++) { |
1616 | e22a25c9 | aliguori | dbg->arch.debugreg[n] = hw_breakpoint[n].addr; |
1617 | e22a25c9 | aliguori | dbg->arch.debugreg[7] |= (2 << (n * 2)) | |
1618 | e22a25c9 | aliguori | (type_code[hw_breakpoint[n].type] << (16 + n*4)) | |
1619 | e22a25c9 | aliguori | (len_code[hw_breakpoint[n].len] << (18 + n*4)); |
1620 | e22a25c9 | aliguori | } |
1621 | e22a25c9 | aliguori | } |
1622 | f1665b21 | Sheng Yang | /* Legal xcr0 for loading */
|
1623 | f1665b21 | Sheng Yang | env->xcr0 = 1;
|
1624 | e22a25c9 | aliguori | } |
1625 | e22a25c9 | aliguori | #endif /* KVM_CAP_SET_GUEST_DEBUG */ |
1626 | 4513d923 | Gleb Natapov | |
1627 | 4513d923 | Gleb Natapov | bool kvm_arch_stop_on_emulation_error(CPUState *env)
|
1628 | 4513d923 | Gleb Natapov | { |
1629 | 4513d923 | Gleb Natapov | return !(env->cr[0] & CR0_PE_MASK) || |
1630 | 4513d923 | Gleb Natapov | ((env->segs[R_CS].selector & 3) != 3); |
1631 | 4513d923 | Gleb Natapov | } |
1632 | 4513d923 | Gleb Natapov | |
1633 | c0532a76 | Marcelo Tosatti | static void hardware_memory_error(void) |
1634 | c0532a76 | Marcelo Tosatti | { |
1635 | c0532a76 | Marcelo Tosatti | fprintf(stderr, "Hardware memory error!\n");
|
1636 | c0532a76 | Marcelo Tosatti | exit(1);
|
1637 | c0532a76 | Marcelo Tosatti | } |
1638 | c0532a76 | Marcelo Tosatti | |
1639 | c0532a76 | Marcelo Tosatti | int kvm_on_sigbus_vcpu(CPUState *env, int code, void *addr) |
1640 | c0532a76 | Marcelo Tosatti | { |
1641 | c0532a76 | Marcelo Tosatti | #if defined(KVM_CAP_MCE)
|
1642 | c0532a76 | Marcelo Tosatti | struct kvm_x86_mce mce = {
|
1643 | c0532a76 | Marcelo Tosatti | .bank = 9,
|
1644 | c0532a76 | Marcelo Tosatti | }; |
1645 | c0532a76 | Marcelo Tosatti | void *vaddr;
|
1646 | c0532a76 | Marcelo Tosatti | ram_addr_t ram_addr; |
1647 | c0532a76 | Marcelo Tosatti | target_phys_addr_t paddr; |
1648 | c0532a76 | Marcelo Tosatti | int r;
|
1649 | c0532a76 | Marcelo Tosatti | |
1650 | c0532a76 | Marcelo Tosatti | if ((env->mcg_cap & MCG_SER_P) && addr
|
1651 | c0532a76 | Marcelo Tosatti | && (code == BUS_MCEERR_AR |
1652 | c0532a76 | Marcelo Tosatti | || code == BUS_MCEERR_AO)) { |
1653 | c0532a76 | Marcelo Tosatti | if (code == BUS_MCEERR_AR) {
|
1654 | c0532a76 | Marcelo Tosatti | /* Fake an Intel architectural Data Load SRAR UCR */
|
1655 | c0532a76 | Marcelo Tosatti | mce.status = MCI_STATUS_VAL | MCI_STATUS_UC | MCI_STATUS_EN |
1656 | c0532a76 | Marcelo Tosatti | | MCI_STATUS_MISCV | MCI_STATUS_ADDRV | MCI_STATUS_S |
1657 | c0532a76 | Marcelo Tosatti | | MCI_STATUS_AR | 0x134;
|
1658 | c0532a76 | Marcelo Tosatti | mce.misc = (MCM_ADDR_PHYS << 6) | 0xc; |
1659 | c0532a76 | Marcelo Tosatti | mce.mcg_status = MCG_STATUS_MCIP | MCG_STATUS_EIPV; |
1660 | c0532a76 | Marcelo Tosatti | } else {
|
1661 | c0532a76 | Marcelo Tosatti | /*
|
1662 | c0532a76 | Marcelo Tosatti | * If there is an MCE excpetion being processed, ignore
|
1663 | c0532a76 | Marcelo Tosatti | * this SRAO MCE
|
1664 | c0532a76 | Marcelo Tosatti | */
|
1665 | c0532a76 | Marcelo Tosatti | r = kvm_mce_in_exception(env); |
1666 | c0532a76 | Marcelo Tosatti | if (r == -1) { |
1667 | c0532a76 | Marcelo Tosatti | fprintf(stderr, "Failed to get MCE status\n");
|
1668 | c0532a76 | Marcelo Tosatti | } else if (r) { |
1669 | c0532a76 | Marcelo Tosatti | return 0; |
1670 | c0532a76 | Marcelo Tosatti | } |
1671 | c0532a76 | Marcelo Tosatti | /* Fake an Intel architectural Memory scrubbing UCR */
|
1672 | c0532a76 | Marcelo Tosatti | mce.status = MCI_STATUS_VAL | MCI_STATUS_UC | MCI_STATUS_EN |
1673 | c0532a76 | Marcelo Tosatti | | MCI_STATUS_MISCV | MCI_STATUS_ADDRV | MCI_STATUS_S |
1674 | c0532a76 | Marcelo Tosatti | | 0xc0;
|
1675 | c0532a76 | Marcelo Tosatti | mce.misc = (MCM_ADDR_PHYS << 6) | 0xc; |
1676 | c0532a76 | Marcelo Tosatti | mce.mcg_status = MCG_STATUS_MCIP | MCG_STATUS_RIPV; |
1677 | c0532a76 | Marcelo Tosatti | } |
1678 | c0532a76 | Marcelo Tosatti | vaddr = (void *)addr;
|
1679 | c0532a76 | Marcelo Tosatti | if (qemu_ram_addr_from_host(vaddr, &ram_addr) ||
|
1680 | c0532a76 | Marcelo Tosatti | !kvm_physical_memory_addr_from_ram(env->kvm_state, ram_addr, &paddr)) { |
1681 | c0532a76 | Marcelo Tosatti | fprintf(stderr, "Hardware memory error for memory used by "
|
1682 | c0532a76 | Marcelo Tosatti | "QEMU itself instead of guest system!\n");
|
1683 | c0532a76 | Marcelo Tosatti | /* Hope we are lucky for AO MCE */
|
1684 | c0532a76 | Marcelo Tosatti | if (code == BUS_MCEERR_AO) {
|
1685 | c0532a76 | Marcelo Tosatti | return 0; |
1686 | c0532a76 | Marcelo Tosatti | } else {
|
1687 | c0532a76 | Marcelo Tosatti | hardware_memory_error(); |
1688 | c0532a76 | Marcelo Tosatti | } |
1689 | c0532a76 | Marcelo Tosatti | } |
1690 | c0532a76 | Marcelo Tosatti | mce.addr = paddr; |
1691 | c0532a76 | Marcelo Tosatti | r = kvm_set_mce(env, &mce); |
1692 | c0532a76 | Marcelo Tosatti | if (r < 0) { |
1693 | c0532a76 | Marcelo Tosatti | fprintf(stderr, "kvm_set_mce: %s\n", strerror(errno));
|
1694 | c0532a76 | Marcelo Tosatti | abort(); |
1695 | c0532a76 | Marcelo Tosatti | } |
1696 | c0532a76 | Marcelo Tosatti | } else
|
1697 | c0532a76 | Marcelo Tosatti | #endif
|
1698 | c0532a76 | Marcelo Tosatti | { |
1699 | c0532a76 | Marcelo Tosatti | if (code == BUS_MCEERR_AO) {
|
1700 | c0532a76 | Marcelo Tosatti | return 0; |
1701 | c0532a76 | Marcelo Tosatti | } else if (code == BUS_MCEERR_AR) { |
1702 | c0532a76 | Marcelo Tosatti | hardware_memory_error(); |
1703 | c0532a76 | Marcelo Tosatti | } else {
|
1704 | c0532a76 | Marcelo Tosatti | return 1; |
1705 | c0532a76 | Marcelo Tosatti | } |
1706 | c0532a76 | Marcelo Tosatti | } |
1707 | c0532a76 | Marcelo Tosatti | return 0; |
1708 | c0532a76 | Marcelo Tosatti | } |
1709 | c0532a76 | Marcelo Tosatti | |
1710 | c0532a76 | Marcelo Tosatti | int kvm_on_sigbus(int code, void *addr) |
1711 | c0532a76 | Marcelo Tosatti | { |
1712 | c0532a76 | Marcelo Tosatti | #if defined(KVM_CAP_MCE)
|
1713 | c0532a76 | Marcelo Tosatti | if ((first_cpu->mcg_cap & MCG_SER_P) && addr && code == BUS_MCEERR_AO) {
|
1714 | c0532a76 | Marcelo Tosatti | uint64_t status; |
1715 | c0532a76 | Marcelo Tosatti | void *vaddr;
|
1716 | c0532a76 | Marcelo Tosatti | ram_addr_t ram_addr; |
1717 | c0532a76 | Marcelo Tosatti | target_phys_addr_t paddr; |
1718 | c0532a76 | Marcelo Tosatti | CPUState *cenv; |
1719 | c0532a76 | Marcelo Tosatti | |
1720 | c0532a76 | Marcelo Tosatti | /* Hope we are lucky for AO MCE */
|
1721 | c0532a76 | Marcelo Tosatti | vaddr = addr; |
1722 | c0532a76 | Marcelo Tosatti | if (qemu_ram_addr_from_host(vaddr, &ram_addr) ||
|
1723 | c0532a76 | Marcelo Tosatti | !kvm_physical_memory_addr_from_ram(first_cpu->kvm_state, ram_addr, &paddr)) { |
1724 | c0532a76 | Marcelo Tosatti | fprintf(stderr, "Hardware memory error for memory used by "
|
1725 | c0532a76 | Marcelo Tosatti | "QEMU itself instead of guest system!: %p\n", addr);
|
1726 | c0532a76 | Marcelo Tosatti | return 0; |
1727 | c0532a76 | Marcelo Tosatti | } |
1728 | c0532a76 | Marcelo Tosatti | status = MCI_STATUS_VAL | MCI_STATUS_UC | MCI_STATUS_EN |
1729 | c0532a76 | Marcelo Tosatti | | MCI_STATUS_MISCV | MCI_STATUS_ADDRV | MCI_STATUS_S |
1730 | c0532a76 | Marcelo Tosatti | | 0xc0;
|
1731 | c0532a76 | Marcelo Tosatti | kvm_inject_x86_mce(first_cpu, 9, status,
|
1732 | c0532a76 | Marcelo Tosatti | MCG_STATUS_MCIP | MCG_STATUS_RIPV, paddr, |
1733 | c0532a76 | Marcelo Tosatti | (MCM_ADDR_PHYS << 6) | 0xc, 1); |
1734 | c0532a76 | Marcelo Tosatti | for (cenv = first_cpu->next_cpu; cenv != NULL; cenv = cenv->next_cpu) { |
1735 | c0532a76 | Marcelo Tosatti | kvm_inject_x86_mce(cenv, 1, MCI_STATUS_VAL | MCI_STATUS_UC,
|
1736 | c0532a76 | Marcelo Tosatti | MCG_STATUS_MCIP | MCG_STATUS_RIPV, 0, 0, 1); |
1737 | c0532a76 | Marcelo Tosatti | } |
1738 | c0532a76 | Marcelo Tosatti | } else
|
1739 | c0532a76 | Marcelo Tosatti | #endif
|
1740 | c0532a76 | Marcelo Tosatti | { |
1741 | c0532a76 | Marcelo Tosatti | if (code == BUS_MCEERR_AO) {
|
1742 | c0532a76 | Marcelo Tosatti | return 0; |
1743 | c0532a76 | Marcelo Tosatti | } else if (code == BUS_MCEERR_AR) { |
1744 | c0532a76 | Marcelo Tosatti | hardware_memory_error(); |
1745 | c0532a76 | Marcelo Tosatti | } else {
|
1746 | c0532a76 | Marcelo Tosatti | return 1; |
1747 | c0532a76 | Marcelo Tosatti | } |
1748 | c0532a76 | Marcelo Tosatti | } |
1749 | c0532a76 | Marcelo Tosatti | return 0; |
1750 | c0532a76 | Marcelo Tosatti | } |