Revision f8bf8606 target-arm/cpu.h
b/target-arm/cpu.h | ||
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126 | 126 |
uint32_t c6_region[8]; /* MPU base/size registers. */ |
127 | 127 |
uint32_t c6_insn; /* Fault address registers. */ |
128 | 128 |
uint32_t c6_data; |
129 |
uint32_t c7_par; /* Translation result. */ |
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129 | 130 |
uint32_t c9_insn; /* Cache lockdown registers. */ |
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uint32_t c9_data; |
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uint32_t c13_fcse; /* FCSE PID. */ |
... | ... | |
428 | 429 |
#define cpu_signal_handler cpu_arm_signal_handler |
429 | 430 |
#define cpu_list arm_cpu_list |
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#define CPU_SAVE_VERSION 2
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#define CPU_SAVE_VERSION 3
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/* MMU modes definitions */ |
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#define MMU_MODE0_SUFFIX _kernel |
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