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# Date Author Comment
893f9865 05/28/2008 04:37 pm ths

Honour current_tc for MIPS M{T,F}{HI,LO}, by Richard Sandiford.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4604 c046a42c-6fe2-441c-8c8c-71466251a162
36271893 05/06/2008 11:48 pm ths

Enable 64-bit FPU only for NewABI. Spotted by Vince Weaver.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4368 c046a42c-6fe2-441c-8c8c-71466251a162
958fb4a9 05/06/2008 01:57 pm ths

Use TCG for MIPS GPR moves.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4356 c046a42c-6fe2-441c-8c8c-71466251a162
ea4b07f7 12/28/2007 02:35 pm ths

Set FCR0.F64 for MIPS64R2-generic, by Richard Sandiford.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3865 c046a42c-6fe2-441c-8c8c-71466251a162
e9c71dd1 12/25/2007 10:46 pm ths

Support for VR5432, and some of its special instructions. Original patch
by Dirk Behme.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3859 c046a42c-6fe2-441c-8c8c-71466251a162
29fe0e34 12/25/2007 07:32 pm ths

5K and 20K are Release 1 CPUs.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3858 c046a42c-6fe2-441c-8c8c-71466251a162
6d35524c 12/25/2007 05:13 am ths

Improved PABITS handling, and config register fixes.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3855 c046a42c-6fe2-441c-8c8c-71466251a162
a1daafd8 12/24/2007 04:33 pm ths

Fix CCRes value for 20Kc.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3849 c046a42c-6fe2-441c-8c8c-71466251a162
8d162c2b 11/19/2007 06:10 pm ths

Add older 4Km variants.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3708 c046a42c-6fe2-441c-8c8c-71466251a162
8c89395e 11/18/2007 05:19 am ths

Use a valid PRid.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3685 c046a42c-6fe2-441c-8c8c-71466251a162
3e4587d5 11/14/2007 05:11 am ths

Introduce 4KEm configuration with fixed MMU mapping. Delete bogus INSN_DSP
flags.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3637 c046a42c-6fe2-441c-8c8c-71466251a162
aaed909a 11/10/2007 05:15 pm bellard

added cpu_model parameter to cpu_init()

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
d26bc211 11/08/2007 08:05 pm ths

Clean out the N32 macros from target-mips, and introduce MIPS ABI specific
defines for linux-user.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3556 c046a42c-6fe2-441c-8c8c-71466251a162
d2123ead 10/29/2007 11:38 am ths

Preliminary MIPS64R2 mode.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3479 c046a42c-6fe2-441c-8c8c-71466251a162
7385ac0b 10/23/2007 08:04 pm ths

Use the standard ASE check for MIPS-3D and MT.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3427 c046a42c-6fe2-441c-8c8c-71466251a162
540635ba 09/30/2007 04:58 am ths

Code provision for n32/n64 mips userland emulation. Not functional yet.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
671880e6 09/29/2007 10:21 pm ths

Supervisor mode implementation, by Aurelien Jarno.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3267 c046a42c-6fe2-441c-8c8c-71466251a162
e189e748 09/24/2007 03:48 pm ths

Per-CPU instruction decoding implementation, by Aurelien Jarno.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3228 c046a42c-6fe2-441c-8c8c-71466251a162
2337fdc2 09/23/2007 08:54 pm ths

Fix mips usermode emulation.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3212 c046a42c-6fe2-441c-8c8c-71466251a162
ead9360e 09/06/2007 03:18 am ths

Partial support for 34K multithreading, not functional yet.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
3ddf0b5c 08/26/2007 08:37 pm ths

Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3146 c046a42c-6fe2-441c-8c8c-71466251a162
ae5d8053 07/30/2007 01:11 am ths

Fix MIPS cache configuration, by Aurelien Jarno.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3092 c046a42c-6fe2-441c-8c8c-71466251a162
e034e2c3 06/23/2007 09:04 pm ths

Handle MIPS64 SEGBITS value correctly.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
17044c06 06/23/2007 02:50 am ths

Allow emulation of 32bit targets in the MIPS64 capable qemu version.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3007 c046a42c-6fe2-441c-8c8c-71466251a162
bd04c6fe 06/12/2007 03:43 pm ths

Change 20Kc PRID to a later version.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2980 c046a42c-6fe2-441c-8c8c-71466251a162
70cf0b63 06/09/2007 03:29 pm ths

R5k has PX implemented.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2963 c046a42c-6fe2-441c-8c8c-71466251a162
1e3d0552 06/02/2007 12:57 am ths

Update some comments, 64bit FPU support is functional regardless of
funny non-standard fcr0 bits on earlier CPUs.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2919 c046a42c-6fe2-441c-8c8c-71466251a162
c9c1a064 06/01/2007 05:58 pm ths

Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno.
Note that the F64 flag isn't usable on any of those (and the R4000),
so all our 64bit FPU goodness goes out of the window until a shadow
capability flag is implemented. :-(

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2910 c046a42c-6fe2-441c-8c8c-71466251a162
a7037b29 06/01/2007 02:47 pm ths

Allow again FPU for usermode emulation.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2905 c046a42c-6fe2-441c-8c8c-71466251a162
51b2772f 05/30/2007 11:46 pm ths

Fix CPU (re-)selection on reset.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
29929e34 05/13/2007 04:49 pm ths

MIPS TLB style selection at runtime, by Herve Poussineau.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
4759513b 05/11/2007 03:02 am ths

Fix missing status ro mask initialization, thanks Stefan Weil.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2800 c046a42c-6fe2-441c-8c8c-71466251a162
5a5012ec 05/07/2007 04:55 pm ths

MIPS 64-bit FPU support, plus some collateral bugfixes in the
conditional branch handling.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
fcb4a419 04/17/2007 06:26 pm ths

Choose number of TLBs at runtime, by Herve Poussineau.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
2f644545 04/11/2007 11:34 pm ths

Make SYNCI_Step and CCRes CPU-specific.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2651 c046a42c-6fe2-441c-8c8c-71466251a162
60aa19ab 04/01/2007 03:36 pm ths

Actually enable 64bit configuration.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
34ee2ede 03/25/2007 01:36 am ths

One more bit of mips CPU configuration, and support for early 4KEc
which implemented only MIPS32R1. Thanks to Stefan Weil to insist he's
right on that. :-)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2533 c046a42c-6fe2-441c-8c8c-71466251a162
3953d786 03/21/2007 01:04 pm ths

Move mips CPU specific initialization to translate_init.c.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2522 c046a42c-6fe2-441c-8c8c-71466251a162
33d68b5f 03/18/2007 02:30 am ths

MIPS -cpu selection support, by Herve Poussineau.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162