Revision f930d07e hw/apb_pci.c
| b/hw/apb_pci.c | ||
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}; |
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static void apb_config_writel (void *opaque, target_phys_addr_t addr, |
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uint32_t val)
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uint32_t val)
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{
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//PCIBus *s = opaque; |
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|
| ... | ... | |
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case 0x18: // AFAR |
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case 0x20: // Diagnostic |
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case 0x28: // Target address space |
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// XXX
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// XXX
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default: |
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break;
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break;
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} |
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} |
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static uint32_t apb_config_readl (void *opaque, |
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target_phys_addr_t addr)
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target_phys_addr_t addr)
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{
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//PCIBus *s = opaque; |
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uint32_t val; |
| ... | ... | |
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case 0x18: // AFAR |
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case 0x20: // Diagnostic |
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case 0x28: // Target address space |
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// XXX
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// XXX
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default: |
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val = 0;
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break;
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val = 0;
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break;
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} |
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return val; |
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} |
| ... | ... | |
| 222 | 222 |
pci_mem_config = cpu_register_io_memory(0, pci_apb_config_read, |
| 223 | 223 |
pci_apb_config_write, s); |
| 224 | 224 |
apb_config = cpu_register_io_memory(0, apb_config_read, |
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apb_config_write, s);
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apb_config_write, s);
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pci_mem_data = cpu_register_io_memory(0, pci_apb_read, |
| 227 | 227 |
pci_apb_write, s); |
| 228 | 228 |
pci_ioport = cpu_register_io_memory(0, pci_apb_ioread, |
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