Revision f93eb9ff
| b/hw/arm-misc.h | ||
|---|---|---|
| 21 | 21 |
const char *kernel_filename, const char *cpu_model); |
| 22 | 22 |
|
| 23 | 23 |
/* arm_boot.c */ |
| 24 |
|
|
| 25 |
void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, |
|
| 26 |
const char *kernel_cmdline, const char *initrd_filename, |
|
| 27 |
int board_id, target_phys_addr_t loader_start); |
|
| 24 |
struct arm_boot_info {
|
|
| 25 |
int ram_size; |
|
| 26 |
const char *kernel_filename; |
|
| 27 |
const char *kernel_cmdline; |
|
| 28 |
const char *initrd_filename; |
|
| 29 |
target_phys_addr_t loader_start; |
|
| 30 |
int nb_cpus; |
|
| 31 |
int board_id; |
|
| 32 |
int (*atag_board)(struct arm_boot_info *info, void *p); |
|
| 33 |
}; |
|
| 34 |
void arm_load_kernel(CPUState *env, struct arm_boot_info *info); |
|
| 28 | 35 |
|
| 29 | 36 |
/* armv7m_nvic.c */ |
| 30 | 37 |
int system_clock_scale; |
| b/hw/arm_boot.c | ||
|---|---|---|
| 47 | 47 |
CPUState *env = opaque; |
| 48 | 48 |
|
| 49 | 49 |
cpu_reset(env); |
| 50 |
if (env->kernel_filename) |
|
| 51 |
arm_load_kernel(env, env->ram_size, env->kernel_filename, |
|
| 52 |
env->kernel_cmdline, env->initrd_filename, |
|
| 53 |
env->board_id, env->loader_start); |
|
| 50 |
if (env->boot_info) |
|
| 51 |
arm_load_kernel(env, env->boot_info); |
|
| 54 | 52 |
|
| 55 | 53 |
/* TODO: Reset secondary CPUs. */ |
| 56 | 54 |
} |
| 57 | 55 |
|
| 58 |
static void set_kernel_args(uint32_t ram_size, int initrd_size, |
|
| 59 |
const char *kernel_cmdline, |
|
| 60 |
target_phys_addr_t loader_start) |
|
| 56 |
static void set_kernel_args(struct arm_boot_info *info, |
|
| 57 |
int initrd_size, void *base) |
|
| 61 | 58 |
{
|
| 62 | 59 |
uint32_t *p; |
| 63 | 60 |
|
| 64 |
p = (uint32_t *)(phys_ram_base + KERNEL_ARGS_ADDR);
|
|
| 61 |
p = (uint32_t *)(base + KERNEL_ARGS_ADDR); |
|
| 65 | 62 |
/* ATAG_CORE */ |
| 66 | 63 |
stl_raw(p++, 5); |
| 67 | 64 |
stl_raw(p++, 0x54410001); |
| ... | ... | |
| 69 | 66 |
stl_raw(p++, 0x1000); |
| 70 | 67 |
stl_raw(p++, 0); |
| 71 | 68 |
/* ATAG_MEM */ |
| 69 |
/* TODO: handle multiple chips on one ATAG list */ |
|
| 72 | 70 |
stl_raw(p++, 4); |
| 73 | 71 |
stl_raw(p++, 0x54410002); |
| 74 |
stl_raw(p++, ram_size); |
|
| 75 |
stl_raw(p++, loader_start); |
|
| 72 |
stl_raw(p++, info->ram_size);
|
|
| 73 |
stl_raw(p++, info->loader_start);
|
|
| 76 | 74 |
if (initrd_size) {
|
| 77 | 75 |
/* ATAG_INITRD2 */ |
| 78 | 76 |
stl_raw(p++, 4); |
| 79 | 77 |
stl_raw(p++, 0x54420005); |
| 80 |
stl_raw(p++, loader_start + INITRD_LOAD_ADDR); |
|
| 78 |
stl_raw(p++, info->loader_start + INITRD_LOAD_ADDR);
|
|
| 81 | 79 |
stl_raw(p++, initrd_size); |
| 82 | 80 |
} |
| 83 |
if (kernel_cmdline && *kernel_cmdline) {
|
|
| 81 |
if (info->kernel_cmdline && *info->kernel_cmdline) {
|
|
| 84 | 82 |
/* ATAG_CMDLINE */ |
| 85 | 83 |
int cmdline_size; |
| 86 | 84 |
|
| 87 |
cmdline_size = strlen(kernel_cmdline); |
|
| 88 |
memcpy (p + 2, kernel_cmdline, cmdline_size + 1);
|
|
| 85 |
cmdline_size = strlen(info->kernel_cmdline);
|
|
| 86 |
memcpy(p + 2, info->kernel_cmdline, cmdline_size + 1);
|
|
| 89 | 87 |
cmdline_size = (cmdline_size >> 2) + 1; |
| 90 | 88 |
stl_raw(p++, cmdline_size + 2); |
| 91 | 89 |
stl_raw(p++, 0x54410009); |
| 92 | 90 |
p += cmdline_size; |
| 93 | 91 |
} |
| 92 |
if (info->atag_board) {
|
|
| 93 |
/* ATAG_BOARD */ |
|
| 94 |
int atag_board_len; |
|
| 95 |
|
|
| 96 |
atag_board_len = (info->atag_board(info, p + 2) + 3) >> 2; |
|
| 97 |
stl_raw(p++, 2 + atag_board_len); |
|
| 98 |
stl_raw(p++, 0x414f4d50); |
|
| 99 |
p += atag_board_len; |
|
| 100 |
} |
|
| 94 | 101 |
/* ATAG_END */ |
| 95 | 102 |
stl_raw(p++, 0); |
| 96 | 103 |
stl_raw(p++, 0); |
| 97 | 104 |
} |
| 98 | 105 |
|
| 99 |
static void set_kernel_args_old(uint32_t ram_size, int initrd_size, |
|
| 100 |
const char *kernel_cmdline, |
|
| 101 |
target_phys_addr_t loader_start) |
|
| 106 |
static void set_kernel_args_old(struct arm_boot_info *info, |
|
| 107 |
int initrd_size, void *base) |
|
| 102 | 108 |
{
|
| 103 | 109 |
uint32_t *p; |
| 104 | 110 |
unsigned char *s; |
| 105 | 111 |
|
| 106 | 112 |
/* see linux/include/asm-arm/setup.h */ |
| 107 |
p = (uint32_t *)(phys_ram_base + KERNEL_ARGS_ADDR);
|
|
| 113 |
p = (uint32_t *)(base + KERNEL_ARGS_ADDR); |
|
| 108 | 114 |
/* page_size */ |
| 109 | 115 |
stl_raw(p++, 4096); |
| 110 | 116 |
/* nr_pages */ |
| 111 |
stl_raw(p++, ram_size / 4096); |
|
| 117 |
stl_raw(p++, info->ram_size / 4096);
|
|
| 112 | 118 |
/* ramdisk_size */ |
| 113 | 119 |
stl_raw(p++, 0); |
| 114 | 120 |
#define FLAG_READONLY 1 |
| ... | ... | |
| 142 | 148 |
stl_raw(p++, 0); |
| 143 | 149 |
/* initrd_start */ |
| 144 | 150 |
if (initrd_size) |
| 145 |
stl_raw(p++, loader_start + INITRD_LOAD_ADDR); |
|
| 151 |
stl_raw(p++, info->loader_start + INITRD_LOAD_ADDR);
|
|
| 146 | 152 |
else |
| 147 | 153 |
stl_raw(p++, 0); |
| 148 | 154 |
/* initrd_size */ |
| ... | ... | |
| 159 | 165 |
stl_raw(p++, 0); |
| 160 | 166 |
/* zero unused fields */ |
| 161 | 167 |
memset(p, 0, 256 + 1024 - |
| 162 |
(p - ((uint32_t *)(phys_ram_base + KERNEL_ARGS_ADDR))));
|
|
| 163 |
s = phys_ram_base + KERNEL_ARGS_ADDR + 256 + 1024;
|
|
| 164 |
if (kernel_cmdline) |
|
| 165 |
strcpy (s, kernel_cmdline); |
|
| 168 |
(p - ((uint32_t *)(base + KERNEL_ARGS_ADDR)))); |
|
| 169 |
s = base + KERNEL_ARGS_ADDR + 256 + 1024; |
|
| 170 |
if (info->kernel_cmdline)
|
|
| 171 |
strcpy (s, info->kernel_cmdline);
|
|
| 166 | 172 |
else |
| 167 | 173 |
stb_raw(s, 0); |
| 168 | 174 |
} |
| 169 | 175 |
|
| 170 |
void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, |
|
| 171 |
const char *kernel_cmdline, const char *initrd_filename, |
|
| 172 |
int board_id, target_phys_addr_t loader_start) |
|
| 176 |
void arm_load_kernel(CPUState *env, struct arm_boot_info *info) |
|
| 173 | 177 |
{
|
| 174 | 178 |
int kernel_size; |
| 175 | 179 |
int initrd_size; |
| ... | ... | |
| 177 | 181 |
int is_linux = 0; |
| 178 | 182 |
uint64_t elf_entry; |
| 179 | 183 |
target_ulong entry; |
| 184 |
uint32_t pd; |
|
| 185 |
void *loader_phys; |
|
| 180 | 186 |
|
| 181 | 187 |
/* Load the kernel. */ |
| 182 |
if (!kernel_filename) {
|
|
| 188 |
if (!info->kernel_filename) {
|
|
| 183 | 189 |
fprintf(stderr, "Kernel image must be specified\n"); |
| 184 | 190 |
exit(1); |
| 185 | 191 |
} |
| 186 | 192 |
|
| 187 |
if (!env->kernel_filename) {
|
|
| 188 |
env->ram_size = ram_size; |
|
| 189 |
env->kernel_filename = kernel_filename; |
|
| 190 |
env->kernel_cmdline = kernel_cmdline; |
|
| 191 |
env->initrd_filename = initrd_filename; |
|
| 192 |
env->board_id = board_id; |
|
| 193 |
env->loader_start = loader_start; |
|
| 193 |
if (!env->boot_info) {
|
|
| 194 |
if (info->nb_cpus == 0) |
|
| 195 |
info->nb_cpus = 1; |
|
| 196 |
env->boot_info = info; |
|
| 194 | 197 |
qemu_register_reset(main_cpu_reset, env); |
| 195 | 198 |
} |
| 199 |
|
|
| 200 |
pd = cpu_get_physical_page_desc(info->loader_start); |
|
| 201 |
loader_phys = phys_ram_base + (pd & TARGET_PAGE_MASK) + |
|
| 202 |
(info->loader_start & ~TARGET_PAGE_MASK); |
|
| 203 |
|
|
| 196 | 204 |
/* Assume that raw images are linux kernels, and ELF images are not. */ |
| 197 |
kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL); |
|
| 205 |
kernel_size = load_elf(info->kernel_filename, 0, &elf_entry, NULL, NULL);
|
|
| 198 | 206 |
entry = elf_entry; |
| 199 | 207 |
if (kernel_size < 0) {
|
| 200 |
kernel_size = load_uboot(kernel_filename, &entry, &is_linux); |
|
| 208 |
kernel_size = load_uboot(info->kernel_filename, &entry, &is_linux);
|
|
| 201 | 209 |
} |
| 202 | 210 |
if (kernel_size < 0) {
|
| 203 |
kernel_size = load_image(kernel_filename, |
|
| 204 |
phys_ram_base + KERNEL_LOAD_ADDR);
|
|
| 205 |
entry = loader_start + KERNEL_LOAD_ADDR; |
|
| 211 |
kernel_size = load_image(info->kernel_filename,
|
|
| 212 |
loader_phys + KERNEL_LOAD_ADDR);
|
|
| 213 |
entry = info->loader_start + KERNEL_LOAD_ADDR;
|
|
| 206 | 214 |
is_linux = 1; |
| 207 | 215 |
} |
| 208 | 216 |
if (kernel_size < 0) {
|
| 209 |
fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename); |
|
| 217 |
fprintf(stderr, "qemu: could not load kernel '%s'\n", |
|
| 218 |
info->kernel_filename); |
|
| 210 | 219 |
exit(1); |
| 211 | 220 |
} |
| 212 | 221 |
if (!is_linux) {
|
| ... | ... | |
| 214 | 223 |
env->regs[15] = entry & 0xfffffffe; |
| 215 | 224 |
env->thumb = entry & 1; |
| 216 | 225 |
} else {
|
| 217 |
if (initrd_filename) {
|
|
| 218 |
initrd_size = load_image(initrd_filename, |
|
| 219 |
phys_ram_base + INITRD_LOAD_ADDR);
|
|
| 226 |
if (info->initrd_filename) {
|
|
| 227 |
initrd_size = load_image(info->initrd_filename,
|
|
| 228 |
loader_phys + INITRD_LOAD_ADDR);
|
|
| 220 | 229 |
if (initrd_size < 0) {
|
| 221 | 230 |
fprintf(stderr, "qemu: could not load initrd '%s'\n", |
| 222 |
initrd_filename); |
|
| 231 |
info->initrd_filename);
|
|
| 223 | 232 |
exit(1); |
| 224 | 233 |
} |
| 225 | 234 |
} else {
|
| 226 | 235 |
initrd_size = 0; |
| 227 | 236 |
} |
| 228 |
bootloader[1] |= board_id & 0xff; |
|
| 229 |
bootloader[2] |= (board_id >> 8) & 0xff; |
|
| 230 |
bootloader[5] = loader_start + KERNEL_ARGS_ADDR; |
|
| 237 |
bootloader[1] |= info->board_id & 0xff;
|
|
| 238 |
bootloader[2] |= (info->board_id >> 8) & 0xff;
|
|
| 239 |
bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR;
|
|
| 231 | 240 |
bootloader[6] = entry; |
| 232 | 241 |
for (n = 0; n < sizeof(bootloader) / 4; n++) |
| 233 |
stl_raw(phys_ram_base + (n * 4), bootloader[n]); |
|
| 234 |
for (n = 0; n < sizeof(smpboot) / 4; n++) |
|
| 235 |
stl_raw(phys_ram_base + ram_size + (n * 4), smpboot[n]); |
|
| 242 |
stl_raw(loader_phys + (n * 4), bootloader[n]); |
|
| 243 |
if (info->nb_cpus > 1) |
|
| 244 |
for (n = 0; n < sizeof(smpboot) / 4; n++) |
|
| 245 |
stl_raw(loader_phys + info->ram_size + (n * 4), smpboot[n]); |
|
| 236 | 246 |
if (old_param) |
| 237 |
set_kernel_args_old(ram_size, initrd_size, |
|
| 238 |
kernel_cmdline, loader_start); |
|
| 247 |
set_kernel_args_old(info, initrd_size, loader_phys); |
|
| 239 | 248 |
else |
| 240 |
set_kernel_args(ram_size, initrd_size, |
|
| 241 |
kernel_cmdline, loader_start); |
|
| 249 |
set_kernel_args(info, initrd_size, loader_phys); |
|
| 242 | 250 |
} |
| 243 | 251 |
} |
| b/hw/integratorcp.c | ||
|---|---|---|
| 469 | 469 |
|
| 470 | 470 |
/* Board init. */ |
| 471 | 471 |
|
| 472 |
static struct arm_boot_info integrator_binfo = {
|
|
| 473 |
.loader_start = 0x0, |
|
| 474 |
.board_id = 0x113, |
|
| 475 |
}; |
|
| 476 |
|
|
| 472 | 477 |
static void integratorcp_init(int ram_size, int vga_ram_size, |
| 473 | 478 |
const char *boot_device, DisplayState *ds, |
| 474 | 479 |
const char *kernel_filename, const char *kernel_cmdline, |
| ... | ... | |
| 527 | 532 |
} |
| 528 | 533 |
pl110_init(ds, 0xc0000000, pic[22], 0); |
| 529 | 534 |
|
| 530 |
arm_load_kernel(env, ram_size, kernel_filename, kernel_cmdline, |
|
| 531 |
initrd_filename, 0x113, 0x0); |
|
| 535 |
integrator_binfo.ram_size = ram_size; |
|
| 536 |
integrator_binfo.kernel_filename = kernel_filename; |
|
| 537 |
integrator_binfo.kernel_cmdline = kernel_cmdline; |
|
| 538 |
integrator_binfo.initrd_filename = initrd_filename; |
|
| 539 |
arm_load_kernel(env, &integrator_binfo); |
|
| 532 | 540 |
} |
| 533 | 541 |
|
| 534 | 542 |
QEMUMachine integratorcp_machine = {
|
| b/hw/mainstone.c | ||
|---|---|---|
| 59 | 59 |
|
| 60 | 60 |
enum mainstone_model_e { mainstone };
|
| 61 | 61 |
|
| 62 |
static struct arm_boot_info mainstone_binfo = {
|
|
| 63 |
.loader_start = PXA2XX_SDRAM_BASE, |
|
| 64 |
.ram_size = 0x04000000, |
|
| 65 |
}; |
|
| 66 |
|
|
| 62 | 67 |
static void mainstone_common_init(int ram_size, int vga_ram_size, |
| 63 | 68 |
DisplayState *ds, const char *kernel_filename, |
| 64 | 69 |
const char *kernel_cmdline, const char *initrd_filename, |
| 65 | 70 |
const char *cpu_model, enum mainstone_model_e model, int arm_id) |
| 66 | 71 |
{
|
| 67 |
uint32_t mainstone_ram = 0x04000000;
|
|
| 72 |
uint32_t mainstone_ram = mainstone_binfo.ram_size;
|
|
| 68 | 73 |
uint32_t mainstone_rom = 0x00800000; |
| 69 | 74 |
uint32_t mainstone_flash = 0x02000000; |
| 70 | 75 |
uint32_t sector_len = 256 * 1024; |
| ... | ... | |
| 90 | 95 |
qemu_ram_alloc(mainstone_rom) | IO_MEM_ROM); |
| 91 | 96 |
|
| 92 | 97 |
/* Setup initial (reset) machine state */ |
| 93 |
cpu->env->regs[15] = PXA2XX_SDRAM_BASE;
|
|
| 98 |
cpu->env->regs[15] = mainstone_binfo.loader_start;
|
|
| 94 | 99 |
|
| 95 | 100 |
/* There are two 32MiB flash devices on the board */ |
| 96 | 101 |
for (i = 0; i < 2; i ++) {
|
| ... | ... | |
| 121 | 126 |
|
| 122 | 127 |
smc91c111_init(&nd_table[0], MST_ETH_PHYS, mst_irq[ETHERNET_IRQ]); |
| 123 | 128 |
|
| 124 |
arm_load_kernel(cpu->env, mainstone_ram, kernel_filename, kernel_cmdline, |
|
| 125 |
initrd_filename, arm_id, PXA2XX_SDRAM_BASE); |
|
| 129 |
mainstone_binfo.kernel_filename = kernel_filename; |
|
| 130 |
mainstone_binfo.kernel_cmdline = kernel_cmdline; |
|
| 131 |
mainstone_binfo.initrd_filename = initrd_filename; |
|
| 132 |
mainstone_binfo.board_id = arm_id; |
|
| 133 |
arm_load_kernel(cpu->env, &mainstone_binfo); |
|
| 126 | 134 |
} |
| 127 | 135 |
|
| 128 | 136 |
static void mainstone_init(int ram_size, int vga_ram_size, |
| b/hw/palm.c | ||
|---|---|---|
| 183 | 183 |
qemu_irq_raise(omap_mpuio_in_get(cpu->mpuio)[11]); |
| 184 | 184 |
} |
| 185 | 185 |
|
| 186 |
static struct arm_boot_info palmte_binfo = {
|
|
| 187 |
.loader_start = OMAP_EMIFF_BASE, |
|
| 188 |
.ram_size = 0x02000000, |
|
| 189 |
.board_id = 0x331, |
|
| 190 |
}; |
|
| 191 |
|
|
| 186 | 192 |
static void palmte_init(int ram_size, int vga_ram_size, |
| 187 | 193 |
const char *boot_device, DisplayState *ds, |
| 188 | 194 |
const char *kernel_filename, const char *kernel_cmdline, |
| ... | ... | |
| 190 | 196 |
{
|
| 191 | 197 |
struct omap_mpu_state_s *cpu; |
| 192 | 198 |
int flash_size = 0x00800000; |
| 193 |
int sdram_size = 0x02000000;
|
|
| 199 |
int sdram_size = palmte_binfo.ram_size;
|
|
| 194 | 200 |
int io; |
| 195 | 201 |
static uint32_t cs0val = 0xffffffff; |
| 196 | 202 |
static uint32_t cs1val = 0x0000e1a0; |
| ... | ... | |
| 250 | 256 |
/* Load the kernel. */ |
| 251 | 257 |
if (kernel_filename) {
|
| 252 | 258 |
/* Start at bootloader. */ |
| 253 |
cpu->env->regs[15] = OMAP_EMIFF_BASE;
|
|
| 259 |
cpu->env->regs[15] = palmte_binfo.loader_start;
|
|
| 254 | 260 |
|
| 255 |
arm_load_kernel(cpu->env, sdram_size, kernel_filename, kernel_cmdline, |
|
| 256 |
initrd_filename, 0x331, OMAP_EMIFF_BASE); |
|
| 261 |
palmte_binfo.kernel_filename = kernel_filename; |
|
| 262 |
palmte_binfo.kernel_cmdline = kernel_cmdline; |
|
| 263 |
palmte_binfo.initrd_filename = initrd_filename; |
|
| 264 |
arm_load_kernel(cpu->env, &palmte_binfo); |
|
| 257 | 265 |
} |
| 258 | 266 |
|
| 259 | 267 |
dpy_resize(ds, 320, 320); |
| b/hw/realview.c | ||
|---|---|---|
| 18 | 18 |
|
| 19 | 19 |
/* Board init. */ |
| 20 | 20 |
|
| 21 |
static struct arm_boot_info realview_binfo = {
|
|
| 22 |
.loader_start = 0x0, |
|
| 23 |
.board_id = 0x33b, |
|
| 24 |
}; |
|
| 25 |
|
|
| 21 | 26 |
static void realview_init(int ram_size, int vga_ram_size, |
| 22 | 27 |
const char *boot_device, DisplayState *ds, |
| 23 | 28 |
const char *kernel_filename, const char *kernel_cmdline, |
| ... | ... | |
| 177 | 182 |
/* 0x68000000 PCI mem 1. */ |
| 178 | 183 |
/* 0x6c000000 PCI mem 2. */ |
| 179 | 184 |
|
| 180 |
arm_load_kernel(first_cpu, ram_size, kernel_filename, kernel_cmdline, |
|
| 181 |
initrd_filename, 0x33b, 0x0); |
|
| 185 |
realview_binfo.ram_size = ram_size; |
|
| 186 |
realview_binfo.kernel_filename = kernel_filename; |
|
| 187 |
realview_binfo.kernel_cmdline = kernel_cmdline; |
|
| 188 |
realview_binfo.initrd_filename = initrd_filename; |
|
| 189 |
realview_binfo.nb_cpus = ncpu; |
|
| 190 |
arm_load_kernel(first_cpu, &realview_binfo); |
|
| 182 | 191 |
|
| 183 | 192 |
/* ??? Hack to map an additional page of ram for the secondary CPU |
| 184 | 193 |
startup code. I guess this works on real hardware because the |
| b/hw/spitz.c | ||
|---|---|---|
| 1180 | 1180 |
/* Board init. */ |
| 1181 | 1181 |
enum spitz_model_e { spitz, akita, borzoi, terrier };
|
| 1182 | 1182 |
|
| 1183 |
static struct arm_boot_info spitz_binfo = {
|
|
| 1184 |
.loader_start = PXA2XX_SDRAM_BASE, |
|
| 1185 |
.ram_size = 0x04000000, |
|
| 1186 |
}; |
|
| 1187 |
|
|
| 1183 | 1188 |
static void spitz_common_init(int ram_size, int vga_ram_size, |
| 1184 | 1189 |
DisplayState *ds, const char *kernel_filename, |
| 1185 | 1190 |
const char *kernel_cmdline, const char *initrd_filename, |
| 1186 | 1191 |
const char *cpu_model, enum spitz_model_e model, int arm_id) |
| 1187 | 1192 |
{
|
| 1188 |
uint32_t spitz_ram = 0x04000000;
|
|
| 1193 |
uint32_t spitz_ram = spitz_binfo.ram_size;
|
|
| 1189 | 1194 |
uint32_t spitz_rom = 0x00800000; |
| 1190 | 1195 |
struct pxa2xx_state_s *cpu; |
| 1191 | 1196 |
struct scoop_info_s *scp; |
| ... | ... | |
| 1230 | 1235 |
spitz_microdrive_attach(cpu); |
| 1231 | 1236 |
|
| 1232 | 1237 |
/* Setup initial (reset) machine state */ |
| 1233 |
cpu->env->regs[15] = PXA2XX_SDRAM_BASE;
|
|
| 1238 |
cpu->env->regs[15] = spitz_binfo.loader_start;
|
|
| 1234 | 1239 |
|
| 1235 |
arm_load_kernel(cpu->env, spitz_ram, kernel_filename, kernel_cmdline, |
|
| 1236 |
initrd_filename, arm_id, PXA2XX_SDRAM_BASE); |
|
| 1240 |
spitz_binfo.kernel_filename = kernel_filename; |
|
| 1241 |
spitz_binfo.kernel_cmdline = kernel_cmdline; |
|
| 1242 |
spitz_binfo.initrd_filename = initrd_filename; |
|
| 1243 |
spitz_binfo.board_id = arm_id; |
|
| 1244 |
arm_load_kernel(cpu->env, &spitz_binfo); |
|
| 1237 | 1245 |
sl_bootparam_write(SL_PXA_PARAM_BASE - PXA2XX_SDRAM_BASE); |
| 1238 | 1246 |
} |
| 1239 | 1247 |
|
| b/hw/versatilepb.c | ||
|---|---|---|
| 157 | 157 |
peripherans and expansion busses. For now we emulate a subset of the |
| 158 | 158 |
PB peripherals and just change the board ID. */ |
| 159 | 159 |
|
| 160 |
static struct arm_boot_info versatile_binfo; |
|
| 161 |
|
|
| 160 | 162 |
static void versatile_init(int ram_size, int vga_ram_size, |
| 161 | 163 |
const char *boot_device, DisplayState *ds, |
| 162 | 164 |
const char *kernel_filename, const char *kernel_cmdline, |
| ... | ... | |
| 283 | 285 |
/* 0x101f3000 UART2. */ |
| 284 | 286 |
/* 0x101f4000 SSPI. */ |
| 285 | 287 |
|
| 286 |
arm_load_kernel(env, ram_size, kernel_filename, kernel_cmdline, |
|
| 287 |
initrd_filename, board_id, 0x0); |
|
| 288 |
versatile_binfo.ram_size = ram_size; |
|
| 289 |
versatile_binfo.kernel_filename = kernel_filename; |
|
| 290 |
versatile_binfo.kernel_cmdline = kernel_cmdline; |
|
| 291 |
versatile_binfo.initrd_filename = initrd_filename; |
|
| 292 |
versatile_binfo.board_id = board_id; |
|
| 293 |
arm_load_kernel(env, &versatile_binfo); |
|
| 288 | 294 |
} |
| 289 | 295 |
|
| 290 | 296 |
static void vpb_init(int ram_size, int vga_ram_size, |
| b/target-arm/cpu.h | ||
|---|---|---|
| 55 | 55 |
typedef uint32_t ARMReadCPFunc(void *opaque, int cp_info, |
| 56 | 56 |
int dstreg, int operand); |
| 57 | 57 |
|
| 58 |
struct arm_boot_info; |
|
| 59 |
|
|
| 58 | 60 |
#define NB_MMU_MODES 2 |
| 59 | 61 |
|
| 60 | 62 |
/* We currently assume float and double are IEEE single and double |
| ... | ... | |
| 196 | 198 |
CPU_COMMON |
| 197 | 199 |
|
| 198 | 200 |
/* These fields after the common ones so they are preserved on reset. */ |
| 199 |
int ram_size; |
|
| 200 |
const char *kernel_filename; |
|
| 201 |
const char *kernel_cmdline; |
|
| 202 |
const char *initrd_filename; |
|
| 203 |
int board_id; |
|
| 204 |
target_phys_addr_t loader_start; |
|
| 201 |
struct arm_boot_info *boot_info; |
|
| 205 | 202 |
} CPUARMState; |
| 206 | 203 |
|
| 207 | 204 |
CPUARMState *cpu_arm_init(const char *cpu_model); |
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