Revision fb0eaffc target-ppc/op.c
| b/target-ppc/op.c | ||
|---|---|---|
| 27 | 27 |
#define Ts2 (int32_t)T2 |
| 28 | 28 |
|
| 29 | 29 |
#define FT0 (env->ft0) |
| 30 |
#define FT1 (env->ft1) |
|
| 31 |
#define FT2 (env->ft2) |
|
| 32 |
|
|
| 33 |
#define FTS0 ((float)env->ft0) |
|
| 34 |
#define FTS1 ((float)env->ft1) |
|
| 35 |
#define FTS2 ((float)env->ft2) |
|
| 30 | 36 |
|
| 31 | 37 |
#define PPC_OP(name) void op_##name(void) |
| 32 | 38 |
|
| ... | ... | |
| 173 | 179 |
RETURN(); |
| 174 | 180 |
} |
| 175 | 181 |
|
| 182 |
/* Set Rc1 (for floating point arithmetic) */ |
|
| 183 |
PPC_OP(set_Rc1) |
|
| 184 |
{
|
|
| 185 |
env->crf[1] = regs->fpscr[7]; |
|
| 186 |
RETURN(); |
|
| 187 |
} |
|
| 188 |
|
|
| 176 | 189 |
PPC_OP(set_T0) |
| 177 | 190 |
{
|
| 178 | 191 |
T0 = PARAM(1); |
| ... | ... | |
| 278 | 291 |
RETURN(); |
| 279 | 292 |
} |
| 280 | 293 |
|
| 294 |
/* FPSCR */ |
|
| 295 |
PPC_OP(load_fpscr) |
|
| 296 |
{
|
|
| 297 |
do_load_fpscr(); |
|
| 298 |
RETURN(); |
|
| 299 |
} |
|
| 300 |
|
|
| 301 |
PPC_OP(store_fpscr) |
|
| 302 |
{
|
|
| 303 |
do_store_fpscr(PARAM(1)); |
|
| 304 |
RETURN(); |
|
| 305 |
} |
|
| 306 |
|
|
| 307 |
PPC_OP(reset_scrfx) |
|
| 308 |
{
|
|
| 309 |
regs->fpscr[7] &= ~0x8; |
|
| 310 |
RETURN(); |
|
| 311 |
} |
|
| 312 |
|
|
| 281 | 313 |
/* Set reservation */ |
| 282 | 314 |
PPC_OP(set_reservation) |
| 283 | 315 |
{
|
| ... | ... | |
| 988 | 1020 |
/* rotate left word immediate then mask insert */ |
| 989 | 1021 |
PPC_OP(rlwimi) |
| 990 | 1022 |
{
|
| 991 |
T0 = rotl(T0, PARAM(1) & PARAM(2)) | (T0 & PARAM(3));
|
|
| 1023 |
T0 = (rotl(T0, PARAM(1)) & PARAM(2)) | (T1 & PARAM(3));
|
|
| 992 | 1024 |
RETURN(); |
| 993 | 1025 |
} |
| 994 | 1026 |
|
| ... | ... | |
| 1216 | 1248 |
regs->spr[PARAM(1)] = T0; |
| 1217 | 1249 |
} |
| 1218 | 1250 |
|
| 1219 |
/* FPSCR */ |
|
| 1220 |
PPC_OP(load_fpscr) |
|
| 1221 |
{
|
|
| 1222 |
T0 = do_load_fpscr(); |
|
| 1223 |
} |
|
| 1224 |
|
|
| 1225 |
PPC_OP(store_fpscr) |
|
| 1226 |
{
|
|
| 1227 |
do_store_fpscr(PARAM(1), T0); |
|
| 1228 |
} |
|
| 1229 |
|
|
| 1230 | 1251 |
/*** Floating-point store ***/ |
| 1231 | 1252 |
|
| 1232 |
static inline uint32_t dtos(uint64_t f) |
|
| 1233 |
{
|
|
| 1234 |
unsigned int e, m, s; |
|
| 1235 |
e = (((f >> 52) & 0x7ff) - 1022) + 126; |
|
| 1236 |
s = (f >> 63); |
|
| 1237 |
m = (f >> 29); |
|
| 1238 |
return (s << 31) | (e << 23) | m; |
|
| 1239 |
} |
|
| 1240 |
|
|
| 1241 |
static inline uint64_t stod(uint32_t f) |
|
| 1242 |
{
|
|
| 1243 |
unsigned int e, m, s; |
|
| 1244 |
e = ((f >> 23) & 0xff) - 126 + 1022; |
|
| 1245 |
s = f >> 31; |
|
| 1246 |
m = f & ((1 << 23) - 1); |
|
| 1247 |
return ((uint64_t)s << 63) | ((uint64_t)e << 52) | ((uint64_t)m << 29); |
|
| 1248 |
} |
|
| 1249 |
|
|
| 1250 | 1253 |
PPC_OP(stfd_z_FT0) |
| 1251 | 1254 |
{
|
| 1252 |
st64(SPARAM(1), FT0);
|
|
| 1255 |
stfq((void *)SPARAM(1), FT0);
|
|
| 1253 | 1256 |
} |
| 1254 | 1257 |
|
| 1255 | 1258 |
PPC_OP(stfd_FT0) |
| 1256 | 1259 |
{
|
| 1257 | 1260 |
T0 += SPARAM(1); |
| 1258 |
st64(T0, FT0);
|
|
| 1261 |
stfq((void *)T0, FT0);
|
|
| 1259 | 1262 |
} |
| 1260 | 1263 |
|
| 1261 | 1264 |
PPC_OP(stfdx_z_FT0) |
| 1262 | 1265 |
{
|
| 1263 |
st64(T0, FT0);
|
|
| 1266 |
stfq((void *)T0, FT0);
|
|
| 1264 | 1267 |
} |
| 1265 | 1268 |
|
| 1266 | 1269 |
PPC_OP(stfdx_FT0) |
| 1267 | 1270 |
{
|
| 1268 | 1271 |
T0 += T1; |
| 1269 |
st64(T0, FT0);
|
|
| 1272 |
stfq((void *)T0, FT0);
|
|
| 1270 | 1273 |
} |
| 1271 | 1274 |
|
| 1272 |
|
|
| 1273 | 1275 |
PPC_OP(stfs_z_FT0) |
| 1274 | 1276 |
{
|
| 1275 |
st32(SPARAM(1), dtos(FT0)); |
|
| 1277 |
float tmp = FT0; |
|
| 1278 |
stfl((void *)SPARAM(1), tmp); |
|
| 1276 | 1279 |
} |
| 1277 | 1280 |
|
| 1278 | 1281 |
PPC_OP(stfs_FT0) |
| 1279 | 1282 |
{
|
| 1283 |
float tmp = FT0; |
|
| 1280 | 1284 |
T0 += SPARAM(1); |
| 1281 |
st32(T0, dtos(FT0));
|
|
| 1285 |
stfl((void *)T0, tmp);
|
|
| 1282 | 1286 |
} |
| 1283 | 1287 |
|
| 1284 | 1288 |
PPC_OP(stfsx_z_FT0) |
| 1285 | 1289 |
{
|
| 1286 |
st32(T0, dtos(FT0)); |
|
| 1290 |
float tmp = FT0; |
|
| 1291 |
stfl((void *)T0, tmp); |
|
| 1287 | 1292 |
} |
| 1288 | 1293 |
|
| 1289 | 1294 |
PPC_OP(stfsx_FT0) |
| 1290 | 1295 |
{
|
| 1296 |
float tmp = FT0; |
|
| 1291 | 1297 |
T0 += T1; |
| 1292 |
st32(T0, dtos(FT0));
|
|
| 1298 |
stfl((void *)T0, tmp);
|
|
| 1293 | 1299 |
} |
| 1294 | 1300 |
|
| 1295 | 1301 |
/*** Floating-point load ***/ |
| 1296 | 1302 |
PPC_OP(lfd_z_FT0) |
| 1297 | 1303 |
{
|
| 1298 |
FT0 = ld64(SPARAM(1));
|
|
| 1304 |
FT0 = ldfq((void *)SPARAM(1));
|
|
| 1299 | 1305 |
} |
| 1300 | 1306 |
|
| 1301 | 1307 |
PPC_OP(lfd_FT0) |
| 1302 | 1308 |
{
|
| 1303 | 1309 |
T0 += SPARAM(1); |
| 1304 |
FT0 = ld64(T0);
|
|
| 1310 |
FT0 = ldfq((void *)T0);
|
|
| 1305 | 1311 |
} |
| 1306 | 1312 |
|
| 1307 | 1313 |
PPC_OP(lfdx_z_FT0) |
| 1308 | 1314 |
{
|
| 1309 |
FT0 = ld64(T0);
|
|
| 1315 |
FT0 = ldfq((void *)T0);
|
|
| 1310 | 1316 |
} |
| 1311 | 1317 |
|
| 1312 | 1318 |
PPC_OP(lfdx_FT0) |
| 1313 | 1319 |
{
|
| 1314 | 1320 |
T0 += T1; |
| 1315 |
FT0 = ld64(T0);
|
|
| 1321 |
FT0 = ldfq((void *)T0);
|
|
| 1316 | 1322 |
} |
| 1317 | 1323 |
|
| 1318 | 1324 |
PPC_OP(lfs_z_FT0) |
| 1319 | 1325 |
{
|
| 1320 |
FT0 = stod(ld32(SPARAM(1))); |
|
| 1326 |
float tmp = ldfl((void *)SPARAM(1)); |
|
| 1327 |
FT0 = tmp; |
|
| 1321 | 1328 |
} |
| 1322 | 1329 |
|
| 1323 | 1330 |
PPC_OP(lfs_FT0) |
| 1324 | 1331 |
{
|
| 1332 |
float tmp; |
|
| 1325 | 1333 |
T0 += SPARAM(1); |
| 1326 |
FT0 = stod(ld32(T0)); |
|
| 1334 |
tmp = ldfl((void *)T0); |
|
| 1335 |
FT0 = tmp; |
|
| 1327 | 1336 |
} |
| 1328 | 1337 |
|
| 1329 | 1338 |
PPC_OP(lfsx_z_FT0) |
| 1330 | 1339 |
{
|
| 1331 |
FT0 = stod(ld32(T0)); |
|
| 1340 |
float tmp; |
|
| 1341 |
tmp = ldfl((void *)T0); |
|
| 1342 |
FT0 = tmp; |
|
| 1332 | 1343 |
} |
| 1333 | 1344 |
|
| 1334 | 1345 |
PPC_OP(lfsx_FT0) |
| 1335 | 1346 |
{
|
| 1347 |
float tmp; |
|
| 1348 |
T0 += T1; |
|
| 1349 |
tmp = ldfl((void *)T0); |
|
| 1350 |
FT0 = tmp; |
|
| 1351 |
} |
|
| 1352 |
|
|
| 1353 |
PPC_OP(lwarx_z) |
|
| 1354 |
{
|
|
| 1355 |
T1 = ld32(T0); |
|
| 1356 |
regs->reserve = T0; |
|
| 1357 |
RETURN(); |
|
| 1358 |
} |
|
| 1359 |
|
|
| 1360 |
PPC_OP(lwarx) |
|
| 1361 |
{
|
|
| 1362 |
T0 += T1; |
|
| 1363 |
T1 = ld32(T0); |
|
| 1364 |
regs->reserve = T0; |
|
| 1365 |
RETURN(); |
|
| 1366 |
} |
|
| 1367 |
|
|
| 1368 |
PPC_OP(stwcx_z) |
|
| 1369 |
{
|
|
| 1370 |
if (regs->reserve != T0) {
|
|
| 1371 |
env->crf[0] = xer_ov; |
|
| 1372 |
} else {
|
|
| 1373 |
st32(T0, T1); |
|
| 1374 |
env->crf[0] = xer_ov | 0x02; |
|
| 1375 |
} |
|
| 1376 |
regs->reserve = 0; |
|
| 1377 |
RETURN(); |
|
| 1378 |
} |
|
| 1379 |
|
|
| 1380 |
PPC_OP(stwcx) |
|
| 1381 |
{
|
|
| 1336 | 1382 |
T0 += T1; |
| 1337 |
FT0 = stod(ld32(T0)); |
|
| 1383 |
if (regs->reserve != (T0 & ~0x03)) {
|
|
| 1384 |
env->crf[0] = xer_ov; |
|
| 1385 |
} else {
|
|
| 1386 |
st32(T0, T2); |
|
| 1387 |
env->crf[0] = xer_ov | 0x02; |
|
| 1388 |
} |
|
| 1389 |
regs->reserve = 0; |
|
| 1390 |
RETURN(); |
|
| 1391 |
} |
|
| 1392 |
|
|
| 1393 |
PPC_OP(dcbz_z) |
|
| 1394 |
{
|
|
| 1395 |
do_dcbz(); |
|
| 1396 |
RETURN(); |
|
| 1397 |
} |
|
| 1398 |
|
|
| 1399 |
PPC_OP(dcbz) |
|
| 1400 |
{
|
|
| 1401 |
T0 += T1; |
|
| 1402 |
do_dcbz(); |
|
| 1403 |
RETURN(); |
|
| 1404 |
} |
|
| 1405 |
|
|
| 1406 |
/* Instruction cache block invalidate */ |
|
| 1407 |
PPC_OP(icbi_z) |
|
| 1408 |
{
|
|
| 1409 |
do_icbi(); |
|
| 1410 |
RETURN(); |
|
| 1411 |
} |
|
| 1412 |
|
|
| 1413 |
PPC_OP(icbi) |
|
| 1414 |
{
|
|
| 1415 |
T0 += T1; |
|
| 1416 |
do_icbi(); |
|
| 1417 |
RETURN(); |
|
| 1338 | 1418 |
} |
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