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root / target-arm @ fbb4a2e3

Name Size
cpu.h 13.1 kB
exec.h 1.8 kB
helper.c 67.7 kB
helpers.h 25.9 kB
iwmmxt_helper.c 24.7 kB
machine.c 6.8 kB
neon_helper.c 34.2 kB
op_addsub.h 1.8 kB
op_helper.c 12.4 kB
translate.c 294.7 kB

Latest revisions

# Date Author Comment
fbb4a2e3 05/29/2008 03:20 am pbrook

Implement ARM magic kernel page and TLS register.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4610 c046a42c-6fe2-441c-8c8c-71466251a162
ce5232c5 05/28/2008 08:14 pm bellard

moved halted field to CPU_COMMON

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
9b7b85d2 05/25/2008 03:36 am pbrook

Fix off-by-one unwinding error.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
cb63669a 05/24/2008 05:22 am pbrook

Fix ARM conditional branch bug.
Add tcg_gen_brcondi.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
c30bb264 05/18/2008 04:01 pm balrog

Add N810 to allowed -M values, add documentation part for N8x0.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4490 c046a42c-6fe2-441c-8c8c-71466251a162
4aa9aca4 05/17/2008 09:15 pm balrog

Remove arm's local not_i32 tcg op now that there's one in tcg.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4475 c046a42c-6fe2-441c-8c8c-71466251a162
390efc54 05/11/2008 05:35 pm pbrook

Add TCG native negation op.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4426 c046a42c-6fe2-441c-8c8c-71466251a162
86831435 05/11/2008 03:22 pm pbrook

Add zero extension (pseudo-)ops.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4424 c046a42c-6fe2-441c-8c8c-71466251a162
8dd3dca3 05/04/2008 04:11 pm aurel32

remove target ifdefs from vl.c

(Glauber Costa)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162
460a09c1 05/01/2008 03:04 pm pbrook

Fix incorrect argument types.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4291 c046a42c-6fe2-441c-8c8c-71466251a162

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