Statistics
| Branch: | Revision:

root / target-ppc @ fc1c67bc

Name Size
STATUS 10.6 kB
cpu.h 59.4 kB
exec.h 1.6 kB
helper.c 93.8 kB
helper.h 14.3 kB
helper_regs.h 3.4 kB
kvm.c 4.8 kB
kvm_ppc.c 2.6 kB
kvm_ppc.h 434 Bytes
machine.c 5.9 kB
mfrom_table.c 3.3 kB
mfrom_table_gen.c 652 Bytes
op_helper.c 123.8 kB
translate.c 308.3 kB
translate_init.c 413.5 kB

Latest revisions

# Date Author Comment
fc1c67bc 04/28/2009 09:00 pm Blue Swirl

Fix PPC reset

0bf46a40 04/24/2009 09:03 pm aliguori

qemu: introduce qemu_init_vcpu (Marcelo Tosatti)

Signed-off-by: Marcelo Tosatti <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162

6a4955a8 04/24/2009 09:03 pm aliguori

qemu: per-arch cpu_has_work (Marcelo Tosatti)

Blue Swirl: fix Sparc32 breakage

Signed-off-by: Marcelo Tosatti <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162

69a218fc 04/16/2009 03:57 pm aurel32

target-ppc: mark a few helpers TCG_CALL_CONST and/or TCG_CALL_PURE

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7129 c046a42c-6fe2-441c-8c8c-71466251a162

2dc766da 04/13/2009 07:06 pm blueswir1

Fix ppc-softmmu warnings on OpenBSD host

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7099 c046a42c-6fe2-441c-8c8c-71466251a162

1b530a6d 04/05/2009 11:08 pm aurel32

Add new command line option -singlestep for tcg single stepping.

This replaces a compile time option for some targets and adds
this feature to targets which did not have a compile time option.

Add monitor command to enable or disable single step mode.

Modify monitor command "info status" to display single step mode....

bf1752ef 03/29/2009 04:36 pm aurel32

target-ppc: Explain why the whole TLB is flushed on SR write

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6947 c046a42c-6fe2-441c-8c8c-71466251a162

af4b6c54 03/29/2009 04:18 am aurel32

target-ppc: avoid nop to override next instruction

While searching PC, always store the pc of a new instruction.
Instructions that didn't generate tcg code (such as nop) prevented the
next one to be referenced.

Based on patch for target-alpha, r6930.

Signed-off-by: Aurelien Jarno <>...

7f70c937 03/13/2009 11:16 pm blueswir1

Make the ELF loader aware of backwards compatibility

Most 64 bit architectures I'm aware of support running 32 bit code
of the same architecture as well.

So x86_64 can run i386 code easily and ppc64 can run ppc code.

Unfortunately, the current checks are pretty strict. So you can only...

fa3966a3 03/13/2009 11:35 am aurel32

target-ppc: use the new bswap* TCG ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6835 c046a42c-6fe2-441c-8c8c-71466251a162

View revisions

Also available in: Atom