Revision fc87e185 target-ppc/kvm.c

b/target-ppc/kvm.c
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    do { } while (0)
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#endif
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static int cap_interrupt_unset = false;
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static int cap_interrupt_level = false;
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/* XXX We have a race condition where we actually have a level triggered
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 *     interrupt, but the infrastructure can't expose that yet, so the guest
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 *     takes but ignores it, goes to sleep and never gets notified that there's
......
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int kvm_arch_init(KVMState *s, int smp_cpus)
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{
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#ifdef KVM_CAP_PPC_UNSET_IRQ
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    cap_interrupt_unset = kvm_check_extension(s, KVM_CAP_PPC_UNSET_IRQ);
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#endif
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#ifdef KVM_CAP_PPC_IRQ_LEVEL
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    cap_interrupt_level = kvm_check_extension(s, KVM_CAP_PPC_IRQ_LEVEL);
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#endif
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    if (!cap_interrupt_level) {
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        fprintf(stderr, "KVM: Couldn't find level irq capability. Expect the "
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                        "VM to stall at times!\n");
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    }
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    return 0;
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}
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......
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    return 0;
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}
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int kvmppc_set_interrupt(CPUState *env, int irq, int level)
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{
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    unsigned virq = level ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
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    if (irq != PPC_INTERRUPT_EXT) {
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        return 0;
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    }
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    if (!kvm_enabled() || !cap_interrupt_unset || !cap_interrupt_level) {
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        return 0;
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    }
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    kvm_vcpu_ioctl(env, KVM_INTERRUPT, &virq);
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    return 0;
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}
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#if defined(TARGET_PPCEMB)
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#define PPC_INPUT_INT PPC40x_INPUT_INT
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#elif defined(TARGET_PPC64)
......
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    /* PowerPC Qemu tracks the various core input pins (interrupt, critical
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     * interrupt, reset, etc) in PPC-specific env->irq_input_state. */
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    if (run->ready_for_interrupt_injection &&
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    if (!cap_interrupt_level &&
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        run->ready_for_interrupt_injection &&
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        (env->interrupt_request & CPU_INTERRUPT_HARD) &&
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        (env->irq_input_state & (1<<PPC_INPUT_INT)))
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    {
......
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         * future KVM could cache it in-kernel to avoid a heavyweight exit
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         * when reading the UIC.
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         */
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        irq = -1U;
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        irq = KVM_INTERRUPT_SET;
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        dprintf("injected interrupt %d\n", irq);
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        r = kvm_vcpu_ioctl(env, KVM_INTERRUPT, &irq);

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