Choose number of TLBs at runtime, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
Move PowerPC 405 specific definitions into a separate filePreliminary code for -kernel option support for PowerPC 405 boardsFix DBSR in case of PowerPC 405 chip resetAdd enums for PowerPC 405 clocks.Fix IRQ numbers (IBM reversed bits numbering...)Fix SPRG4-7 read access right...
Support it_shift for mmapped pckbd.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2691 c046a42c-6fe2-441c-8c8c-71466251a162
Add callbacks to allow dynamic change of PowerPC clocks (to be improved)Fix embedded PowerPC watchdog and timersFix PowerPC 405 SPRAdd generic PowerPC 405 core instanciation code + resets support.Implement simple peripherals shared by most PowerPC 405 implementations...
Acer Pica 61 machine, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2687 c046a42c-6fe2-441c-8c8c-71466251a162
Memory-mapped interface for RTC, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2686 c046a42c-6fe2-441c-8c8c-71466251a162
Memory-mapped interface for PS/2 controller, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2685 c046a42c-6fe2-441c-8c8c-71466251a162
Add reset callbacks for PowerPC CPU.Move cpu_ppc_init, cpu_ppc_close, cpu_ppc_reset and ppc_tlb_invalidateinto helper.c as they are to be called from outside of the translated code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2682 c046a42c-6fe2-441c-8c8c-71466251a162
PREP and heathrow machines only support PowerPC CPU with a 6xx bus.Mac99 machine may also support PowerPC 970 CPU.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2681 c046a42c-6fe2-441c-8c8c-71466251a162
Add bus model (or input pins) into PowerPC CPU flags.Add PowerPC 970 bus and exceptions model.Add code provision for PowerPC 970 instanciation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2680 c046a42c-6fe2-441c-8c8c-71466251a162
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