Revision fcda9863
| b/target-lm32/lm32-decode.h | ||
|---|---|---|
| 60 | 60 |
#define DEC_NOR {B8(00000001), B8(00011111)}
|
| 61 | 61 |
#define DEC_OR {B8(00001110), B8(00011111)}
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| 62 | 62 |
#define DEC_ORHI {B8(00011110), B8(00111111)}
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| 63 |
#define DEC_RAISE {B8(00101011), B8(00111111)}
|
|
| 63 |
#define DEC_SCALL {B8(00101011), B8(00111111)}
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|
| 64 | 64 |
#define DEC_RCSR {B8(00100100), B8(00111111)}
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| 65 | 65 |
#define DEC_SB {B8(00001100), B8(00111111)}
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| 66 | 66 |
#define DEC_SEXTB {B8(00101100), B8(00111111)}
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| b/target-lm32/translate.c | ||
|---|---|---|
| 583 | 583 |
tcg_gen_ori_tl(cpu_R[dc->r1], cpu_R[dc->r0], (dc->imm16 << 16)); |
| 584 | 584 |
} |
| 585 | 585 |
|
| 586 |
static void dec_raise(DisasContext *dc)
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|
| 586 |
static void dec_scall(DisasContext *dc)
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|
| 587 | 587 |
{
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| 588 | 588 |
TCGv t0; |
| 589 | 589 |
int l1; |
| ... | ... | |
| 1002 | 1002 |
{DEC_NOR, dec_nor},
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| 1003 | 1003 |
{DEC_OR, dec_or},
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| 1004 | 1004 |
{DEC_ORHI, dec_orhi},
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| 1005 |
{DEC_RAISE, dec_raise},
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|
| 1005 |
{DEC_SCALL, dec_scall},
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|
| 1006 | 1006 |
{DEC_RCSR, dec_rcsr},
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| 1007 | 1007 |
{DEC_SB, dec_sb},
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| 1008 | 1008 |
{DEC_SEXTB, dec_sextb},
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