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tcg-target.c 52.7 kB
tcg-target.h 2.7 kB

Latest revisions

# Date Author Comment
f7e2aca8 04/06/2010 02:10 am malc

tcg/ppc: Fix typo

Signed-off-by: malc <>
a884dcb8 04/06/2010 01:54 am malc

tcg/ppc: Implment bswap16/32

Signed-off-by: malc <>
aa77bebd 04/05/2010 03:09 pm malc

tcg/ppc: Implement eqv, nand and nor

Signed-off-by: malc <>
355b1943 04/05/2010 02:28 am Paul Brook

Split TLB addend and target_phys_addr_t

Historically the qemu tlb "addend" field was used for both RAM and IO accesses,
so needed to be able to hold both host addresses (unsigned long) and guest
physical addresses (target_phys_addr_t). However since the introduction of...
36368cf0 04/04/2010 07:36 pm malc

tcg/ppc: Fix not_i32

Thanks to Alexander Graf for bug report and a good reproducible test
case.

Signed-off-by: malc <>
86feb1c8 03/27/2010 12:01 am Richard Henderson

tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.

Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operands
sign-extended in 64-bit registers (regardless of the "real" sign
of the operand). For that, we need to be able to distinguish
between a 32-bit load with a 32-bit result and a 32-bit load with...
32d98fbd 03/26/2010 10:52 pm Richard Henderson

tcg: Allow target-specific implementation of NOR.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
9940a96b 03/26/2010 10:44 pm Richard Henderson

tcg: Allow target-specific implementation of NAND.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
8d625cf1 03/26/2010 10:42 pm Richard Henderson

tcg: Allow target-specific implementation of EQV.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
8a56e840 03/26/2010 10:29 pm Richard Henderson

tcg: Use TCGCond where appropriate.

Use the TCGCond enumeration type in the brcond and setcond
related prototypes in tcg-op.h and each code generator.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

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