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target-arm: Store AIF bits in env->pstate for AArch32
To avoid complication in code that otherwise would not need tocare about whether EL1 is AArch32 or AArch64, we should storethe interrupt mask bits (CPSR.AIF in AArch32 and PSTATE.DAIFin AArch64) in one place consistently regardless of EL1's mode....
exec: Make ldl_*_phys input an AddressSpace
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings / X86CPU
exec: Delay CPU_LOG_TB_CPU until we actually execute a TB
The previous placement could result in duplicate logging whilestill processing interrupts.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Richard Henderson <rth@twiddle.net>
cpu-exec: Optimize X86CPU usage in cpu_exec()
Replace growing numbers of inline x86_env_get_cpu() with x86_cpu variable.
Reviewed-by: Chen Fan <chen.fan@cn.fujitsu.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Move apic_state field from CPUX86State to X86CPU
This motion is preparing for refactoring vCPU APIC subsequently.
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
cpu-exec: Also reload CPUClass *cc after longjmp return in cpu_exec()
Local variable CPUClass *cc needs to be reloaded after return from longjmp,too. (This fixes a mips-softmmu crash observed on FreeBSD when QEMU isbuilt with clang.)
Reported-by: Dimitry Andric <dim@FreeBSD.org>...
tcg: Change tcg_qemu_tb_exec return to uintptr_t
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg: Fix next_tb type in cpu_exec
cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()
Where no extra implementation is needed, fall back to CPUClass::set_pc().
Acked-by: Michael Walle <michael@walle.cc> (for lm32)Signed-off-by: Andreas Färber <afaerber@suse.de>
cpu: Move singlestep_enabled field from CPU_COMMON to CPUState
Prepares for changing cpu_single_step() argument to CPUState.
target-i386: Change do_smm_enter() argument to X86CPU
Prepares for log_cpu_state_mask() changing argument to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
log: Change log_cpu_state[_mask]() argument to CPUState
Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turncpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is nolonger needed.
Add documentation and make the functions available through qemu/log.h...
cpu: Replace cpu_single_env with CPUState current_cpu
Move it to qom/cpu.h.
target-i386/helper: remove DF macro
Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>Reviewed-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Merge branch 'mingw' of git://qemu.weilnetz.de/qemu
Ensure good ordering of memory instruction in cpu_exec
The IO thread, when it senses cpu_single_env == 0, expects exit_requestto be checked later on. A compiler scheduling constraint is not strongenough to ensure this on modern architecture. A memory fence is needed...
cpu-exec: Allow "-d exec" in non-debug builds (drop CONFIG_DEBUG_EXEC)
The CONFIG_DEBUG_EXEC define compiles out a single qemu_log_mask()call, which is a pretty trivial cost even for something in the maincpu_exec() loop. Having this be conditionally defined means that...
target-i386: Don't modify env->eflags around cpu_dump_state
We can compute the value in cpu_dump_state anyway, and gratuitousmodifications to eflags creates heisenbugs.
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Richard Henderson <rth@twiddle.net>...
Add top level changes for moxie
Signed-off-by: Anthony Green <green@moxielogic.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
cpu: Move halted and interrupt_request fields to CPUState
Both fields are used in VMState, thus need to be moved together.Explicitly zero them on reset since they were located beforebreakpoints.
Pass PowerPCCPU to kvmppc_handle_halt().
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
This removes a global per-target function and thus takes us one stepcloser to compiling multiple targets into one executable.
It will also allow to override the interrupt handling for certain CPU...
Handle CPU interrupts by inline checking of a flag
Fix some of the nasty TCG race conditions and crashes by implementingcpu_exit() as setting a flag which is checked at the start of each TB.This avoids crashes if a thread or signal handler calls cpu_exit()...
cpu-exec: wrap tcg_qemu_tb_exec() in a fn to restore the PC
If tcg_qemu_tb_exec() returns a value whose low bits don't indicate alink to an indexed next TB, this means that the TB execution neverstarted (eg because the instruction counter hit zero). In this case the...
tcg: Document tcg_qemu_tb_exec() and provide constants for low bit uses
Document tcg_qemu_tb_exec(). In particular, its return value is acombination of a pointer to the next translation block and someextra information in the low two bits. Provide some #defines for...
Replace all setjmp()/longjmp() with sigsetjmp()/siglongjmp()
The setjmp() function doesn't specify whether signal masks are saved andrestored; on Linux they are not, but on BSD (including MacOSX) they are.We want to have consistent behaviour across platforms, so we should...
cpu: Move exit_request field to CPUState
Since it was located before breakpoints field, it needs to be reset.
cpu: Move current_tb field to CPUState
Explictly NULL it on CPU reset since it was located before breakpoints.
Change vapic_report_tpr_access() argument to CPUState. This alsoresolves the use of void* for cpu.h independence.Change vAPIC patch_instruction() argument to X86CPU....
TCG: Move translation block variables to new context inside tcg_ctx: tb_ctx
It's worth to clean-up translation blocks variables and move theminto one context as was suggested by Swirl.Also if we use this context directly inside tcg_ctx, then itspeeds up code generation a bit....
softmmu: move include files to include/sysemu/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
misc: move include files to include/qemu/
build: kill libdis, move disassemblers to disas/
cpus: Pass CPUState to [qemu_]cpu_has_work()
For target-mips also change the return type to bool.
Make include paths for cpu-qom.h consistent for alpha and unicore32.
Signed-off-by: Andreas Färber <afaerber@suse.de>[AF: Updated new target-openrisc function accordingly]...
cpu_dump_state: move DUMP_FPU and DUMP_CCOP flags from x86-only to generic
Move the DUMP_FPU and DUMP_CCOP flags for cpu_dump_state() from beingx86-specific flags to being generic ones. This allows us to drop someTARGET_I386 ifdefs in various places, and means that we can (potentially)...
Revert "i8259: add -no-spurious-interrupt-hack option"
This reverts commit f278d4947fff814dcde2ef2acad36d172ff8be35.
Signed-off-by: malc <av1474@comtv.ru>
i8259: add -no-spurious-interrupt-hack option
This patch provides a way to optionally suppress spurious interrupts,as a workaround for systems described below:
Some old operating systems do not handle spurious interrupts well,and qemu tends to generate them significantly more often than...
unicore32-softmmu: Make UniCore32 cpuid & exceptions correct and runable
This patch initializes the cpuid to exactly correct value becauselinux kernel will check it.In addition, the exception types are specified in proper situations.Then it could make exceptions generated correctly and timely....
Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu
target-or32: Add interrupt support
Add OpenRISC interrupt support.
Signed-off-by: Jia Liu <proljc@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-or32: Add target stubs and QOM cpu
Add OpenRISC target stubs, QOM cpu and basic machine.
apic: Defer interrupt updates to VCPU thread
KVM performs TPR raising asynchronously to QEMU, specifically outsideQEMU's global lock. When an interrupt is injected into the APIC and TPRis checked to decide if this can be delivered, a stale TPR value may be...
x86: avoid AREG0 for exceptions
Add an explicit CPUX86State parameter instead of relying on AREG0.
Merge raise_exception_env() to raise_exception(), likewise withraise_exception_err_env() and raise_exception_err().
Introduce cpu_svm_check_intercept_param() and cpu_vmexit()...
cleanup cpu_set_debug_excp_handler
There are no users left for previous exception handler returned fromcpu_set_debug_excp_handler. It should simplify code a little.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
cris: Fix NMI-flag handling on crisv10.
- The M-flag is encoded in different bits on cris v10 and cris v32.
Signed-off-by: Lars Persson <larper@axis.com>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
cpu-exec: Use cpu_reset() in cpu_exec() for TARGET_PPC
CPUState will be needed for all targets in the future, so place it intothe main variable declaration block.
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Alexander Graf <agraf@suse.de>
target-i386: Pass X86CPU to do_cpu_{init,sipi}()
Allows to use cpu_reset() in place of cpu_state_reset().
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Igor Mammedov <imammedo@redhat.com>
cpu-exec: Remove non-portable type cast and fix format string
This change is needed for w64, but also changes the code for other hosts.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
qtest: add test framework
The idea behind qtest is pretty simple. Instead of executing a CPU via TCG orKVM, rely on an external process to send events to the device model that the CPUwould normally generate.
qtest presents itself as an accelerator. In addition, a new option is added to...
w64: Fix data type of next_tb and tcg_qemu_tb_exec
next_tb is the numeric value of a tcg target (= QEMU host) address.
Using tcg_target_ulong instead of unsigned long shows this and makesthe code portable for hosts with an unusual size of long (w64).
The type cast '(long)(next_tb & ~3)' was not needed (casting...
Rename CPUState -> CPUArchState
Scripted conversion: for file in .[hc] hw/.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done...
PPC: 405: Use proper CPU reset
On ppc405ep there is a register that allows for software to reset thecore, but not the whole system. Implement this reset using a resetinterrupt.
This gets rid of a bunch of #if 0'ed code.
Reported-by: Andreas Färber <afaerber@suse.de>...
Rename cpu_reset() to cpu_state_reset()
Frees the identifier cpu_reset for QOM CPUs (manual rename).
Don't hide the parameter type behind explicit casts, use staticfunctions with strongly typed argument to indirect.
Signed-off-by: Andreas Färber <afaerber@suse.de>...
cpu-exec.c: Correct comment about this file and indentation cleanup
Each target uses the #define macro (in target-xxx/cpu.h) to renamecpu_exec (cpu-exec.c) to cpu_xxx_exec, then defines its own cpu_loopwhich calls cpu_xxx_exec. So basically, cpu-exec.c is not only the i386...
PPC: Fix sync instructions problem in SMP
In the current emulation of the load-and-reserve (lwarx) andstore-conditional (stwcx.) instructions, the internal reservationmechanism is taken into account, however each CPU has its ownreservation information and this information is not synchronized between...
target-xtensa: implement exceptions
- mark privileged opcodes with ring check;- make debug exception on exception handler entry.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-xtensa: add target stubs
cpu-exec: remove unnecessary assignment
Avoid this warning from clang analyzer:/src/qemu/cpu-exec.c:97:5: warning: Value stored to 'phys_page2' is never read phys_page2 = -1;
Adjust the scope of the variable while at it.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg: Reload local variables after return from longjmp
Recent compilers look deep into cpu_exec, find longjmp as a noreturnfunction and decide to smash some stack variables as they won't be usedagain. This may lead to env becoming invalid after return from setjmp,...
cpu-exec.c: avoid AREG0 use
Make functions take a parameter for CPUState instead of relyingon global env. Pass CPUState pointer to TCG prologue, which movesit to AREG0.
Thanks to Peter Maydell and Laurent Desnogues for the ARM prologuechange.
Revert the hacks to avoid AREG0 use on Sparc hosts....
exec.h: fix coding style and change cpu_has_work to return bool
Before the next patch, fix coding style of the areas affected.
Change the type of the return value from cpu_has_work() andqemu_cpu_has_work() to bool.
cpu-exec: unify do_interrupt call
Now that all targets use common function signature for do_interrupt(), there is noneed for the #ifdeffery anymore.
m68k: use caller supplied CPUState for interrupt related stuff
Pass CPUState to do_interrupt(). This is needed by later patches.
It would be cleaner to move the function to helper.c, but there area few dependencies between do_interrupt() and other functions....
x86: use caller supplied CPUState for interrupt related stuff
Several x86 specific functions are called from cpu-exec.c with theassumption that global env register is valid. This will be changedlater, so make the functions use caller supplied CPUState parameter....
cpu_loop_exit: avoid using AREG0
Make cpu_loop_exit() take a parameter for CPUState instead of relyingon global env.
Remove unneeded kvm.h from cpu-exec.c
This was obsoleted by 6792a57bf1.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
target-alpha: Disable interrupts properly.
Interrupts are disabled in PALmode, and when the PS IL is high enough.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Move user emulator stuff from cpu-exec.c to user-exec.c
Simplify cpu-exec.c by refactoring.
cpu-exec: prepare for user and softmmu split
There is little in common with user and softmmu versions of cpu_resume_signal(),split them.
Fix coding style for the user emulator part.
Delete unused tb_invalidate_page_range
tb_invalidate_page_range() was intended to be used to invalidate anarea of a TB which the guest explicitly flushes from i-cache. However,QEMU detects writes to code areas where TBs have been generated, sohis has never been useful....
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
Conflicts: cpu-all.h
irq: Introduce and use CPU_INTERRUPT_SSTEP_MASK.
This mask contains all of the bits that should be ignored while singlestepping in the debugger. The mask contains 2 bits that are not currentlycleared, but are also never set. The bits are included in the mask for...
target-sparc: Do not check CPU_INTERRUPT_TIMER.
This bit is never set, therefore we should not read it either.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Fix typos in comments and code (occured -> occurred and related)
The code changed here is an unused data type name (evt_flush_occurred).
Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Fix typos in comments (interupt -> interrupt)
Remove unused function parameter from cpu_restore_state
The previous patch removed the need for parameter puc.Is is now unused, so remove it.
Cc: Aurelien Jarno <aurelien@aurel32.net>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Stefan Weil <weil@mail.berlios.de>
s390x: Enable s390x-softmmu target
This patch adds some code paths for running s390x guest OSs without theneed for KVM.
Signed-off-by: Alexander Graf <agraf@suse.de>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
unicore32: necessary modifications for other files to support unicore32
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
x86: Unbreak TCG support for hardware breakpoints
Commit 83f338f73e broke x86 hardware breakpoint emulation by moving thedebug exception handling out of cpu_exec. Fix this by moving all TCGrelated bits back, only leaving the generic guest debugging parts in...
inline cpu_halted into sole caller
All implementations are now the same, and there is only one caller,so inline the function there.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
LatticeMico32 target support
This patch adds support for the LatticeMico32 softcore processor by LatticeSemiconductor.
Signed-off-by: Michael Walle <michael@walle.cc>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Move debug exception handling out of cpu_exec
To prepare splitting up KVM and TCG CPU entry/exit, move the debugexception into cpus.c and invoke cpu_handle_debug_exception on returnfrom qemu_cpu_exec.
This also allows to clean up the debug request signaling: We can assign...
kvm: Separate TCG from KVM cpu execution
Mixing up TCG bits with KVM already led to problems around eflagsemulation on x86. Moreover, quite some code that TCG requires on cpuenty/exit is useless for KVM. So dispatch between tcg_cpu_exec andkvm_cpu_exec as early as possible....
target-mips: fix host CPU consumption when guest is idle
When the CPU is in wait state, do not wake-up if an interrupt can't betaken. This avoid host CPU running at 100% if a device (e.g. timer) hasan interrupt line left enabled.
Also factorize code to check if interrupts are enabled in...
Speedup 'tb_find_slow' by using the same heuristic as during memory page lookup
Move the last found TB to the head of the list so it will be found more quickly next time it will be looked for.
Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru>Signed-off-by: Pavel Yushchenko <pau@ispras.ru>...
mips: Add support for VInt and VEIC irq modes
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
Fix cpu_unlink_tb race
If a signal hit after the env->exit_request check but before cpu_execupdated env->current_tb, cpu_unlink_tb called from the signal handerwill not unlink the current TB. This may leave us stuck in a guest loopif no further unlink is invoked....
Fix cpu_exit for tcp_cpu_exec
If a cpu_exit request is pending, ensure that we leave the CPU loopquickly. For this purpose, keep the global exit_request pending untilwe are about to leave tcg_cpu_exec. Also, immediately break out of theSMP loop if the request is set, do not run till the end of the chain....
Introduce proper compiler barrier
Define barrier() as optimization barrier and replace (potentiallyunreliable) asm("") fences.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Acked-by: Paolo Bonzini <pbonzini@redhat.com>Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com>...
tcg-s390: Compute is_write in cpu_signal_handler.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
make SIG_IPI to tcg vcpu thread reliable
Store tcg loop exit request on a global variable, and transfer it toper-CPUState exit_request after assignment of cpu_single_env.
This makes exit request signal from robust. Drop the timedlock hack.
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>...
Enable -d cpu logging by default.
When -d cpu logging was handled by target-foo/translate.c,it was controled by DEBUG_DISAS, which is enabled by default.Use the same condition in cpu_exec.
At the same time, reduce the if-deffery by assuming no flagsupdate is required for the target....
tcg-hppa: Compute is_write in cpu_signal_handler.
linux-user/ia64: workaround ia64 strangenesses
ia64 has some strangenesses that need to be workaround:- it has a __clone2() syscall instead of the using clone() one, with different arguments, and which is not declared in the usual headers.- ucontext.uc_sigmask is declared with type long int, while it is...
Add tb_page_addr_t
The page tracking code in exec.c is used by both userspace and systememulation. Userspace emulation uses it to track virtual pages, andsystem emulation to track ram pages. Introduce a new type to hold thiskind of address.
Signed-off-by: Paul Brook <paul@codesourcery.com>
declare saved_env_reg as volatile
This ensures that the compiler does not move it away fromthe "env = env1;" assignment. Fixes a miscompilationon gcc 4.4, reported by Jay Foad.
Cc: <jay.foad@gmail.com>Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>...
Merge remote branch 'qemu-kvm/uq/master' into staging
kvm: Fix eflags corruption in kvm mode
This should explain a lot of the weird breakages of upstream KVM we'veseen recently (actually we should have seen it much earlier):
Stop translating eflags into TCG format when in kvm mode as we nevertranslate it back and rather sync this broken state into the kernel....
Add FreeBSD/ppc host ucontext definitions.
Submitted by: Andreas Tobler <andreast@fgznet.ch>
Signed-off-by: Juergen Lock <nox@jelal.kn-bremen.de>Signed-off-by: malc <av1474@comtv.ru>
get rid of hostregs_helper.h
Since b567b38 (target-arm: remove T0 and T1, 2009-10-16) the only globalregister that is used is AREG0, so the complexity of hostregs_helper.his unused. Use regular assignments and a compiler optimization barrier.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>...
cris: Prepare for CRISv10.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>