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softfloat: Support halving the result of muladd operation
The ARMv8 instruction set includes a fused floating pointreciprocal square root step instruction which demands an"(x * y + z) / 2" fused operation. Support this by addinga flag to the softfloat muladd operations which requests...
softfloat: Fix exception flag handling for float32_to_float16()
Our float32 to float16 conversion routine was generating the correctnumerical answers, but not always setting the right set of exceptionflags. Fix this, mostly by rearranging the code to more closely...
softfloat: Add float to 16bit integer conversions.
ARMv8 requires support for converting 32 and 64bit floating pointvalues to signed and unsigned 16bit integers.
Signed-off-by: Will Newton <will.newton@linaro.org>[PMM: updated not to incorrectly set Inexact for Invalid inputs]...
softfloat: Make the int-to-float functions take exact-width types
Currently the int-to-float functions take types which are specifiedas "at least X bits wide", rather than "exactly X bits wide". This isconfusing and unhelpful since it means that the callers have to include...
softfloat: Fix float64_to_uint64
The comment preceding the float64_to_uint64 routine suggests thatthe implementation is broken. And this is, indeed, the case.
This patch properly implements the conversion of a 64-bit floatingpoint number to an unsigned, 64 bit integer....
softfloat: Only raise Invalid when conversions to int are out of range
We implement a number of float-to-integer conversions using conversionto an integer type with a wider range and then a check against thenarrower range we are actually converting to. If we find the result to...
softfloat: Fix factor 2 error for scalbn on denormal inputs
If the input to float*_scalbn() is denormal then it representsa number 0.[mantissabits] * 2^(1-exponentbias) (and the actualexponent field is all zeroes). This means that when we convertit to our unpacked encoding the unpacked exponent must be one...
softfloat: Add float32_to_uint64()
This patch adds the float32_to_uint64() routine, which converts a32-bit floating point number to an unsigned 64 bit number.
This contribution can be licensed under either the softfloat-2a or -2blicense.
Signed-off-by: Tom Musta <tommusta@gmail.com>...
softfloat: Fix float64_to_uint64_round_to_zero
The float64_to_uint64_round_to_zero routine is incorrect.
For example, the following test pattern:
46697351FF4AEC29 / 0x1.97351ff4aec29p+103
currently produces 8000000000000000 instead of FFFFFFFFFFFFFFFF....
softfloat: Fix float64_to_uint32
The float64_to_uint32 has several flaws:
- for numbers between 2**32 and 2**64, the inexact exception flag may get incorrectly set. In this case, only the invalid flag should be set.
test pattern: 425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38...
softfloat: Fix float64_to_uint32_round_to_zero
The float64_to_uint32_round_to_zero routine is incorrect.
425F81378DC0CD1F / 0x1.f81378dc0cd1fp+38
will erroneously set the inexact flag.
This patch re-implements the routine to use the float64_to_uint64_round_to_zero...
softfloat: Provide complete set of accessors for fp state
Tidy up the get/set accessors for the fp state to add missing onesand make them all inline in softfloat.h rather than some inline andsome not.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
softfloat: Factor out RoundAndPackFloat16 and NormalizeFloat16Subnormal
In preparation for adding conversions between float16 and float64,factor out code currently done inline in the float16<=>float32conversion functions into functions RoundAndPackFloat16 and...
softfloat: Add float16 <=> float64 conversion functions
Add the conversion functions float16_to_float64() andfloat64_to_float16(), which will be needed for the ARMA64 instruction set.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Richard Henderson <rth@twiddle.net>
softfloat: Refactor code handling various rounding modes
Refactor the code in various functions which calculates roundingincrements given the current rounding mode, so that instead of aset of nested if statements we have a simple switch statement.This will give us a clean place to add the case for the new...
softfloat: Add support for ties-away rounding
IEEE754-2008 specifies a new rounding mode:
"roundTiesToAway: the floating-point number nearest to the infinitelyprecise result shall be delivered; if the two nearest floating-pointnumbers bracketing an unrepresentable infinitely precise result are...
softfloat: Remove unused argument from MINMAX macro.
The nan_exp argument is not used, so remove it.
Signed-off-by: Will Newton <will.newton@linaro.org>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Message-id: 1386158099-9239-4-git-send-email-will.newton@linaro.org...
softfloat: Add minNum() and maxNum() functions to softfloat.
Add floatnn_minnum() and floatnn_maxnum() functions which are equivalentto the minNum() and maxNum() functions from IEEE 754-2008. They aresimilar to min() and max() but differ in the handling of QNaN arguments....
fpu: Correct edgecase in float64_muladd
In handling float64_muladd, if we end up doing a subtraction of theproduct and c, and the 128 bit result of this subtraction happens tohave its most significant bit in bit 63, we weren't handling thiscorrectly when attempting to normalize to put the most significant...
softfloat: Handle float_muladd_negate_c when product is zero
Honour float_muladd_negate_c in the case where the product is zero andc is nonzero. Previously we would fail to negate c.
Seen in (and tested against) the gfortran testsuite on MIPS.
Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com>...
softfloat: Implement uint64_to_float128
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
softfloat: Fix uint64_to_float64
The interface to normalizeRoundAndPackFloat64 requires that thehigh bit be clear. Perform one shift-right-and-jam if needed.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Richard Henderson <rth@twiddle.net>...
fpu: move public header file to include/fpu
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
fpu/softfloat.c: Remove pointless shift of always-zero value
In float16_to_float32, when returning an infinity, just pass zeroas the mantissa argument to packFloat32(), rather than shiftinga value which we know must be zero.
fpu/softfloat.c: Return correctly signed values from uint64_to_float32
The uint64_to_float32() conversion function was incorrectly alwaysreturning numbers with the sign bit set (ie negative numbers). Correctthis so we return positive numbers instead.
softfloat: Replace int16 type with int_fast16_t
Based on the following Coccinelle patch:
@typedef int16, int_fast16_t;@-int16+int_fast16_t
@typedef int16, int_fast16_t;
Avoids a workaround for AIX.
Add typedef for pre-10 Solaris.
Signed-off-by: Andreas Färber <afaerber@suse.de>...
softfloat: Replace uint16 type with uint_fast16_t
@typedef uint16, uint_fast16_t;@-uint16+uint_fast16_t
@typedef uint16, uint_fast16_t;
Fixes the build of the Cocoa frontend on Mac OS X and avoids aworkaround for AIX.
For pre-10 Solaris include osdep.h....
softfloat: Fix mixups of int and int16
normalizeFloat{32,64}Subnormal() expect the exponent as int16, not int.This went unnoticed since int16 and uint16 were both typedef'ed to int.
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
softfloat: make USE_SOFTFLOAT_STRUCT_TYPES compile
This change makes it compile and return the same value than the #undef one.
Signed-off-by: Juan Quintela <quintela@redhat.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Acked-by: Andreas Färber <afaerber@suse.de>...
softfloat: roundAndPackInt{32, 64}: Don't assume int32 is 32 bits
Fix code in roundAndPackInt32 that assumed that int32 was only32 bits, by simply using int32_t instead. Fix the parallel bugin roundAndPackInt64 as well, although that one is only theoretical...
softfloat: float*_to_int32_round_to_zero: don't assume int32 is 32 bits
Code in the float64_to_int32_round_to_zero() function was assumingthat int32 would not be wider than 32 bits; this meant it mightnot correctly detect the overflow case. We take the simple approach...
softfloat: Implement fused multiply-add
Implement fused multiply-add as a softfloat primitive. This implements"a+b*c" as a single step without any intermediate rounding; it isspecified in IEEE 754-2008 and implemented in a number of CPUs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
softfloat: Reinstate accidentally disabled target-specific NaN handling
Include config.h in softfloat.c, so that the target specific ifdefs insoftfloat-specialize.h are evaluated correctly. This was accidentallybroken in commit 789ec7ce2 when config-target.h was removed from...
softfloat: Use uint32 consistently
Prepares for uint32 replacement.
Signed-off-by: Andreas Färber <andreas.faerber@web.de>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
softfloat: Use uint16 consistently
Prepares for uint16 replacement.
softfloat: always enable floatx80 and float128 support
Now that softfloat-native is gone, there is no real point on not alwaysenabling floatx80 and float128 support.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
softfloat: Add new flag for when denormal result is flushed to zero
Add a new float_flag_output_denormal which is set when the resultof a floating point operation would be denormal but is flushed tozero because we are in flush_to_zero mode. This is necessary because...
softfloat: fix float*_scalnb() corner cases
float*_scalnb() were not taking into account all cases. This patch fixessome corner cases:- NaN values in input were not properly propagated and the invalid flag not correctly raised. Use propagateFloat*NaN() for that....
softfloat: add floatx80_compare*() functions
Add floatx80_compare() and floatx80_compare_quiet() functions to matchthe softfloat-native ones.
softfloat: move float*_eq and float*_eq_quiet
I am not a big fan of code moving, but having the signaling version inthe middle of quiet versions and vice versa doesn't make the code easyto read.
This patch is a simple code move, basically swapping locations of...
softfloat: improve description of comparison functions
Make clear for all comparison functions which ones trigger an exceptionfor all NaNs, and which one only for sNaNs.
softfloat: add float*_unordered_{,quiet}() functions
Add float*_unordered() functions to softfloat, matching the softfloat-nativeones. Also add float*_unordered_quiet() functions to match the otherscomparison functions.
This allow target-i386/ops_sse.h to be compiled with softfloat....
softfloat: rename float*_eq() into float*_eq_quiet()
float*_eq functions have a different semantics than other comparisonfunctions. Fix that by first renaming float*_quiet() into float*_eq_quiet().
Note that it is purely mechanical, and the behaviour should be unchanged....
softfloat: rename float*_eq_signaling() into float*_eq()
float*_eq_signaling functions have a different semantics than othercomparison functions. Fix that by renaming float*_quiet_signaling() intofloat*_eq().
softfloat: Add float*_min() and float*_max() functions
Add min and max operations to softfloat. This allows us to implementpropagation of NaNs and handling of negative zero correctly (unlikethe approach of having target helper routines return one of the operands...
softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_t
They are defined with the same semantics as the POSIX types,so prefer those for consistency. Suggested by Peter Maydell.
Cc: Peter Maydell <peter.maydell@linaro.org>Cc: Aurelien Jarno <aurelien@aurel32.net>...
softfloat: Prepend QEMU-style header with derivation notice
The SoftFloat license requires "prominent notice that the workis derivative". Having added features like improved 16-bit supportfor arm already, add such a notice to the sources.
softfloat-native.[ch] are not under the SoftFloat license...
softfloat: Fix compilation failures with USE_SOFTFLOAT_STRUCT_TYPES
Make softfloat compile with USE_SOFTFLOAT_STRUCT_TYPES defined, byadding and using new macros const_float16(), const_float32() andconst_float64() so you can use array initializers in an array of...
softfloat: Correctly handle NaNs in float16_to_float32()
Correctly handle NaNs in float16_to_float32(), by defining andusing a float16ToCommonNaN() function, as we do with the other formats.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
softfloat: Fix single-to-half precision float conversions
Fix various bugs in the single-to-half-precision conversion code: * input NaNs not correctly converted in IEEE mode (fixed by defining and using a commonNaNToFloat16()) * wrong values returned when converting NaN/Inf into non-IEEE...
softfloat: Honour default_nan_mode for float-to-float conversions
Honour the default_nan_mode flag when doing conversions betweendifferent floating point formats, as well as when returning a NaN froma two-operand floating point function. This corrects the behaviour...
softfloat: Add float16 type and float16 NaN handling functions
Add a float16 type to softfloat, rather than using bits16 directly.Also add the missing functions float16_is_quiet_nan(),float16_is_signaling_nan() and float16_maybe_silence_nan(),which are needed for the float16 conversion routines....
softfloat: Implement flushing input denormals to zero
Add support to softfloat for flushing input denormal float32 and float64to zero. softfloat's existing 'flush_to_zero' flag only flushes denormalsto zero on output. Some CPUs need input denormals to be flushed before...
softfloat: Add float/double to 16 bit integer conversion functions
The ARM architecture needs float/double to 16 bit integer conversions.(The 32 bit versions aren't sufficient because of the requirementto saturate at 16 bit MAXINT/MININT and to get the exception bits right.)...
softfloat: add float32_exp2()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
softfloat: remove dead assignments, spotted by clang
Value stored to 'bSign' is never read.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
ARM FP16 support
Implement the ARM VFP half precision floating point extensions.
Signed-off-by: Paul Brook <paul@codesourcery.com>
soft-float: add float32_log2() and float64_log2()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6518 c046a42c-6fe2-441c-8c8c-71466251a162
Implement flush-to-zero mode (denormal results are replaced with zero).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6107 c046a42c-6fe2-441c-8c8c-71466251a162
Correctly normalize values and handle zero inputs to scalbn functions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6102 c046a42c-6fe2-441c-8c8c-71466251a162
Suppress gcc 4.x -Wpointer-sign (included in -Wall) warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5275 c046a42c-6fe2-441c-8c8c-71466251a162
128-bit float support for user mode
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
Fix more typos in softloat code (Eduardo Felipe)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3716 c046a42c-6fe2-441c-8c8c-71466251a162
Fix typo in softfloat code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3714 c046a42c-6fe2-441c-8c8c-71466251a162
Add strict checking mode for softfp code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
ARMv7 support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
Ooops... Typo.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2520 c046a42c-6fe2-441c-8c8c-71466251a162
Add missing softfloat helpers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2518 c046a42c-6fe2-441c-8c8c-71466251a162
avoid using char when it is not necessary
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2204 c046a42c-6fe2-441c-8c8c-71466251a162
ColdFire target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2196 c046a42c-6fe2-441c-8c8c-71466251a162
added abs, chs and compare functions
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1338 c046a42c-6fe2-441c-8c8c-71466251a162
soft float support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1332 c046a42c-6fe2-441c-8c8c-71466251a162