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# Date Author Comment
3dd3a2b9 02/04/2014 08:47 pm Michael Walle

target-lm32: add breakpoint/watchpoint support

This patch adds in-target breakpoint and watchpoint support.

Signed-off-by: Michael Walle <>

34f4aa83 02/04/2014 08:34 pm Michael Walle

target-lm32: move model features to LM32CPU

This allows us to completely remove CPULM32State from DisasContext.
Instead, copy the fields we need to DisasContext.

Reviewed-by: Andreas Färber <>
Signed-off-by: Michael Walle <>

00b941e5 07/23/2013 03:41 am Andreas Färber

cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook

Change breakpoint_invalidate() argument to CPUState alongside.

Since all targets now assign a softmmu-only field, we can drop helpers
cpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd()....

a0762859 07/09/2013 10:33 pm Andreas Färber

log: Change log_cpu_state[_mask]() argument to CPUState

Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turn
cpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is no
longer needed.

Add documentation and make the functions available through qemu/log.h...

b92e062a 03/18/2013 08:40 pm Michael Walle

target-lm32: fix debug memory access

CPU models which have the LM32_FLAG_IGNORE_MSB flag set will shadow the
lower 2GB to the upper 2GB memory space. This will fix the debug memory
access used by qemu console and GDB to match this behaviour.

Signed-off-by: Michael Walle <>

97a8ea5a 03/12/2013 11:35 am Andreas Färber

cpu: Replace do_interrupt() by CPUClass::do_interrupt method

This removes a global per-target function and thus takes us one step
closer to compiling multiple targets into one executable.

It will also allow to override the interrupt handling for certain CPU...

868e2824 02/16/2013 03:50 pm Andreas Färber

target-lm32: Move TCG initialization to LM32CPU initfn

Signed-off-by: Andreas Färber <>

9c23169e 02/16/2013 03:50 pm Andreas Färber

target-lm32: Introduce QOM realizefn for LM32CPU

Introduce a realizefn and set realized = true in cpu_lm32_init().

Also move cpu_reset() call from initfn to realizefn.

Signed-off-by: Andreas Färber <>

1de7afc9 12/19/2012 09:32 am Paolo Bonzini

misc: move include files to include/qemu/

Signed-off-by: Paolo Bonzini <>

a8170e5e 10/23/2012 04:58 pm Avi Kivity

Rename target_phys_addr_t to hwaddr

target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific). Replace it with a finger-friendly,...

b7e516ce 06/05/2012 12:00 am Andreas Färber

Kill off cpu_state_reset()

In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset()
was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()
that would operate on QOM objects.

All callers have been updated except for one in target-mips, so drop all...

0347d689 06/05/2012 12:00 am Andreas Färber

target-lm32: Let cpu_lm32_init() return LM32CPU

Make the include paths for cpu-qom.h consistent to allow using LM32CPU
in cpu.h.

Turn cpu_init macro into a static inline function returning CPULM32State
for backwards compatibility.

Signed-off-by: Andreas Färber <>...

3eab1690 04/12/2012 02:08 am Andreas Färber

target-lm32: QOM'ify CPU reset

Move code from cpu_state_reset() into QOM lm32_cpu_reset().

Signed-off-by: Andreas Färber <>
Acked-by: Michael Walle <>

8d7d505a 04/12/2012 02:07 am Andreas Färber

target-lm32: QOM'ify CPU init

Move code from cpu_lm32_init() to an initfn; call cpu_reset()
instead of cpu_state_reset().

Signed-off-by: Andreas Färber <>
Acked-by: Michael Walle <>

fc0ced2f 04/12/2012 02:07 am Andreas Färber

target-lm32: QOM'ify CPU

Embed CPULM32State as first member of QOM LM32CPU.
Let CPUClass::reset() call cpu_state_reset() for now.

Signed-off-by: Andreas Färber <>
Acked-by: Michael Walle <>

de89fd2b 03/31/2012 08:56 pm Michael Walle

target-lm32: init tcg only if available

Once qtest support for target-lm32 arrives, tcg may be disabled.

Signed-off-by: Michael Walle <>

6393c08d 03/14/2012 11:20 pm Andreas Färber

target-lm32: Don't overuse CPUState

Scripted conversion:
sed -i "s/CPUState/CPULM32State/g" target-lm32/*.[hc]
sed -i "s/#define CPULM32State/#define CPUState/" target-lm32/cpu.h

Signed-off-by: Andreas Färber <>
Acked-by: Anthony Liguori <>

1bba0dc9 03/14/2012 11:20 pm Andreas Färber

Rename cpu_reset() to cpu_state_reset()

Frees the identifier cpu_reset for QOM CPUs (manual rename).

Don't hide the parameter type behind explicit casts, use static
functions with strongly typed argument to indirect.

Signed-off-by: Andreas Färber <>...

60ed8d29 02/28/2012 11:33 pm Stefan Weil

target-lm32: Clean includes

config.h was missing in cpu.h.

Acked-by: Michael Walle <>
Signed-off-by: Stefan Weil <>

27f930c5 10/03/2011 01:44 pm Michael Walle

lm32: add missing qemu_init_vcpu() call

Signed-off-by: Michael Walle <>

7267c094 08/21/2011 07:01 am Anthony Liguori

Use glib memory allocation and free functions

qemu_malloc/qemu_free no longer exist after this commit.

Signed-off-by: Anthony Liguori <>

97b348e7 08/07/2011 12:32 pm Blue Swirl

Remove unused is_softmmu parameter from cpu_handle_mmu_fault

Parameter is_softmmu (and its evil mutant twin brother is_softmuu)
is not used in cpu_*_handle_mmu_fault() functions, remove them
and adjust callers.

Acked-by: Richard Henderson <>...

2b41f10e 06/26/2011 09:25 pm Blue Swirl

Remove exec-all.h include directives

Most exec-all.h include directives are now useless, remove them.

Signed-off-by: Blue Swirl <>

ecbe1de8 05/03/2011 11:48 am Michael Walle

lm32: fix exception handling

Global interrupt enable bit is already saved within the exception handler
helper routine. Thus remove extra code in translation routines.

Additionally, debug exceptions has always DEBA as base address.

Signed-off-by: Michael Walle <>...

17c0fa3d 03/07/2011 02:42 pm Michael Walle

lm32: translation routines

This patch adds the main translation routine. All opcodes of the
LatticeMico32 processor are supported and translated to TCG ops.

Signed-off-by: Michael Walle <>
Signed-off-by: Edgar E. Iglesias <>