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target-openrisc: Remove executable flag for every page
Pages should be flagged executable only if the tlb executable flag isset or the mmu is off.
Signed-off-by: Sebastian Macke <sebastian@macke.de>Reviewed-by: Jia Liu <proljc@gmail.com>Signed-off-by: Jia Liu <proljc@gmail.com>
target-openrisc: Removes a non-conforming behavior for the first page of the memory
Where software leaves 0x0000 - 0x2000 unmapped, the hardware shouldstill allow for this area to be mapped.
Signed-off-by: Sebastian Macke <sebastian@macke.de>Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>...
target-openrisc: Correct handling of page faults.
The result of (rw & 0) is always zero and therefore a logic false.The whole comparison will therefore never be executed, it is a obvious bug,we should use !(rw & 1) here.
Signed-off-by: Sebastian Macke <sebastian@macke.de>...
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Change breakpoint_invalidate() argument to CPUState alongside.
Since all targets now assign a softmmu-only field, we can drop helperscpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd()....
target-openrisc: Clean up triple QOM casts
Instead of calling openrisc_env_get_cpu(), casting to CPU via theENV_GET_CPU() compatibility macro and casting back to OPENRISC_CPU(),just call openrisc_env_get_cpu() directly.
ENV_GET_CPU() is meant as workaround for target-independent code only....
misc: move include files to include/qemu/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
exec: move include files to include/exec/
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes arereserved) and its purpose doesn't match the name (most target_phys_addr_taddresses are not target specific). Replace it with a finger-friendly,...
target-or32: Add MMU support
Add OpenRISC MMU support.
Signed-off-by: Jia Liu <proljc@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-or32: Add target stubs and QOM cpu
Add OpenRISC target stubs, QOM cpu and basic machine.