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Merge branch 'tcg-next' of git://github.com/rth7680/qemu
target: Include softmmu_exec.h where forgotten
Several targets forgot to include softmmu_exec.h, which wouldbreak them with a header cleanup to follow.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Richard Henderson <rth@twiddle.net>
target-ppc: Use #define instead of opencoding SLB valid bit
Use SLB_ESID_V instead of (1 << 27) in the code
Reviewed-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>Signed-off-by: Alexander Graf <agraf@suse.de>
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Change breakpoint_invalidate() argument to CPUState alongside.
Since all targets now assign a softmmu-only field, we can drop helperscpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd()....
log: Change log_cpu_state[_mask]() argument to CPUState
Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turncpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is nolonger needed.
Add documentation and make the functions available through qemu/log.h...
target-ppc: Change LOG_MMU_STATE() argument to CPUState
Choose CPUState rather than PowerPCCPU since doing a CPU cast on themacro argument would hide type mismatches.
Signed-off-by: Andreas Färber <afaerber@suse.de>
target-ppc: Don't overuse ENV_GET_CPU()
Commit b632a148b677b773ff155f9de840b37a653567b9 (target-ppc: QOM methoddispatch for MMU fault handling) introduced a use of ENV_GET_CPU()inside target-ppc/ code. Use ppc_env_get_cpu() instead.
Purely cosmetic, non-functional change to aid in locating and removing...
PPC: Add dump_mmu() for 6xx
"(qemu) info tlb" is a very useful tool for debugging, so I implementedthe missing 6xx version.
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>[agraf: fix printfs on hwaddr to PRI]Signed-off-by: Alexander Graf <agraf@suse.de>
PPC: Fix GDB read on code area for PPC6xx
On PPC 6xx, data and code have separated TLBs. Until now QEMU was onlylooking at data TLBs, which is not good when GDB wants to read code.
This patch adds a second call to get_physical_address() with anACCESS_CODE type of access when the first call with ACCESS_INT fails....
PPC: Add MMU type for 2.06 with AMR but no TB pages
When running -cpu on a POWER7 system with PR KVM, we mask out the 1TBMMU capability from the MMU type mask, but not the AMR bit.
This leads to us having a new MMU type that we don't check for in ourMMU management functions....
target-ppc: Split user only code out of mmu_helper.c
mmu_helper.c is, for obvious reasons, almost entirely concerned withsoftmmu builds of qemu. However, it does contain one stub function whichis used when CONFIG_USER_ONLY=y - the user only versoin of...
target-ppc: Move ppc tlb_fill implementation into mmu_helper.c
For softmmu builds the interface from the generic code to the targetspecific MMU implementation is through the tlb_fill() function. For ppcthis is currently in mem_helper.c, whereas it would make more sense in...
target-ppc: Use QOM method dispatch for MMU fault handling
After previous cleanups, the many scattered checks of env->mmu_model inthe ppc MMU implementation have, at least for "classic" hash MMUs beenreduced (almost) to a single switch at the top ofcpu_ppc_handle_mmu_fault()....
target-ppc: Disentangle hash mmu versions of cpu_get_phys_page_debug()
cpu_get_phys_page_debug() is a trivial wrapper aroundget_physical_address(). But even the signature ofget_physical_address() has some things we'd like to clean up on aper-mmu basis, so this patch moves the test on mmu model out to...
target-ppc: Disentangle hash mmu helper functions
The newly separated paths for hash mmus rely on several helper functionswhich are still shared with 32-bit hash mmus: pp_check(), check_prot() andpte_update_flags(). While these don't have ugly ifdefs on the mmu type,...
target-ppc: Don't share get_pteg_offset() between 32 and 64-bit
The get_pteg_offset() helper function is currently shared between 32-bitand 64-bit hash mmus, taking a parameter for the hash pte size. In the64-bit paths, it's only called in one place, and it's a trivial...
target-ppc: Disentangle BAT code for 32-bit hash MMUs
The functions for looking up BATs (Block Address Translation - essentiallya level 0 TLB) are shared between the classic 32-bit hash MMUs and the6xx style software loaded TLB implementations.
This patch splits out a copy for the 32-bit hash MMUs, to facilitate...
target-ppc: mmu_ctx_t should not be a global type
mmu_ctx_t is currently defined in cpu.h. However it is used for temporaryinformation relating to mmu translation, and is only used in mmu_helper.cand (now) mmu-hash{32,64}.c. Furthermore it contains information which...
target-ppc: Disentangle pte_check()
Currently support for both 32-bit and 64-bit hash MMUs share animplementation of pte_check. But there are enough differences that thismeans the shared function has several very ugly conditionals on "is_64b".
This patch cleans things up by separating out the 64-bit version...
target-ppc: Disentangle find_pte()
32-bit and 64-bit hash MMU implementations currently share a find_ptefunction. This results in a whole bunch of ugly conditionals in the sharedfunction, and not all that much actually shared code.
This patch separates out the 32-bit and 64-bit versions, putting then...
target-ppc: Disentangle get_segment()
The poorly named get_segment() function handles most of the addresstranslation logic for hash-based MMUs. It has many ugly conditionals onwhether the MMU is 32-bit or 64-bit.
This patch splits the function into 32 and 64-bit versions, using the...
target-ppc: Rework get_physical_address()
Currently get_physical_address() first checks to see if translation isenabled in the MSR, then in the translation on case switches on the mmutype. Except that for BookE MMUs, translation is always on, and so it...
target-ppc: Disentangle get_physical_address() paths
Depending on the MSR state, for 64-bit hash MMUs, get_physical_addresscan either call check_physical (which has further tests for mmu type)or get_segment64. Similarly for 32-bit hash MMUs we can either call...
target-ppc: Disentangle hash mmu paths for cpu_ppc_handle_mmu_fault
cpu_ppc_handle_mmu_fault() calls get_physical_address() (whose behaviourdepends on MMU type) then, if that fails, issues an appropriate exception- which again has a number of dependencies on MMU type....
target-ppc: Remove vestigial PowerPC 620 support
The PowerPC 620 was the very first 64-bit PowerPC implementation, buthardly anyone ever actually used the chips. qemu notionally supports the620, but since we don't actually have code to implement the segment table,...
target-ppc: Trivial cleanups in mmu_helper.c
This removes the never-used pte64_invalidate() function, and makesppcmas_tlb_check() static, since it's only used within that file.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>Signed-off-by: Alexander Graf <agraf@suse.de>
target-ppc: Remove address check for logging
One LOG_MMU statement in mmu_helper.c has an odd check on the effectiveaddress being translated. I can see no reason for this; I suspect it wasa debugging hack from long ago. This patch removes it.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>...
target-ppc: Move SLB handling into a mmu-hash64.c
As a first step to disentangling the handling for 64-bit hash MMUs fromthe rest, we move the code handling the Segment Lookaside Buffer (SLB)(which only exists on 64-bit hash MMUs) into a new mmu-hash64.c file....
target-ppc: Fix target_ulong vs. hwaddr format mismatches
Since HWADDR_PRIx is always the same now, use %016 for TARGET_PPC64 and%08 for common code. This may slightly change the ppc64 debug output.
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
target-ppc: Fix unused variable warning for FLUSH_ALL_TLBS
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Alexander Graf <agraf@suse.de>
softmmu: move include files to include/sysemu/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target-ppc: make some functions static
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Acked-by: Alexander Graf <agraf@suse.de>Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Drop unnecessary check of TARGET_PHYS_ADDR_SPACE_BITS
For all our PPC targets the physical address space is at least36 bits, so drop an unnecessary preprocessor conditional checkon TARGET_PHYS_ADDR_SPACE_BITS (erroneously introduced as partof the change from target_phys_addr_t to hwaddr). This brings...
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes arereserved) and its purpose doesn't match the name (most target_phys_addr_taddresses are not target specific). Replace it with a finger-friendly,...
Make target_phys_addr_t 64 bits unconditionally
The hassle and compile time overhead of maintaining both 32-bit and 64-bitcapable source isn't worth the tiny performance advantage which is seen ona minority of configurations. Switch to compiling libhw only once, with...
booke_206_tlbwe: Discard invalid bits in MAS2
The size of EPN field in MAS2 depends on page size. This patch adds amask to discard invalid bits in EPN field.
Definition of EPN field from e500v2 RM:EPN Effective page number: Depending on page size, only the bits...
ppc64: Rudimentary Support for extra page sizes on server CPUs
More recent Power server chips (i.e. based on the 64 bit hash MMU)support more than just the traditional 4k and 16M page sizes. Thiscan get quite complicated, because which page sizes are supported,...
ppc: Avoid AREG0 for MMU etc. helpers
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Alexander Graf <agraf@suse.de>Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Alexander Graf <agraf@suse.de>
ppc: Avoid a warning with the next patch
When the code is moved together by the next patch, compilerdetects a possible uninitialized variable use. Avoid the warningby initializing the variables.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Alexander Graf <agraf@suse.de>...
ppc: Move MMU helpers from helper.c to mmu_helper.c
Move more MMU helpers from helper.c to mmu_helper.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Alexander Graf <agraf@suse.de>Signed-off-by: Andreas Färber <afaerber@suse.de>[update to current helper.c state]...
ppc: Cleanup MMU merge
Remove useless wrappers. In some cases 'int' parameters arechanged to uint32_t.
Make internal functions static.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>[agraf: fix kvm compilation]Signed-off-by: Alexander Graf <agraf@suse.de>...
ppc: Split MMU etc. helpers from op_helper.c
Move MMU, TLB, SLB and BAT ops to mmu_helper.c.