exec: Make stb_phys input an AddressSpace
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
exec: Make stw_*_phys input an AddressSpace
exec: Make stl_phys_notdirty input an AddressSpace
exec: Make stl_*_phys input an AddressSpace
exec: Make stq_*_phys input an AddressSpace
exec: Make lduw_*_phys input an AddressSpace
exec: Make ldq/ldub_*_phys input an AddressSpace
exec: Make ldl_*_phys input an AddressSpace
SPARC: Fix LEON3 power down instruction
Synchronize the program counter before the power down helper callotherwise interrupts will return to the wrong context.
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>Reviewed-by: Richard Henderson <rth@twiddle.net>...
misc: Replace 'struct QEMUTimer' by 'QEMUTimer'
Most code already used QEMUTimer without the redundant 'struct' keyword.
Signed-off-by: Stefan Weil <sw@weilnetz.de>Reviewed-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Merge remote-tracking branch 'rth/tcg-pull' into staging
tcg: Move helper registration into tcg_context_init
No longer needs to be done on a per-target basis.
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg: Remove stray semi-colons from target-*/helper.h
During GEN_HELPER=1, these are actually stray top-level semi-colonswhich are technically invalid ISO C, but GCC accepts as an extension.If we added enough extension markers that we could dare use...
cpu: Drop cpu_model_str from CPU_COMMON
Since this is only read in cpu_copy() and linux-user has a globalcpu_model, drop the field from generic code.
Signed-off-by: Andreas Färber <afaerber@suse.de>
tcg: Change tcg_gen_exit_tb argument to uintptr_t
And update all users.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Richard Henderson <rth@twiddle.net>
cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"
Commit c643bed99 moved qemu_init_vcpu() calls to common CPUState code.This causes x86 cpu-add to fail with "KVM: setting VAPIC address failed".
The reason for the failure is that CPUClass::kvm_fd is not yet...
gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functions
This avoids polluting the global namespace with a non-prefixed macro andmakes it obvious in the call sites that we return.
Semi-automatic conversion using, e.g., sed i 's/GET_REGL(/return gdb_get_regl(mem_buf, /g' target*/gdbstub.c...
cpu: Introduce CPUClass::gdb_{read,write}_register()
Completes migration of target-specific code to new target-*/gdbstub.c.
Acked-by: Michael Walle <michael@walle.cc> (for lm32)Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa)Signed-off-by: Andreas Färber <afaerber@suse.de>
target-sparc: Move cpu_gdb_{read,write}_register()
cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs
CPUState::gdb_num_regs replaces num_g_regs.CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS.
Allows building gdb_register_coprocessor() for xtensa, too.
As a side effect this should fix coprocessor register numbering for SMP....
cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
Change breakpoint_invalidate() argument to CPUState alongside.
Since all targets now assign a softmmu-only field, we can drop helperscpu_class_set_{do_unassigned_access,vmsd}() and device_class_set_vmsd()....
exec: Change cpu_memory_rw_debug() argument to CPUState
Propagate X86CPU in kvmvapic for simplicity.
cpu: Introduce CPUClass::memory_rw_debug() for target_memory_rw_debug()
Make inline target_memory_rw_debug() always available and change itsargument to CPUState. Let it check if CPUClass::memory_rw_debug providesa specialized callback and fall back to cpu_memory_rw_debug() otherwise....
cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()
Where no extra implementation is needed, fall back to CPUClass::set_pc().
Acked-by: Michael Walle <michael@walle.cc> (for lm32)Signed-off-by: Andreas Färber <afaerber@suse.de>
cpu: Move singlestep_enabled field from CPU_COMMON to CPUState
Prepares for changing cpu_single_step() argument to CPUState.
cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc()
This moves setting the Program Counter from gdbstub into target code.Use vaddr type as upper-bound replacement for target_ulong.
target-sparc: Change gen_intermediate_code_internal() argument to SPARCCPU
Also use bool type while at it.
Prepares for moving singlestep_enabled field to CPUState.
Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Andreas Färber <afaerber@suse.de>
log: Change log_cpu_state[_mask]() argument to CPUState
Since commit 878096eeb278a8ac1ccd6667af73e026f29b4cf5 (cpu: Turncpu_dump_{state,statistics}() into CPUState hooks) CPUArchState is nolonger needed.
Add documentation and make the functions available through qemu/log.h...
cpu: Move reset logging to CPUState
x86 was using additional CPU_DUMP_* flags, so make that configurable inCPUClass::reset_dump_flags.
This adds reset logging for alpha, unicore32 and xtensa.
Acked-by: Michael Walle <michael@walle.cc> (for lm32)Reviewed-by: Richard Henderson <rth@twiddle.net>...
linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-user
The functions cpu_clone_regs() and cpu_set_tls() are not purely CPUrelated -- they are specific to the TLS ABI for a a particular OS.Move them into the linux-user/ tree where they belong....
cpu: Drop unnecessary dynamic casts in *_env_get_cpu()
A transition from CPUFooState to FooCPU can be considered safe,just like FooCPU::env access in the opposite direction.The only benefit of the FOO_CPU() casts would be protection againstbogus CPUFooState pointers, but then surrounding code would likely...
memory: add ref/unref calls
Add ref/unref calls at the following places:
- places where memory regions are stashed by a listener and used outside the BQL (including in Xen or KVM).
- memory_region_find callsites
- creation of aliases and containers (only the aliased/contained...
cpu: Change qemu_init_vcpu() argument to CPUState
This allows to move the call into CPUState's realizefn.Therefore move the stub into libqemustub.a.
cpu: Turn cpu_unassigned_access() into a CPUState hook
Use it for all targets, but be careful not to pass invalid CPUState.cpu_single_env can be NULL, e.g. on Xen.
cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks
Make cpustats monitor command available unconditionally.
Prepares for changing kvm_handle_internal_error() and kvm_cpu_exec()arguments to CPUState.
memory: make section size a 128-bit integer
So far, the size of all regions passed to listeners could fit in 64 bits,because artificial regions (containers and aliases) are eliminated bythe memory core, leaving only device regions which have reasonable sizes...
target-sparc: Replace free by g_free
The wrong function was reported by cppcheck.
Remove Sun4c, Sun4d and a few CPUs
Sun4c and Sun4d architectures and related CPUs are not fully implemented(especially Sun4c MMU) and there has been no interest for them.
Likewise, a few CPUs (Cypress, Ross etc) are only half implemented.
Remove the machines and CPUs, they can be re-added if needed later....
cpu: Move halted and interrupt_request fields to CPUState
Both fields are used in VMState, thus need to be moved together.Explicitly zero them on reset since they were located beforebreakpoints.
Pass PowerPCCPU to kvmppc_handle_halt().
cpu: Replace do_interrupt() by CPUClass::do_interrupt method
This removes a global per-target function and thus takes us one stepcloser to compiling multiple targets into one executable.
It will also allow to override the interrupt handling for certain CPU...
gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end
The gen_icount_start/end functions are now somewhat misnamed since theyare useful for generic "start/end of TB" code, used for more than justicount. Rename them to gen_tb_start/end.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
cpu: Introduce ENV_OFFSET macros
Introduce ENV_OFFSET macros which can be used in non-target-specificcode that needs to generate TCG instructions which reference CPUStatefields given the cpu_env register that TCG targets set up with apointer to the CPUArchState struct....
target-sparc: Use official add2/sub2 interfaces for addx/subx
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc: Use mul*2 for multiply
SPARC LEON power-down support added
Signed-off-by: Ronald Hecht <address@hidden>Signed-off-by: Fabien Chouteau <chouteau@adacore.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Added LEON MMU ASI mappings and corrected LEON3 MMU masks.
This patch adds SPARC ASI mappings that are used by the LEON processor.It alsocorrects the MMU context register and context table pointer mask of the LEON3.
Signed-off-by: Ronald Hecht <ronald.hecht@gmx.de>...
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
target-sparc: Fix debug output for DEBUG_MMU
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
cpu: Add CPUArchState pointer to CPUState
The target-specific ENV_GET_CPU() macros have allowed us to navigatefrom CPUArchState to CPUState. The reverse direction was not supported.Avoid introducing CPU_GET_ENV() macros by initializing an untypedpointer that is initialized in derived instance_init functions....
target-sparc: Move TCG initialization to SPARCCPU initfn
target-sparc: Introduce QOM realizefn for SPARCCPU
Introduce realizefn and set realized = true in cpu_sparc_init().
cpu: do not use object_delete
CPUs are never added to the composition tree, so delete is achievedsimply by removing the last references to them.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
cpu: Move cpu_index field to CPUState
Note that target-alpha accesses this field from TCG, now using anegative offset. Therefore the field is placed last in CPUState.
Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change.
Move common parts of mips cpu_state_reset() to mips_cpu_reset()....
fpu: move public header file to include/fpu
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
softmmu: move include files to include/sysemu/
misc: move include files to include/qemu/
qom: move include files to include/qom/
exec: move include files to include/exec/
build: kill libdis, move disassemblers to disas/
exec: refactor cpu_restore_state
Refactor common code around calls to cpu_restore_state().
tb_find_pc() has now no external users, make it static.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
TCG: Use gen_opc_instr_start from context instead of global variable.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
TCG: Use gen_opc_pc from context instead of global variable.
TCG: Use gen_opc_icount from context instead of global variable.
target-sparc: Remove t0, t1 from CPUSPARCState
These fields are no longer used.
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
TCG: Use gen_opc_buf from context instead of global variable.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
TCG: Use gen_opc_ptr from context instead of global variable.
disas: avoid using cpu_single_env
Pass around CPUArchState instead of using global cpu_single_env.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Acked-by: Richard Henderson <rth@twiddle.net>Acked-by: Aurelien Jarno <aurelien@aurel32.net>Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
Merge branch 'trivial-patches' of git://github.com/stefanha/qemu
target-sparc: make do_unaligned_access static
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
cpus: Pass CPUState to [qemu_]cpu_has_work()
For target-mips also change the return type to bool.
Make include paths for cpu-qom.h consistent for alpha and unicore32.
Signed-off-by: Andreas Färber <afaerber@suse.de>[AF: Updated new target-openrisc function accordingly]...
target-sparc: Revert setting cpu_dst to gen_dest_gpr
There is some read-after-write error within the OP=2 insns whichprevents setting cpu_dst to the real output register. Until thisis found and fixed, always write to a temporary first.
Cc: Blue Swirl <blauwirbel@gmail.com>...
target-sparc: rename helper flags
Rename helper flags to the new ones. This is purely a mechanical change,it's possible to use better flags by looking at the helpers.
Acked-by: Blue Swirl <blauwirbel@gmail.com>Reviewed-by: Richard Henderson <rth@twiddle.net>...
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes arereserved) and its purpose doesn't match the name (most target_phys_addr_taddresses are not target specific). Replace it with a finger-friendly,...
target-sparc: fix FMOVr instruction
Like the MOVr instruction, the FMOVr instruction has the conditionencoded between bits 10 and 12.
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc: Tidy ldfsr, stfsr
Remove the last uses of cpu_tmp32. Unify the code between sparc64and sparc32 by using the proper "tl" functions.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc: Remove usage of cpu_tmp64 from most helper functions
Use a locally allocated temporary instead.
target-sparc: Don't use a temporary for gen_dest_fpr_D
In all cases we don't have write-before-read problems.
target-sparc: Remove cpu_tmp64 use from softint insns
The use of "tl" functions and a tmp64 is logically incompatible.Use cpu_tmp0 instead.
target-sparc: Remove last uses of cpu_tmp64
target-sparc: Only use cpu_dst for eventual writes to a gpr
Use cpu_tmp0 for other stuff, like Write Priv Register.
target-sparc: Make cpu_dst local to OP=2 insns
And initialize it such that it (may) write directly to rd.
target-sparc: Remove cpu_tmp0 as a global
Subroutines do their own local temporary management.Within disas_sparc_insn we limit the existance of the variableto OP=2 insns, and delay initialization as late as is reasonablefor the specific XOP.
Signed-off-by: Richard Henderson <rth@twiddle.net>...
target-sparc: Conversion to gen_*_gpr, part 1
Only handle the easy cases directly within disas_sparc_insn.
target-sparc: Use gen_load_gpr in get_src12
This means we can avoid the incoming temporary, though the cleanupof the existing temporaries is not performed in this patch.
target-sparc: Convert asi helpers to gen_*_gpr
Push the DisasContext down so that we can use gen_load/store_gprin sode gen_ldda_asi, gen_stda_ast, gen_cas_asi, gen_casx_asi.
target-sparc: Convert swap to gen_load/store_gpr
target-sparc: Finish conversion to gen_load_gpr
All users of gen_movl_{reg_TN,TN_reg} are removed. At the same time,make cpu_val a local variable for load/store disassembly.
target-sparc: Cleanup cpu_src12 allocation
Now that get_temp_tl is used for get_src12, we don't need topre-allocate these temporaries.
Fallout from this is moving some assignments around cas/casx toavoid uninitialized variable warnings.
target-sparc: Make the cpu_addr variable local to load/store handling
target-sparc: Split out get_temp_i32
target-sparc: Use get_temp_i32 in gen_dest_fpr_F
target-sparc: Avoid cpu_tmp32 in Read Priv Register
We don't need another temporary here. Load directly into theregister we want to set.
target-sparc: Avoid cpu_tmp32 in Write Priv Register
No need to copy to a temporary to store 32 bits.
target-sparc: Add gen_load/store/dest_gpr
Infrastructure to be used to clean up handling of temporaries.
target-sparc: Fix optimized %icc comparisons
Signed-off-by: Richard Henderson <rth@twiddle.net>Tested-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc: Optimize CC_OP_LOGIC conditions
target-sparc: Avoid unnecessary local temporaries
Now that save_state never ends a BB, we don't need to copyvalues into local temps around it.
target-sparc: Don't compute full flags value so often
Avoid speculatively computing flags before every potentially trappingoperation and instead do the flags computation when a trap actuallyoccurs. This gives approximately 30% speedup in emulation.
target-sparc: Optimize conditionals using SUBCC
Aka "normal" comparisons. We now have the infrastructure topass back non-boolean results from gen_compare. This willautomatically get used by both branches and conditional moves.