root / memory.c @ feature-archipelago
History | View | Annotate | Download (57.3 kB)
1 |
/*
|
---|---|
2 |
* Physical memory management
|
3 |
*
|
4 |
* Copyright 2011 Red Hat, Inc. and/or its affiliates
|
5 |
*
|
6 |
* Authors:
|
7 |
* Avi Kivity <avi@redhat.com>
|
8 |
*
|
9 |
* This work is licensed under the terms of the GNU GPL, version 2. See
|
10 |
* the COPYING file in the top-level directory.
|
11 |
*
|
12 |
* Contributions after 2012-01-13 are licensed under the terms of the
|
13 |
* GNU GPL, version 2 or (at your option) any later version.
|
14 |
*/
|
15 |
|
16 |
#include "exec/memory.h" |
17 |
#include "exec/address-spaces.h" |
18 |
#include "exec/ioport.h" |
19 |
#include "qemu/bitops.h" |
20 |
#include "qom/object.h" |
21 |
#include "trace.h" |
22 |
#include <assert.h> |
23 |
|
24 |
#include "exec/memory-internal.h" |
25 |
#include "exec/ram_addr.h" |
26 |
|
27 |
//#define DEBUG_UNASSIGNED
|
28 |
|
29 |
static unsigned memory_region_transaction_depth; |
30 |
static bool memory_region_update_pending; |
31 |
static bool global_dirty_log = false; |
32 |
|
33 |
/* flat_view_mutex is taken around reading as->current_map; the critical
|
34 |
* section is extremely short, so I'm using a single mutex for every AS.
|
35 |
* We could also RCU for the read-side.
|
36 |
*
|
37 |
* The BQL is taken around transaction commits, hence both locks are taken
|
38 |
* while writing to as->current_map (with the BQL taken outside).
|
39 |
*/
|
40 |
static QemuMutex flat_view_mutex;
|
41 |
|
42 |
static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
|
43 |
= QTAILQ_HEAD_INITIALIZER(memory_listeners); |
44 |
|
45 |
static QTAILQ_HEAD(, AddressSpace) address_spaces
|
46 |
= QTAILQ_HEAD_INITIALIZER(address_spaces); |
47 |
|
48 |
static void memory_init(void) |
49 |
{ |
50 |
qemu_mutex_init(&flat_view_mutex); |
51 |
} |
52 |
|
53 |
typedef struct AddrRange AddrRange; |
54 |
|
55 |
/*
|
56 |
* Note using signed integers limits us to physical addresses at most
|
57 |
* 63 bits wide. They are needed for negative offsetting in aliases
|
58 |
* (large MemoryRegion::alias_offset).
|
59 |
*/
|
60 |
struct AddrRange {
|
61 |
Int128 start; |
62 |
Int128 size; |
63 |
}; |
64 |
|
65 |
static AddrRange addrrange_make(Int128 start, Int128 size)
|
66 |
{ |
67 |
return (AddrRange) { start, size };
|
68 |
} |
69 |
|
70 |
static bool addrrange_equal(AddrRange r1, AddrRange r2) |
71 |
{ |
72 |
return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
|
73 |
} |
74 |
|
75 |
static Int128 addrrange_end(AddrRange r)
|
76 |
{ |
77 |
return int128_add(r.start, r.size);
|
78 |
} |
79 |
|
80 |
static AddrRange addrrange_shift(AddrRange range, Int128 delta)
|
81 |
{ |
82 |
int128_addto(&range.start, delta); |
83 |
return range;
|
84 |
} |
85 |
|
86 |
static bool addrrange_contains(AddrRange range, Int128 addr) |
87 |
{ |
88 |
return int128_ge(addr, range.start)
|
89 |
&& int128_lt(addr, addrrange_end(range)); |
90 |
} |
91 |
|
92 |
static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
93 |
{ |
94 |
return addrrange_contains(r1, r2.start)
|
95 |
|| addrrange_contains(r2, r1.start); |
96 |
} |
97 |
|
98 |
static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
|
99 |
{ |
100 |
Int128 start = int128_max(r1.start, r2.start); |
101 |
Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); |
102 |
return addrrange_make(start, int128_sub(end, start));
|
103 |
} |
104 |
|
105 |
enum ListenerDirection { Forward, Reverse };
|
106 |
|
107 |
static bool memory_listener_match(MemoryListener *listener, |
108 |
MemoryRegionSection *section) |
109 |
{ |
110 |
return !listener->address_space_filter
|
111 |
|| listener->address_space_filter == section->address_space; |
112 |
} |
113 |
|
114 |
#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
|
115 |
do { \
|
116 |
MemoryListener *_listener; \ |
117 |
\ |
118 |
switch (_direction) { \
|
119 |
case Forward: \
|
120 |
QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ |
121 |
if (_listener->_callback) { \
|
122 |
_listener->_callback(_listener, ##_args); \ |
123 |
} \ |
124 |
} \ |
125 |
break; \
|
126 |
case Reverse: \
|
127 |
QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ |
128 |
memory_listeners, link) { \ |
129 |
if (_listener->_callback) { \
|
130 |
_listener->_callback(_listener, ##_args); \ |
131 |
} \ |
132 |
} \ |
133 |
break; \
|
134 |
default: \
|
135 |
abort(); \ |
136 |
} \ |
137 |
} while (0) |
138 |
|
139 |
#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
|
140 |
do { \
|
141 |
MemoryListener *_listener; \ |
142 |
\ |
143 |
switch (_direction) { \
|
144 |
case Forward: \
|
145 |
QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ |
146 |
if (_listener->_callback \
|
147 |
&& memory_listener_match(_listener, _section)) { \ |
148 |
_listener->_callback(_listener, _section, ##_args); \ |
149 |
} \ |
150 |
} \ |
151 |
break; \
|
152 |
case Reverse: \
|
153 |
QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \ |
154 |
memory_listeners, link) { \ |
155 |
if (_listener->_callback \
|
156 |
&& memory_listener_match(_listener, _section)) { \ |
157 |
_listener->_callback(_listener, _section, ##_args); \ |
158 |
} \ |
159 |
} \ |
160 |
break; \
|
161 |
default: \
|
162 |
abort(); \ |
163 |
} \ |
164 |
} while (0) |
165 |
|
166 |
/* No need to ref/unref .mr, the FlatRange keeps it alive. */
|
167 |
#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
|
168 |
MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \ |
169 |
.mr = (fr)->mr, \ |
170 |
.address_space = (as), \ |
171 |
.offset_within_region = (fr)->offset_in_region, \ |
172 |
.size = (fr)->addr.size, \ |
173 |
.offset_within_address_space = int128_get64((fr)->addr.start), \ |
174 |
.readonly = (fr)->readonly, \ |
175 |
})) |
176 |
|
177 |
struct CoalescedMemoryRange {
|
178 |
AddrRange addr; |
179 |
QTAILQ_ENTRY(CoalescedMemoryRange) link; |
180 |
}; |
181 |
|
182 |
struct MemoryRegionIoeventfd {
|
183 |
AddrRange addr; |
184 |
bool match_data;
|
185 |
uint64_t data; |
186 |
EventNotifier *e; |
187 |
}; |
188 |
|
189 |
static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a, |
190 |
MemoryRegionIoeventfd b) |
191 |
{ |
192 |
if (int128_lt(a.addr.start, b.addr.start)) {
|
193 |
return true; |
194 |
} else if (int128_gt(a.addr.start, b.addr.start)) { |
195 |
return false; |
196 |
} else if (int128_lt(a.addr.size, b.addr.size)) { |
197 |
return true; |
198 |
} else if (int128_gt(a.addr.size, b.addr.size)) { |
199 |
return false; |
200 |
} else if (a.match_data < b.match_data) { |
201 |
return true; |
202 |
} else if (a.match_data > b.match_data) { |
203 |
return false; |
204 |
} else if (a.match_data) { |
205 |
if (a.data < b.data) {
|
206 |
return true; |
207 |
} else if (a.data > b.data) { |
208 |
return false; |
209 |
} |
210 |
} |
211 |
if (a.e < b.e) {
|
212 |
return true; |
213 |
} else if (a.e > b.e) { |
214 |
return false; |
215 |
} |
216 |
return false; |
217 |
} |
218 |
|
219 |
static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a, |
220 |
MemoryRegionIoeventfd b) |
221 |
{ |
222 |
return !memory_region_ioeventfd_before(a, b)
|
223 |
&& !memory_region_ioeventfd_before(b, a); |
224 |
} |
225 |
|
226 |
typedef struct FlatRange FlatRange; |
227 |
typedef struct FlatView FlatView; |
228 |
|
229 |
/* Range of memory in the global map. Addresses are absolute. */
|
230 |
struct FlatRange {
|
231 |
MemoryRegion *mr; |
232 |
hwaddr offset_in_region; |
233 |
AddrRange addr; |
234 |
uint8_t dirty_log_mask; |
235 |
bool romd_mode;
|
236 |
bool readonly;
|
237 |
}; |
238 |
|
239 |
/* Flattened global view of current active memory hierarchy. Kept in sorted
|
240 |
* order.
|
241 |
*/
|
242 |
struct FlatView {
|
243 |
unsigned ref;
|
244 |
FlatRange *ranges; |
245 |
unsigned nr;
|
246 |
unsigned nr_allocated;
|
247 |
}; |
248 |
|
249 |
typedef struct AddressSpaceOps AddressSpaceOps; |
250 |
|
251 |
#define FOR_EACH_FLAT_RANGE(var, view) \
|
252 |
for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
|
253 |
|
254 |
static bool flatrange_equal(FlatRange *a, FlatRange *b) |
255 |
{ |
256 |
return a->mr == b->mr
|
257 |
&& addrrange_equal(a->addr, b->addr) |
258 |
&& a->offset_in_region == b->offset_in_region |
259 |
&& a->romd_mode == b->romd_mode |
260 |
&& a->readonly == b->readonly; |
261 |
} |
262 |
|
263 |
static void flatview_init(FlatView *view) |
264 |
{ |
265 |
view->ref = 1;
|
266 |
view->ranges = NULL;
|
267 |
view->nr = 0;
|
268 |
view->nr_allocated = 0;
|
269 |
} |
270 |
|
271 |
/* Insert a range into a given position. Caller is responsible for maintaining
|
272 |
* sorting order.
|
273 |
*/
|
274 |
static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) |
275 |
{ |
276 |
if (view->nr == view->nr_allocated) {
|
277 |
view->nr_allocated = MAX(2 * view->nr, 10); |
278 |
view->ranges = g_realloc(view->ranges, |
279 |
view->nr_allocated * sizeof(*view->ranges));
|
280 |
} |
281 |
memmove(view->ranges + pos + 1, view->ranges + pos,
|
282 |
(view->nr - pos) * sizeof(FlatRange));
|
283 |
view->ranges[pos] = *range; |
284 |
memory_region_ref(range->mr); |
285 |
++view->nr; |
286 |
} |
287 |
|
288 |
static void flatview_destroy(FlatView *view) |
289 |
{ |
290 |
int i;
|
291 |
|
292 |
for (i = 0; i < view->nr; i++) { |
293 |
memory_region_unref(view->ranges[i].mr); |
294 |
} |
295 |
g_free(view->ranges); |
296 |
g_free(view); |
297 |
} |
298 |
|
299 |
static void flatview_ref(FlatView *view) |
300 |
{ |
301 |
atomic_inc(&view->ref); |
302 |
} |
303 |
|
304 |
static void flatview_unref(FlatView *view) |
305 |
{ |
306 |
if (atomic_fetch_dec(&view->ref) == 1) { |
307 |
flatview_destroy(view); |
308 |
} |
309 |
} |
310 |
|
311 |
static bool can_merge(FlatRange *r1, FlatRange *r2) |
312 |
{ |
313 |
return int128_eq(addrrange_end(r1->addr), r2->addr.start)
|
314 |
&& r1->mr == r2->mr |
315 |
&& int128_eq(int128_add(int128_make64(r1->offset_in_region), |
316 |
r1->addr.size), |
317 |
int128_make64(r2->offset_in_region)) |
318 |
&& r1->dirty_log_mask == r2->dirty_log_mask |
319 |
&& r1->romd_mode == r2->romd_mode |
320 |
&& r1->readonly == r2->readonly; |
321 |
} |
322 |
|
323 |
/* Attempt to simplify a view by merging adjacent ranges */
|
324 |
static void flatview_simplify(FlatView *view) |
325 |
{ |
326 |
unsigned i, j;
|
327 |
|
328 |
i = 0;
|
329 |
while (i < view->nr) {
|
330 |
j = i + 1;
|
331 |
while (j < view->nr
|
332 |
&& can_merge(&view->ranges[j-1], &view->ranges[j])) {
|
333 |
int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
334 |
++j; |
335 |
} |
336 |
++i; |
337 |
memmove(&view->ranges[i], &view->ranges[j], |
338 |
(view->nr - j) * sizeof(view->ranges[j]));
|
339 |
view->nr -= j - i; |
340 |
} |
341 |
} |
342 |
|
343 |
static bool memory_region_big_endian(MemoryRegion *mr) |
344 |
{ |
345 |
#ifdef TARGET_WORDS_BIGENDIAN
|
346 |
return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
|
347 |
#else
|
348 |
return mr->ops->endianness == DEVICE_BIG_ENDIAN;
|
349 |
#endif
|
350 |
} |
351 |
|
352 |
static bool memory_region_wrong_endianness(MemoryRegion *mr) |
353 |
{ |
354 |
#ifdef TARGET_WORDS_BIGENDIAN
|
355 |
return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
|
356 |
#else
|
357 |
return mr->ops->endianness == DEVICE_BIG_ENDIAN;
|
358 |
#endif
|
359 |
} |
360 |
|
361 |
static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size) |
362 |
{ |
363 |
if (memory_region_wrong_endianness(mr)) {
|
364 |
switch (size) {
|
365 |
case 1: |
366 |
break;
|
367 |
case 2: |
368 |
*data = bswap16(*data); |
369 |
break;
|
370 |
case 4: |
371 |
*data = bswap32(*data); |
372 |
break;
|
373 |
case 8: |
374 |
*data = bswap64(*data); |
375 |
break;
|
376 |
default:
|
377 |
abort(); |
378 |
} |
379 |
} |
380 |
} |
381 |
|
382 |
static void memory_region_oldmmio_read_accessor(MemoryRegion *mr, |
383 |
hwaddr addr, |
384 |
uint64_t *value, |
385 |
unsigned size,
|
386 |
unsigned shift,
|
387 |
uint64_t mask) |
388 |
{ |
389 |
uint64_t tmp; |
390 |
|
391 |
tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr); |
392 |
trace_memory_region_ops_read(mr, addr, tmp, size); |
393 |
*value |= (tmp & mask) << shift; |
394 |
} |
395 |
|
396 |
static void memory_region_read_accessor(MemoryRegion *mr, |
397 |
hwaddr addr, |
398 |
uint64_t *value, |
399 |
unsigned size,
|
400 |
unsigned shift,
|
401 |
uint64_t mask) |
402 |
{ |
403 |
uint64_t tmp; |
404 |
|
405 |
if (mr->flush_coalesced_mmio) {
|
406 |
qemu_flush_coalesced_mmio_buffer(); |
407 |
} |
408 |
tmp = mr->ops->read(mr->opaque, addr, size); |
409 |
trace_memory_region_ops_read(mr, addr, tmp, size); |
410 |
*value |= (tmp & mask) << shift; |
411 |
} |
412 |
|
413 |
static void memory_region_oldmmio_write_accessor(MemoryRegion *mr, |
414 |
hwaddr addr, |
415 |
uint64_t *value, |
416 |
unsigned size,
|
417 |
unsigned shift,
|
418 |
uint64_t mask) |
419 |
{ |
420 |
uint64_t tmp; |
421 |
|
422 |
tmp = (*value >> shift) & mask; |
423 |
trace_memory_region_ops_write(mr, addr, tmp, size); |
424 |
mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp); |
425 |
} |
426 |
|
427 |
static void memory_region_write_accessor(MemoryRegion *mr, |
428 |
hwaddr addr, |
429 |
uint64_t *value, |
430 |
unsigned size,
|
431 |
unsigned shift,
|
432 |
uint64_t mask) |
433 |
{ |
434 |
uint64_t tmp; |
435 |
|
436 |
if (mr->flush_coalesced_mmio) {
|
437 |
qemu_flush_coalesced_mmio_buffer(); |
438 |
} |
439 |
tmp = (*value >> shift) & mask; |
440 |
trace_memory_region_ops_write(mr, addr, tmp, size); |
441 |
mr->ops->write(mr->opaque, addr, tmp, size); |
442 |
} |
443 |
|
444 |
static void access_with_adjusted_size(hwaddr addr, |
445 |
uint64_t *value, |
446 |
unsigned size,
|
447 |
unsigned access_size_min,
|
448 |
unsigned access_size_max,
|
449 |
void (*access)(MemoryRegion *mr,
|
450 |
hwaddr addr, |
451 |
uint64_t *value, |
452 |
unsigned size,
|
453 |
unsigned shift,
|
454 |
uint64_t mask), |
455 |
MemoryRegion *mr) |
456 |
{ |
457 |
uint64_t access_mask; |
458 |
unsigned access_size;
|
459 |
unsigned i;
|
460 |
|
461 |
if (!access_size_min) {
|
462 |
access_size_min = 1;
|
463 |
} |
464 |
if (!access_size_max) {
|
465 |
access_size_max = 4;
|
466 |
} |
467 |
|
468 |
/* FIXME: support unaligned access? */
|
469 |
access_size = MAX(MIN(size, access_size_max), access_size_min); |
470 |
access_mask = -1ULL >> (64 - access_size * 8); |
471 |
if (memory_region_big_endian(mr)) {
|
472 |
for (i = 0; i < size; i += access_size) { |
473 |
access(mr, addr + i, value, access_size, |
474 |
(size - access_size - i) * 8, access_mask);
|
475 |
} |
476 |
} else {
|
477 |
for (i = 0; i < size; i += access_size) { |
478 |
access(mr, addr + i, value, access_size, i * 8, access_mask);
|
479 |
} |
480 |
} |
481 |
} |
482 |
|
483 |
static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
|
484 |
{ |
485 |
AddressSpace *as; |
486 |
|
487 |
while (mr->parent) {
|
488 |
mr = mr->parent; |
489 |
} |
490 |
QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
491 |
if (mr == as->root) {
|
492 |
return as;
|
493 |
} |
494 |
} |
495 |
abort(); |
496 |
} |
497 |
|
498 |
/* Render a memory region into the global view. Ranges in @view obscure
|
499 |
* ranges in @mr.
|
500 |
*/
|
501 |
static void render_memory_region(FlatView *view, |
502 |
MemoryRegion *mr, |
503 |
Int128 base, |
504 |
AddrRange clip, |
505 |
bool readonly)
|
506 |
{ |
507 |
MemoryRegion *subregion; |
508 |
unsigned i;
|
509 |
hwaddr offset_in_region; |
510 |
Int128 remain; |
511 |
Int128 now; |
512 |
FlatRange fr; |
513 |
AddrRange tmp; |
514 |
|
515 |
if (!mr->enabled) {
|
516 |
return;
|
517 |
} |
518 |
|
519 |
int128_addto(&base, int128_make64(mr->addr)); |
520 |
readonly |= mr->readonly; |
521 |
|
522 |
tmp = addrrange_make(base, mr->size); |
523 |
|
524 |
if (!addrrange_intersects(tmp, clip)) {
|
525 |
return;
|
526 |
} |
527 |
|
528 |
clip = addrrange_intersection(tmp, clip); |
529 |
|
530 |
if (mr->alias) {
|
531 |
int128_subfrom(&base, int128_make64(mr->alias->addr)); |
532 |
int128_subfrom(&base, int128_make64(mr->alias_offset)); |
533 |
render_memory_region(view, mr->alias, base, clip, readonly); |
534 |
return;
|
535 |
} |
536 |
|
537 |
/* Render subregions in priority order. */
|
538 |
QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { |
539 |
render_memory_region(view, subregion, base, clip, readonly); |
540 |
} |
541 |
|
542 |
if (!mr->terminates) {
|
543 |
return;
|
544 |
} |
545 |
|
546 |
offset_in_region = int128_get64(int128_sub(clip.start, base)); |
547 |
base = clip.start; |
548 |
remain = clip.size; |
549 |
|
550 |
fr.mr = mr; |
551 |
fr.dirty_log_mask = mr->dirty_log_mask; |
552 |
fr.romd_mode = mr->romd_mode; |
553 |
fr.readonly = readonly; |
554 |
|
555 |
/* Render the region itself into any gaps left by the current view. */
|
556 |
for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
557 |
if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
|
558 |
continue;
|
559 |
} |
560 |
if (int128_lt(base, view->ranges[i].addr.start)) {
|
561 |
now = int128_min(remain, |
562 |
int128_sub(view->ranges[i].addr.start, base)); |
563 |
fr.offset_in_region = offset_in_region; |
564 |
fr.addr = addrrange_make(base, now); |
565 |
flatview_insert(view, i, &fr); |
566 |
++i; |
567 |
int128_addto(&base, now); |
568 |
offset_in_region += int128_get64(now); |
569 |
int128_subfrom(&remain, now); |
570 |
} |
571 |
now = int128_sub(int128_min(int128_add(base, remain), |
572 |
addrrange_end(view->ranges[i].addr)), |
573 |
base); |
574 |
int128_addto(&base, now); |
575 |
offset_in_region += int128_get64(now); |
576 |
int128_subfrom(&remain, now); |
577 |
} |
578 |
if (int128_nz(remain)) {
|
579 |
fr.offset_in_region = offset_in_region; |
580 |
fr.addr = addrrange_make(base, remain); |
581 |
flatview_insert(view, i, &fr); |
582 |
} |
583 |
} |
584 |
|
585 |
/* Render a memory topology into a list of disjoint absolute ranges. */
|
586 |
static FlatView *generate_memory_topology(MemoryRegion *mr)
|
587 |
{ |
588 |
FlatView *view; |
589 |
|
590 |
view = g_new(FlatView, 1);
|
591 |
flatview_init(view); |
592 |
|
593 |
if (mr) {
|
594 |
render_memory_region(view, mr, int128_zero(), |
595 |
addrrange_make(int128_zero(), int128_2_64()), false);
|
596 |
} |
597 |
flatview_simplify(view); |
598 |
|
599 |
return view;
|
600 |
} |
601 |
|
602 |
static void address_space_add_del_ioeventfds(AddressSpace *as, |
603 |
MemoryRegionIoeventfd *fds_new, |
604 |
unsigned fds_new_nb,
|
605 |
MemoryRegionIoeventfd *fds_old, |
606 |
unsigned fds_old_nb)
|
607 |
{ |
608 |
unsigned iold, inew;
|
609 |
MemoryRegionIoeventfd *fd; |
610 |
MemoryRegionSection section; |
611 |
|
612 |
/* Generate a symmetric difference of the old and new fd sets, adding
|
613 |
* and deleting as necessary.
|
614 |
*/
|
615 |
|
616 |
iold = inew = 0;
|
617 |
while (iold < fds_old_nb || inew < fds_new_nb) {
|
618 |
if (iold < fds_old_nb
|
619 |
&& (inew == fds_new_nb |
620 |
|| memory_region_ioeventfd_before(fds_old[iold], |
621 |
fds_new[inew]))) { |
622 |
fd = &fds_old[iold]; |
623 |
section = (MemoryRegionSection) { |
624 |
.address_space = as, |
625 |
.offset_within_address_space = int128_get64(fd->addr.start), |
626 |
.size = fd->addr.size, |
627 |
}; |
628 |
MEMORY_LISTENER_CALL(eventfd_del, Forward, §ion, |
629 |
fd->match_data, fd->data, fd->e); |
630 |
++iold; |
631 |
} else if (inew < fds_new_nb |
632 |
&& (iold == fds_old_nb |
633 |
|| memory_region_ioeventfd_before(fds_new[inew], |
634 |
fds_old[iold]))) { |
635 |
fd = &fds_new[inew]; |
636 |
section = (MemoryRegionSection) { |
637 |
.address_space = as, |
638 |
.offset_within_address_space = int128_get64(fd->addr.start), |
639 |
.size = fd->addr.size, |
640 |
}; |
641 |
MEMORY_LISTENER_CALL(eventfd_add, Reverse, §ion, |
642 |
fd->match_data, fd->data, fd->e); |
643 |
++inew; |
644 |
} else {
|
645 |
++iold; |
646 |
++inew; |
647 |
} |
648 |
} |
649 |
} |
650 |
|
651 |
static FlatView *address_space_get_flatview(AddressSpace *as)
|
652 |
{ |
653 |
FlatView *view; |
654 |
|
655 |
qemu_mutex_lock(&flat_view_mutex); |
656 |
view = as->current_map; |
657 |
flatview_ref(view); |
658 |
qemu_mutex_unlock(&flat_view_mutex); |
659 |
return view;
|
660 |
} |
661 |
|
662 |
static void address_space_update_ioeventfds(AddressSpace *as) |
663 |
{ |
664 |
FlatView *view; |
665 |
FlatRange *fr; |
666 |
unsigned ioeventfd_nb = 0; |
667 |
MemoryRegionIoeventfd *ioeventfds = NULL;
|
668 |
AddrRange tmp; |
669 |
unsigned i;
|
670 |
|
671 |
view = address_space_get_flatview(as); |
672 |
FOR_EACH_FLAT_RANGE(fr, view) { |
673 |
for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
674 |
tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, |
675 |
int128_sub(fr->addr.start, |
676 |
int128_make64(fr->offset_in_region))); |
677 |
if (addrrange_intersects(fr->addr, tmp)) {
|
678 |
++ioeventfd_nb; |
679 |
ioeventfds = g_realloc(ioeventfds, |
680 |
ioeventfd_nb * sizeof(*ioeventfds));
|
681 |
ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
|
682 |
ioeventfds[ioeventfd_nb-1].addr = tmp;
|
683 |
} |
684 |
} |
685 |
} |
686 |
|
687 |
address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, |
688 |
as->ioeventfds, as->ioeventfd_nb); |
689 |
|
690 |
g_free(as->ioeventfds); |
691 |
as->ioeventfds = ioeventfds; |
692 |
as->ioeventfd_nb = ioeventfd_nb; |
693 |
flatview_unref(view); |
694 |
} |
695 |
|
696 |
static void address_space_update_topology_pass(AddressSpace *as, |
697 |
const FlatView *old_view,
|
698 |
const FlatView *new_view,
|
699 |
bool adding)
|
700 |
{ |
701 |
unsigned iold, inew;
|
702 |
FlatRange *frold, *frnew; |
703 |
|
704 |
/* Generate a symmetric difference of the old and new memory maps.
|
705 |
* Kill ranges in the old map, and instantiate ranges in the new map.
|
706 |
*/
|
707 |
iold = inew = 0;
|
708 |
while (iold < old_view->nr || inew < new_view->nr) {
|
709 |
if (iold < old_view->nr) {
|
710 |
frold = &old_view->ranges[iold]; |
711 |
} else {
|
712 |
frold = NULL;
|
713 |
} |
714 |
if (inew < new_view->nr) {
|
715 |
frnew = &new_view->ranges[inew]; |
716 |
} else {
|
717 |
frnew = NULL;
|
718 |
} |
719 |
|
720 |
if (frold
|
721 |
&& (!frnew |
722 |
|| int128_lt(frold->addr.start, frnew->addr.start) |
723 |
|| (int128_eq(frold->addr.start, frnew->addr.start) |
724 |
&& !flatrange_equal(frold, frnew)))) { |
725 |
/* In old but not in new, or in both but attributes changed. */
|
726 |
|
727 |
if (!adding) {
|
728 |
MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
729 |
} |
730 |
|
731 |
++iold; |
732 |
} else if (frold && frnew && flatrange_equal(frold, frnew)) { |
733 |
/* In both and unchanged (except logging may have changed) */
|
734 |
|
735 |
if (adding) {
|
736 |
MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
737 |
if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
|
738 |
MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); |
739 |
} else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { |
740 |
MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); |
741 |
} |
742 |
} |
743 |
|
744 |
++iold; |
745 |
++inew; |
746 |
} else {
|
747 |
/* In new */
|
748 |
|
749 |
if (adding) {
|
750 |
MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
751 |
} |
752 |
|
753 |
++inew; |
754 |
} |
755 |
} |
756 |
} |
757 |
|
758 |
|
759 |
static void address_space_update_topology(AddressSpace *as) |
760 |
{ |
761 |
FlatView *old_view = address_space_get_flatview(as); |
762 |
FlatView *new_view = generate_memory_topology(as->root); |
763 |
|
764 |
address_space_update_topology_pass(as, old_view, new_view, false);
|
765 |
address_space_update_topology_pass(as, old_view, new_view, true);
|
766 |
|
767 |
qemu_mutex_lock(&flat_view_mutex); |
768 |
flatview_unref(as->current_map); |
769 |
as->current_map = new_view; |
770 |
qemu_mutex_unlock(&flat_view_mutex); |
771 |
|
772 |
/* Note that all the old MemoryRegions are still alive up to this
|
773 |
* point. This relieves most MemoryListeners from the need to
|
774 |
* ref/unref the MemoryRegions they get---unless they use them
|
775 |
* outside the iothread mutex, in which case precise reference
|
776 |
* counting is necessary.
|
777 |
*/
|
778 |
flatview_unref(old_view); |
779 |
|
780 |
address_space_update_ioeventfds(as); |
781 |
} |
782 |
|
783 |
void memory_region_transaction_begin(void) |
784 |
{ |
785 |
qemu_flush_coalesced_mmio_buffer(); |
786 |
++memory_region_transaction_depth; |
787 |
} |
788 |
|
789 |
void memory_region_transaction_commit(void) |
790 |
{ |
791 |
AddressSpace *as; |
792 |
|
793 |
assert(memory_region_transaction_depth); |
794 |
--memory_region_transaction_depth; |
795 |
if (!memory_region_transaction_depth && memory_region_update_pending) {
|
796 |
memory_region_update_pending = false;
|
797 |
MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); |
798 |
|
799 |
QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
800 |
address_space_update_topology(as); |
801 |
} |
802 |
|
803 |
MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); |
804 |
} |
805 |
} |
806 |
|
807 |
static void memory_region_destructor_none(MemoryRegion *mr) |
808 |
{ |
809 |
} |
810 |
|
811 |
static void memory_region_destructor_ram(MemoryRegion *mr) |
812 |
{ |
813 |
qemu_ram_free(mr->ram_addr); |
814 |
} |
815 |
|
816 |
static void memory_region_destructor_alias(MemoryRegion *mr) |
817 |
{ |
818 |
memory_region_unref(mr->alias); |
819 |
} |
820 |
|
821 |
static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr) |
822 |
{ |
823 |
qemu_ram_free_from_ptr(mr->ram_addr); |
824 |
} |
825 |
|
826 |
static void memory_region_destructor_rom_device(MemoryRegion *mr) |
827 |
{ |
828 |
qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK); |
829 |
} |
830 |
|
831 |
void memory_region_init(MemoryRegion *mr,
|
832 |
Object *owner, |
833 |
const char *name, |
834 |
uint64_t size) |
835 |
{ |
836 |
mr->ops = &unassigned_mem_ops; |
837 |
mr->opaque = NULL;
|
838 |
mr->owner = owner; |
839 |
mr->iommu_ops = NULL;
|
840 |
mr->parent = NULL;
|
841 |
mr->size = int128_make64(size); |
842 |
if (size == UINT64_MAX) {
|
843 |
mr->size = int128_2_64(); |
844 |
} |
845 |
mr->addr = 0;
|
846 |
mr->subpage = false;
|
847 |
mr->enabled = true;
|
848 |
mr->terminates = false;
|
849 |
mr->ram = false;
|
850 |
mr->romd_mode = true;
|
851 |
mr->readonly = false;
|
852 |
mr->rom_device = false;
|
853 |
mr->destructor = memory_region_destructor_none; |
854 |
mr->priority = 0;
|
855 |
mr->may_overlap = false;
|
856 |
mr->alias = NULL;
|
857 |
QTAILQ_INIT(&mr->subregions); |
858 |
memset(&mr->subregions_link, 0, sizeof mr->subregions_link); |
859 |
QTAILQ_INIT(&mr->coalesced); |
860 |
mr->name = g_strdup(name); |
861 |
mr->dirty_log_mask = 0;
|
862 |
mr->ioeventfd_nb = 0;
|
863 |
mr->ioeventfds = NULL;
|
864 |
mr->flush_coalesced_mmio = false;
|
865 |
} |
866 |
|
867 |
static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
868 |
unsigned size)
|
869 |
{ |
870 |
#ifdef DEBUG_UNASSIGNED
|
871 |
printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); |
872 |
#endif
|
873 |
if (current_cpu != NULL) { |
874 |
cpu_unassigned_access(current_cpu, addr, false, false, 0, size); |
875 |
} |
876 |
return 0; |
877 |
} |
878 |
|
879 |
static void unassigned_mem_write(void *opaque, hwaddr addr, |
880 |
uint64_t val, unsigned size)
|
881 |
{ |
882 |
#ifdef DEBUG_UNASSIGNED
|
883 |
printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); |
884 |
#endif
|
885 |
if (current_cpu != NULL) { |
886 |
cpu_unassigned_access(current_cpu, addr, true, false, 0, size); |
887 |
} |
888 |
} |
889 |
|
890 |
static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
891 |
unsigned size, bool is_write) |
892 |
{ |
893 |
return false; |
894 |
} |
895 |
|
896 |
const MemoryRegionOps unassigned_mem_ops = {
|
897 |
.valid.accepts = unassigned_mem_accepts, |
898 |
.endianness = DEVICE_NATIVE_ENDIAN, |
899 |
}; |
900 |
|
901 |
bool memory_region_access_valid(MemoryRegion *mr,
|
902 |
hwaddr addr, |
903 |
unsigned size,
|
904 |
bool is_write)
|
905 |
{ |
906 |
int access_size_min, access_size_max;
|
907 |
int access_size, i;
|
908 |
|
909 |
if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
910 |
return false; |
911 |
} |
912 |
|
913 |
if (!mr->ops->valid.accepts) {
|
914 |
return true; |
915 |
} |
916 |
|
917 |
access_size_min = mr->ops->valid.min_access_size; |
918 |
if (!mr->ops->valid.min_access_size) {
|
919 |
access_size_min = 1;
|
920 |
} |
921 |
|
922 |
access_size_max = mr->ops->valid.max_access_size; |
923 |
if (!mr->ops->valid.max_access_size) {
|
924 |
access_size_max = 4;
|
925 |
} |
926 |
|
927 |
access_size = MAX(MIN(size, access_size_max), access_size_min); |
928 |
for (i = 0; i < size; i += access_size) { |
929 |
if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
|
930 |
is_write)) { |
931 |
return false; |
932 |
} |
933 |
} |
934 |
|
935 |
return true; |
936 |
} |
937 |
|
938 |
static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
|
939 |
hwaddr addr, |
940 |
unsigned size)
|
941 |
{ |
942 |
uint64_t data = 0;
|
943 |
|
944 |
if (mr->ops->read) {
|
945 |
access_with_adjusted_size(addr, &data, size, |
946 |
mr->ops->impl.min_access_size, |
947 |
mr->ops->impl.max_access_size, |
948 |
memory_region_read_accessor, mr); |
949 |
} else {
|
950 |
access_with_adjusted_size(addr, &data, size, 1, 4, |
951 |
memory_region_oldmmio_read_accessor, mr); |
952 |
} |
953 |
|
954 |
return data;
|
955 |
} |
956 |
|
957 |
static bool memory_region_dispatch_read(MemoryRegion *mr, |
958 |
hwaddr addr, |
959 |
uint64_t *pval, |
960 |
unsigned size)
|
961 |
{ |
962 |
if (!memory_region_access_valid(mr, addr, size, false)) { |
963 |
*pval = unassigned_mem_read(mr, addr, size); |
964 |
return true; |
965 |
} |
966 |
|
967 |
*pval = memory_region_dispatch_read1(mr, addr, size); |
968 |
adjust_endianness(mr, pval, size); |
969 |
return false; |
970 |
} |
971 |
|
972 |
static bool memory_region_dispatch_write(MemoryRegion *mr, |
973 |
hwaddr addr, |
974 |
uint64_t data, |
975 |
unsigned size)
|
976 |
{ |
977 |
if (!memory_region_access_valid(mr, addr, size, true)) { |
978 |
unassigned_mem_write(mr, addr, data, size); |
979 |
return true; |
980 |
} |
981 |
|
982 |
adjust_endianness(mr, &data, size); |
983 |
|
984 |
if (mr->ops->write) {
|
985 |
access_with_adjusted_size(addr, &data, size, |
986 |
mr->ops->impl.min_access_size, |
987 |
mr->ops->impl.max_access_size, |
988 |
memory_region_write_accessor, mr); |
989 |
} else {
|
990 |
access_with_adjusted_size(addr, &data, size, 1, 4, |
991 |
memory_region_oldmmio_write_accessor, mr); |
992 |
} |
993 |
return false; |
994 |
} |
995 |
|
996 |
void memory_region_init_io(MemoryRegion *mr,
|
997 |
Object *owner, |
998 |
const MemoryRegionOps *ops,
|
999 |
void *opaque,
|
1000 |
const char *name, |
1001 |
uint64_t size) |
1002 |
{ |
1003 |
memory_region_init(mr, owner, name, size); |
1004 |
mr->ops = ops; |
1005 |
mr->opaque = opaque; |
1006 |
mr->terminates = true;
|
1007 |
mr->ram_addr = ~(ram_addr_t)0;
|
1008 |
} |
1009 |
|
1010 |
void memory_region_init_ram(MemoryRegion *mr,
|
1011 |
Object *owner, |
1012 |
const char *name, |
1013 |
uint64_t size) |
1014 |
{ |
1015 |
memory_region_init(mr, owner, name, size); |
1016 |
mr->ram = true;
|
1017 |
mr->terminates = true;
|
1018 |
mr->destructor = memory_region_destructor_ram; |
1019 |
mr->ram_addr = qemu_ram_alloc(size, mr); |
1020 |
} |
1021 |
|
1022 |
void memory_region_init_ram_ptr(MemoryRegion *mr,
|
1023 |
Object *owner, |
1024 |
const char *name, |
1025 |
uint64_t size, |
1026 |
void *ptr)
|
1027 |
{ |
1028 |
memory_region_init(mr, owner, name, size); |
1029 |
mr->ram = true;
|
1030 |
mr->terminates = true;
|
1031 |
mr->destructor = memory_region_destructor_ram_from_ptr; |
1032 |
mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr); |
1033 |
} |
1034 |
|
1035 |
void memory_region_init_alias(MemoryRegion *mr,
|
1036 |
Object *owner, |
1037 |
const char *name, |
1038 |
MemoryRegion *orig, |
1039 |
hwaddr offset, |
1040 |
uint64_t size) |
1041 |
{ |
1042 |
memory_region_init(mr, owner, name, size); |
1043 |
memory_region_ref(orig); |
1044 |
mr->destructor = memory_region_destructor_alias; |
1045 |
mr->alias = orig; |
1046 |
mr->alias_offset = offset; |
1047 |
} |
1048 |
|
1049 |
void memory_region_init_rom_device(MemoryRegion *mr,
|
1050 |
Object *owner, |
1051 |
const MemoryRegionOps *ops,
|
1052 |
void *opaque,
|
1053 |
const char *name, |
1054 |
uint64_t size) |
1055 |
{ |
1056 |
memory_region_init(mr, owner, name, size); |
1057 |
mr->ops = ops; |
1058 |
mr->opaque = opaque; |
1059 |
mr->terminates = true;
|
1060 |
mr->rom_device = true;
|
1061 |
mr->destructor = memory_region_destructor_rom_device; |
1062 |
mr->ram_addr = qemu_ram_alloc(size, mr); |
1063 |
} |
1064 |
|
1065 |
void memory_region_init_iommu(MemoryRegion *mr,
|
1066 |
Object *owner, |
1067 |
const MemoryRegionIOMMUOps *ops,
|
1068 |
const char *name, |
1069 |
uint64_t size) |
1070 |
{ |
1071 |
memory_region_init(mr, owner, name, size); |
1072 |
mr->iommu_ops = ops, |
1073 |
mr->terminates = true; /* then re-forwards */ |
1074 |
notifier_list_init(&mr->iommu_notify); |
1075 |
} |
1076 |
|
1077 |
void memory_region_init_reservation(MemoryRegion *mr,
|
1078 |
Object *owner, |
1079 |
const char *name, |
1080 |
uint64_t size) |
1081 |
{ |
1082 |
memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size); |
1083 |
} |
1084 |
|
1085 |
void memory_region_destroy(MemoryRegion *mr)
|
1086 |
{ |
1087 |
assert(QTAILQ_EMPTY(&mr->subregions)); |
1088 |
assert(memory_region_transaction_depth == 0);
|
1089 |
mr->destructor(mr); |
1090 |
memory_region_clear_coalescing(mr); |
1091 |
g_free((char *)mr->name);
|
1092 |
g_free(mr->ioeventfds); |
1093 |
} |
1094 |
|
1095 |
Object *memory_region_owner(MemoryRegion *mr) |
1096 |
{ |
1097 |
return mr->owner;
|
1098 |
} |
1099 |
|
1100 |
void memory_region_ref(MemoryRegion *mr)
|
1101 |
{ |
1102 |
if (mr && mr->owner) {
|
1103 |
object_ref(mr->owner); |
1104 |
} |
1105 |
} |
1106 |
|
1107 |
void memory_region_unref(MemoryRegion *mr)
|
1108 |
{ |
1109 |
if (mr && mr->owner) {
|
1110 |
object_unref(mr->owner); |
1111 |
} |
1112 |
} |
1113 |
|
1114 |
uint64_t memory_region_size(MemoryRegion *mr) |
1115 |
{ |
1116 |
if (int128_eq(mr->size, int128_2_64())) {
|
1117 |
return UINT64_MAX;
|
1118 |
} |
1119 |
return int128_get64(mr->size);
|
1120 |
} |
1121 |
|
1122 |
const char *memory_region_name(MemoryRegion *mr) |
1123 |
{ |
1124 |
return mr->name;
|
1125 |
} |
1126 |
|
1127 |
bool memory_region_is_ram(MemoryRegion *mr)
|
1128 |
{ |
1129 |
return mr->ram;
|
1130 |
} |
1131 |
|
1132 |
bool memory_region_is_logging(MemoryRegion *mr)
|
1133 |
{ |
1134 |
return mr->dirty_log_mask;
|
1135 |
} |
1136 |
|
1137 |
bool memory_region_is_rom(MemoryRegion *mr)
|
1138 |
{ |
1139 |
return mr->ram && mr->readonly;
|
1140 |
} |
1141 |
|
1142 |
bool memory_region_is_iommu(MemoryRegion *mr)
|
1143 |
{ |
1144 |
return mr->iommu_ops;
|
1145 |
} |
1146 |
|
1147 |
void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
|
1148 |
{ |
1149 |
notifier_list_add(&mr->iommu_notify, n); |
1150 |
} |
1151 |
|
1152 |
void memory_region_unregister_iommu_notifier(Notifier *n)
|
1153 |
{ |
1154 |
notifier_remove(n); |
1155 |
} |
1156 |
|
1157 |
void memory_region_notify_iommu(MemoryRegion *mr,
|
1158 |
IOMMUTLBEntry entry) |
1159 |
{ |
1160 |
assert(memory_region_is_iommu(mr)); |
1161 |
notifier_list_notify(&mr->iommu_notify, &entry); |
1162 |
} |
1163 |
|
1164 |
void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
1165 |
{ |
1166 |
uint8_t mask = 1 << client;
|
1167 |
|
1168 |
memory_region_transaction_begin(); |
1169 |
mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
1170 |
memory_region_update_pending |= mr->enabled; |
1171 |
memory_region_transaction_commit(); |
1172 |
} |
1173 |
|
1174 |
bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
|
1175 |
hwaddr size, unsigned client)
|
1176 |
{ |
1177 |
assert(mr->terminates); |
1178 |
return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
|
1179 |
} |
1180 |
|
1181 |
void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
|
1182 |
hwaddr size) |
1183 |
{ |
1184 |
assert(mr->terminates); |
1185 |
cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size); |
1186 |
} |
1187 |
|
1188 |
bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
|
1189 |
hwaddr size, unsigned client)
|
1190 |
{ |
1191 |
bool ret;
|
1192 |
assert(mr->terminates); |
1193 |
ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client); |
1194 |
if (ret) {
|
1195 |
cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client); |
1196 |
} |
1197 |
return ret;
|
1198 |
} |
1199 |
|
1200 |
|
1201 |
void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
|
1202 |
{ |
1203 |
AddressSpace *as; |
1204 |
FlatRange *fr; |
1205 |
|
1206 |
QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
1207 |
FlatView *view = address_space_get_flatview(as); |
1208 |
FOR_EACH_FLAT_RANGE(fr, view) { |
1209 |
if (fr->mr == mr) {
|
1210 |
MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
1211 |
} |
1212 |
} |
1213 |
flatview_unref(view); |
1214 |
} |
1215 |
} |
1216 |
|
1217 |
void memory_region_set_readonly(MemoryRegion *mr, bool readonly) |
1218 |
{ |
1219 |
if (mr->readonly != readonly) {
|
1220 |
memory_region_transaction_begin(); |
1221 |
mr->readonly = readonly; |
1222 |
memory_region_update_pending |= mr->enabled; |
1223 |
memory_region_transaction_commit(); |
1224 |
} |
1225 |
} |
1226 |
|
1227 |
void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
1228 |
{ |
1229 |
if (mr->romd_mode != romd_mode) {
|
1230 |
memory_region_transaction_begin(); |
1231 |
mr->romd_mode = romd_mode; |
1232 |
memory_region_update_pending |= mr->enabled; |
1233 |
memory_region_transaction_commit(); |
1234 |
} |
1235 |
} |
1236 |
|
1237 |
void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
|
1238 |
hwaddr size, unsigned client)
|
1239 |
{ |
1240 |
assert(mr->terminates); |
1241 |
cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client); |
1242 |
} |
1243 |
|
1244 |
void *memory_region_get_ram_ptr(MemoryRegion *mr)
|
1245 |
{ |
1246 |
if (mr->alias) {
|
1247 |
return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
|
1248 |
} |
1249 |
|
1250 |
assert(mr->terminates); |
1251 |
|
1252 |
return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
|
1253 |
} |
1254 |
|
1255 |
static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as) |
1256 |
{ |
1257 |
FlatView *view; |
1258 |
FlatRange *fr; |
1259 |
CoalescedMemoryRange *cmr; |
1260 |
AddrRange tmp; |
1261 |
MemoryRegionSection section; |
1262 |
|
1263 |
view = address_space_get_flatview(as); |
1264 |
FOR_EACH_FLAT_RANGE(fr, view) { |
1265 |
if (fr->mr == mr) {
|
1266 |
section = (MemoryRegionSection) { |
1267 |
.address_space = as, |
1268 |
.offset_within_address_space = int128_get64(fr->addr.start), |
1269 |
.size = fr->addr.size, |
1270 |
}; |
1271 |
|
1272 |
MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, §ion, |
1273 |
int128_get64(fr->addr.start), |
1274 |
int128_get64(fr->addr.size)); |
1275 |
QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
1276 |
tmp = addrrange_shift(cmr->addr, |
1277 |
int128_sub(fr->addr.start, |
1278 |
int128_make64(fr->offset_in_region))); |
1279 |
if (!addrrange_intersects(tmp, fr->addr)) {
|
1280 |
continue;
|
1281 |
} |
1282 |
tmp = addrrange_intersection(tmp, fr->addr); |
1283 |
MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, §ion, |
1284 |
int128_get64(tmp.start), |
1285 |
int128_get64(tmp.size)); |
1286 |
} |
1287 |
} |
1288 |
} |
1289 |
flatview_unref(view); |
1290 |
} |
1291 |
|
1292 |
static void memory_region_update_coalesced_range(MemoryRegion *mr) |
1293 |
{ |
1294 |
AddressSpace *as; |
1295 |
|
1296 |
QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
1297 |
memory_region_update_coalesced_range_as(mr, as); |
1298 |
} |
1299 |
} |
1300 |
|
1301 |
void memory_region_set_coalescing(MemoryRegion *mr)
|
1302 |
{ |
1303 |
memory_region_clear_coalescing(mr); |
1304 |
memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
|
1305 |
} |
1306 |
|
1307 |
void memory_region_add_coalescing(MemoryRegion *mr,
|
1308 |
hwaddr offset, |
1309 |
uint64_t size) |
1310 |
{ |
1311 |
CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
|
1312 |
|
1313 |
cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
1314 |
QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
1315 |
memory_region_update_coalesced_range(mr); |
1316 |
memory_region_set_flush_coalesced(mr); |
1317 |
} |
1318 |
|
1319 |
void memory_region_clear_coalescing(MemoryRegion *mr)
|
1320 |
{ |
1321 |
CoalescedMemoryRange *cmr; |
1322 |
|
1323 |
qemu_flush_coalesced_mmio_buffer(); |
1324 |
mr->flush_coalesced_mmio = false;
|
1325 |
|
1326 |
while (!QTAILQ_EMPTY(&mr->coalesced)) {
|
1327 |
cmr = QTAILQ_FIRST(&mr->coalesced); |
1328 |
QTAILQ_REMOVE(&mr->coalesced, cmr, link); |
1329 |
g_free(cmr); |
1330 |
} |
1331 |
memory_region_update_coalesced_range(mr); |
1332 |
} |
1333 |
|
1334 |
void memory_region_set_flush_coalesced(MemoryRegion *mr)
|
1335 |
{ |
1336 |
mr->flush_coalesced_mmio = true;
|
1337 |
} |
1338 |
|
1339 |
void memory_region_clear_flush_coalesced(MemoryRegion *mr)
|
1340 |
{ |
1341 |
qemu_flush_coalesced_mmio_buffer(); |
1342 |
if (QTAILQ_EMPTY(&mr->coalesced)) {
|
1343 |
mr->flush_coalesced_mmio = false;
|
1344 |
} |
1345 |
} |
1346 |
|
1347 |
void memory_region_add_eventfd(MemoryRegion *mr,
|
1348 |
hwaddr addr, |
1349 |
unsigned size,
|
1350 |
bool match_data,
|
1351 |
uint64_t data, |
1352 |
EventNotifier *e) |
1353 |
{ |
1354 |
MemoryRegionIoeventfd mrfd = { |
1355 |
.addr.start = int128_make64(addr), |
1356 |
.addr.size = int128_make64(size), |
1357 |
.match_data = match_data, |
1358 |
.data = data, |
1359 |
.e = e, |
1360 |
}; |
1361 |
unsigned i;
|
1362 |
|
1363 |
adjust_endianness(mr, &mrfd.data, size); |
1364 |
memory_region_transaction_begin(); |
1365 |
for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1366 |
if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
|
1367 |
break;
|
1368 |
} |
1369 |
} |
1370 |
++mr->ioeventfd_nb; |
1371 |
mr->ioeventfds = g_realloc(mr->ioeventfds, |
1372 |
sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
|
1373 |
memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
|
1374 |
sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); |
1375 |
mr->ioeventfds[i] = mrfd; |
1376 |
memory_region_update_pending |= mr->enabled; |
1377 |
memory_region_transaction_commit(); |
1378 |
} |
1379 |
|
1380 |
void memory_region_del_eventfd(MemoryRegion *mr,
|
1381 |
hwaddr addr, |
1382 |
unsigned size,
|
1383 |
bool match_data,
|
1384 |
uint64_t data, |
1385 |
EventNotifier *e) |
1386 |
{ |
1387 |
MemoryRegionIoeventfd mrfd = { |
1388 |
.addr.start = int128_make64(addr), |
1389 |
.addr.size = int128_make64(size), |
1390 |
.match_data = match_data, |
1391 |
.data = data, |
1392 |
.e = e, |
1393 |
}; |
1394 |
unsigned i;
|
1395 |
|
1396 |
adjust_endianness(mr, &mrfd.data, size); |
1397 |
memory_region_transaction_begin(); |
1398 |
for (i = 0; i < mr->ioeventfd_nb; ++i) { |
1399 |
if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
|
1400 |
break;
|
1401 |
} |
1402 |
} |
1403 |
assert(i != mr->ioeventfd_nb); |
1404 |
memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
|
1405 |
sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); |
1406 |
--mr->ioeventfd_nb; |
1407 |
mr->ioeventfds = g_realloc(mr->ioeventfds, |
1408 |
sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
1409 |
memory_region_update_pending |= mr->enabled; |
1410 |
memory_region_transaction_commit(); |
1411 |
} |
1412 |
|
1413 |
static void memory_region_add_subregion_common(MemoryRegion *mr, |
1414 |
hwaddr offset, |
1415 |
MemoryRegion *subregion) |
1416 |
{ |
1417 |
MemoryRegion *other; |
1418 |
|
1419 |
memory_region_transaction_begin(); |
1420 |
|
1421 |
assert(!subregion->parent); |
1422 |
memory_region_ref(subregion); |
1423 |
subregion->parent = mr; |
1424 |
subregion->addr = offset; |
1425 |
QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
1426 |
if (subregion->may_overlap || other->may_overlap) {
|
1427 |
continue;
|
1428 |
} |
1429 |
if (int128_ge(int128_make64(offset),
|
1430 |
int128_add(int128_make64(other->addr), other->size)) |
1431 |
|| int128_le(int128_add(int128_make64(offset), subregion->size), |
1432 |
int128_make64(other->addr))) { |
1433 |
continue;
|
1434 |
} |
1435 |
#if 0
|
1436 |
printf("warning: subregion collision %llx/%llx (%s) "
|
1437 |
"vs %llx/%llx (%s)\n",
|
1438 |
(unsigned long long)offset,
|
1439 |
(unsigned long long)int128_get64(subregion->size),
|
1440 |
subregion->name,
|
1441 |
(unsigned long long)other->addr,
|
1442 |
(unsigned long long)int128_get64(other->size),
|
1443 |
other->name);
|
1444 |
#endif
|
1445 |
} |
1446 |
QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
1447 |
if (subregion->priority >= other->priority) {
|
1448 |
QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); |
1449 |
goto done;
|
1450 |
} |
1451 |
} |
1452 |
QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); |
1453 |
done:
|
1454 |
memory_region_update_pending |= mr->enabled && subregion->enabled; |
1455 |
memory_region_transaction_commit(); |
1456 |
} |
1457 |
|
1458 |
|
1459 |
void memory_region_add_subregion(MemoryRegion *mr,
|
1460 |
hwaddr offset, |
1461 |
MemoryRegion *subregion) |
1462 |
{ |
1463 |
subregion->may_overlap = false;
|
1464 |
subregion->priority = 0;
|
1465 |
memory_region_add_subregion_common(mr, offset, subregion); |
1466 |
} |
1467 |
|
1468 |
void memory_region_add_subregion_overlap(MemoryRegion *mr,
|
1469 |
hwaddr offset, |
1470 |
MemoryRegion *subregion, |
1471 |
int priority)
|
1472 |
{ |
1473 |
subregion->may_overlap = true;
|
1474 |
subregion->priority = priority; |
1475 |
memory_region_add_subregion_common(mr, offset, subregion); |
1476 |
} |
1477 |
|
1478 |
void memory_region_del_subregion(MemoryRegion *mr,
|
1479 |
MemoryRegion *subregion) |
1480 |
{ |
1481 |
memory_region_transaction_begin(); |
1482 |
assert(subregion->parent == mr); |
1483 |
subregion->parent = NULL;
|
1484 |
QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); |
1485 |
memory_region_unref(subregion); |
1486 |
memory_region_update_pending |= mr->enabled && subregion->enabled; |
1487 |
memory_region_transaction_commit(); |
1488 |
} |
1489 |
|
1490 |
void memory_region_set_enabled(MemoryRegion *mr, bool enabled) |
1491 |
{ |
1492 |
if (enabled == mr->enabled) {
|
1493 |
return;
|
1494 |
} |
1495 |
memory_region_transaction_begin(); |
1496 |
mr->enabled = enabled; |
1497 |
memory_region_update_pending = true;
|
1498 |
memory_region_transaction_commit(); |
1499 |
} |
1500 |
|
1501 |
void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
|
1502 |
{ |
1503 |
MemoryRegion *parent = mr->parent; |
1504 |
int priority = mr->priority;
|
1505 |
bool may_overlap = mr->may_overlap;
|
1506 |
|
1507 |
if (addr == mr->addr || !parent) {
|
1508 |
mr->addr = addr; |
1509 |
return;
|
1510 |
} |
1511 |
|
1512 |
memory_region_transaction_begin(); |
1513 |
memory_region_ref(mr); |
1514 |
memory_region_del_subregion(parent, mr); |
1515 |
if (may_overlap) {
|
1516 |
memory_region_add_subregion_overlap(parent, addr, mr, priority); |
1517 |
} else {
|
1518 |
memory_region_add_subregion(parent, addr, mr); |
1519 |
} |
1520 |
memory_region_unref(mr); |
1521 |
memory_region_transaction_commit(); |
1522 |
} |
1523 |
|
1524 |
void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
|
1525 |
{ |
1526 |
assert(mr->alias); |
1527 |
|
1528 |
if (offset == mr->alias_offset) {
|
1529 |
return;
|
1530 |
} |
1531 |
|
1532 |
memory_region_transaction_begin(); |
1533 |
mr->alias_offset = offset; |
1534 |
memory_region_update_pending |= mr->enabled; |
1535 |
memory_region_transaction_commit(); |
1536 |
} |
1537 |
|
1538 |
ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
1539 |
{ |
1540 |
return mr->ram_addr;
|
1541 |
} |
1542 |
|
1543 |
static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
1544 |
{ |
1545 |
const AddrRange *addr = addr_;
|
1546 |
const FlatRange *fr = fr_;
|
1547 |
|
1548 |
if (int128_le(addrrange_end(*addr), fr->addr.start)) {
|
1549 |
return -1; |
1550 |
} else if (int128_ge(addr->start, addrrange_end(fr->addr))) { |
1551 |
return 1; |
1552 |
} |
1553 |
return 0; |
1554 |
} |
1555 |
|
1556 |
static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
|
1557 |
{ |
1558 |
return bsearch(&addr, view->ranges, view->nr,
|
1559 |
sizeof(FlatRange), cmp_flatrange_addr);
|
1560 |
} |
1561 |
|
1562 |
bool memory_region_present(MemoryRegion *parent, hwaddr addr)
|
1563 |
{ |
1564 |
MemoryRegion *mr = memory_region_find(parent, addr, 1).mr;
|
1565 |
if (!mr) {
|
1566 |
return false; |
1567 |
} |
1568 |
memory_region_unref(mr); |
1569 |
return true; |
1570 |
} |
1571 |
|
1572 |
MemoryRegionSection memory_region_find(MemoryRegion *mr, |
1573 |
hwaddr addr, uint64_t size) |
1574 |
{ |
1575 |
MemoryRegionSection ret = { .mr = NULL };
|
1576 |
MemoryRegion *root; |
1577 |
AddressSpace *as; |
1578 |
AddrRange range; |
1579 |
FlatView *view; |
1580 |
FlatRange *fr; |
1581 |
|
1582 |
addr += mr->addr; |
1583 |
for (root = mr; root->parent; ) {
|
1584 |
root = root->parent; |
1585 |
addr += root->addr; |
1586 |
} |
1587 |
|
1588 |
as = memory_region_to_address_space(root); |
1589 |
range = addrrange_make(int128_make64(addr), int128_make64(size)); |
1590 |
|
1591 |
view = address_space_get_flatview(as); |
1592 |
fr = flatview_lookup(view, range); |
1593 |
if (!fr) {
|
1594 |
flatview_unref(view); |
1595 |
return ret;
|
1596 |
} |
1597 |
|
1598 |
while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { |
1599 |
--fr; |
1600 |
} |
1601 |
|
1602 |
ret.mr = fr->mr; |
1603 |
ret.address_space = as; |
1604 |
range = addrrange_intersection(range, fr->addr); |
1605 |
ret.offset_within_region = fr->offset_in_region; |
1606 |
ret.offset_within_region += int128_get64(int128_sub(range.start, |
1607 |
fr->addr.start)); |
1608 |
ret.size = range.size; |
1609 |
ret.offset_within_address_space = int128_get64(range.start); |
1610 |
ret.readonly = fr->readonly; |
1611 |
memory_region_ref(ret.mr); |
1612 |
|
1613 |
flatview_unref(view); |
1614 |
return ret;
|
1615 |
} |
1616 |
|
1617 |
void address_space_sync_dirty_bitmap(AddressSpace *as)
|
1618 |
{ |
1619 |
FlatView *view; |
1620 |
FlatRange *fr; |
1621 |
|
1622 |
view = address_space_get_flatview(as); |
1623 |
FOR_EACH_FLAT_RANGE(fr, view) { |
1624 |
MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync); |
1625 |
} |
1626 |
flatview_unref(view); |
1627 |
} |
1628 |
|
1629 |
void memory_global_dirty_log_start(void) |
1630 |
{ |
1631 |
global_dirty_log = true;
|
1632 |
MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
1633 |
} |
1634 |
|
1635 |
void memory_global_dirty_log_stop(void) |
1636 |
{ |
1637 |
global_dirty_log = false;
|
1638 |
MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
1639 |
} |
1640 |
|
1641 |
static void listener_add_address_space(MemoryListener *listener, |
1642 |
AddressSpace *as) |
1643 |
{ |
1644 |
FlatView *view; |
1645 |
FlatRange *fr; |
1646 |
|
1647 |
if (listener->address_space_filter
|
1648 |
&& listener->address_space_filter != as) { |
1649 |
return;
|
1650 |
} |
1651 |
|
1652 |
if (global_dirty_log) {
|
1653 |
if (listener->log_global_start) {
|
1654 |
listener->log_global_start(listener); |
1655 |
} |
1656 |
} |
1657 |
|
1658 |
view = address_space_get_flatview(as); |
1659 |
FOR_EACH_FLAT_RANGE(fr, view) { |
1660 |
MemoryRegionSection section = { |
1661 |
.mr = fr->mr, |
1662 |
.address_space = as, |
1663 |
.offset_within_region = fr->offset_in_region, |
1664 |
.size = fr->addr.size, |
1665 |
.offset_within_address_space = int128_get64(fr->addr.start), |
1666 |
.readonly = fr->readonly, |
1667 |
}; |
1668 |
if (listener->region_add) {
|
1669 |
listener->region_add(listener, §ion); |
1670 |
} |
1671 |
} |
1672 |
flatview_unref(view); |
1673 |
} |
1674 |
|
1675 |
void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
|
1676 |
{ |
1677 |
MemoryListener *other = NULL;
|
1678 |
AddressSpace *as; |
1679 |
|
1680 |
listener->address_space_filter = filter; |
1681 |
if (QTAILQ_EMPTY(&memory_listeners)
|
1682 |
|| listener->priority >= QTAILQ_LAST(&memory_listeners, |
1683 |
memory_listeners)->priority) { |
1684 |
QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); |
1685 |
} else {
|
1686 |
QTAILQ_FOREACH(other, &memory_listeners, link) { |
1687 |
if (listener->priority < other->priority) {
|
1688 |
break;
|
1689 |
} |
1690 |
} |
1691 |
QTAILQ_INSERT_BEFORE(other, listener, link); |
1692 |
} |
1693 |
|
1694 |
QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
1695 |
listener_add_address_space(listener, as); |
1696 |
} |
1697 |
} |
1698 |
|
1699 |
void memory_listener_unregister(MemoryListener *listener)
|
1700 |
{ |
1701 |
QTAILQ_REMOVE(&memory_listeners, listener, link); |
1702 |
} |
1703 |
|
1704 |
void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1705 |
{ |
1706 |
if (QTAILQ_EMPTY(&address_spaces)) {
|
1707 |
memory_init(); |
1708 |
} |
1709 |
|
1710 |
memory_region_transaction_begin(); |
1711 |
as->root = root; |
1712 |
as->current_map = g_new(FlatView, 1);
|
1713 |
flatview_init(as->current_map); |
1714 |
as->ioeventfd_nb = 0;
|
1715 |
as->ioeventfds = NULL;
|
1716 |
QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
1717 |
as->name = g_strdup(name ? name : "anonymous");
|
1718 |
address_space_init_dispatch(as); |
1719 |
memory_region_update_pending |= root->enabled; |
1720 |
memory_region_transaction_commit(); |
1721 |
} |
1722 |
|
1723 |
void address_space_destroy(AddressSpace *as)
|
1724 |
{ |
1725 |
/* Flush out anything from MemoryListeners listening in on this */
|
1726 |
memory_region_transaction_begin(); |
1727 |
as->root = NULL;
|
1728 |
memory_region_transaction_commit(); |
1729 |
QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); |
1730 |
address_space_destroy_dispatch(as); |
1731 |
flatview_unref(as->current_map); |
1732 |
g_free(as->name); |
1733 |
g_free(as->ioeventfds); |
1734 |
} |
1735 |
|
1736 |
bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size) |
1737 |
{ |
1738 |
return memory_region_dispatch_read(mr, addr, pval, size);
|
1739 |
} |
1740 |
|
1741 |
bool io_mem_write(MemoryRegion *mr, hwaddr addr,
|
1742 |
uint64_t val, unsigned size)
|
1743 |
{ |
1744 |
return memory_region_dispatch_write(mr, addr, val, size);
|
1745 |
} |
1746 |
|
1747 |
typedef struct MemoryRegionList MemoryRegionList; |
1748 |
|
1749 |
struct MemoryRegionList {
|
1750 |
const MemoryRegion *mr;
|
1751 |
bool printed;
|
1752 |
QTAILQ_ENTRY(MemoryRegionList) queue; |
1753 |
}; |
1754 |
|
1755 |
typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
|
1756 |
|
1757 |
static void mtree_print_mr(fprintf_function mon_printf, void *f, |
1758 |
const MemoryRegion *mr, unsigned int level, |
1759 |
hwaddr base, |
1760 |
MemoryRegionListHead *alias_print_queue) |
1761 |
{ |
1762 |
MemoryRegionList *new_ml, *ml, *next_ml; |
1763 |
MemoryRegionListHead submr_print_queue; |
1764 |
const MemoryRegion *submr;
|
1765 |
unsigned int i; |
1766 |
|
1767 |
if (!mr || !mr->enabled) {
|
1768 |
return;
|
1769 |
} |
1770 |
|
1771 |
for (i = 0; i < level; i++) { |
1772 |
mon_printf(f, " ");
|
1773 |
} |
1774 |
|
1775 |
if (mr->alias) {
|
1776 |
MemoryRegionList *ml; |
1777 |
bool found = false; |
1778 |
|
1779 |
/* check if the alias is already in the queue */
|
1780 |
QTAILQ_FOREACH(ml, alias_print_queue, queue) { |
1781 |
if (ml->mr == mr->alias && !ml->printed) {
|
1782 |
found = true;
|
1783 |
} |
1784 |
} |
1785 |
|
1786 |
if (!found) {
|
1787 |
ml = g_new(MemoryRegionList, 1);
|
1788 |
ml->mr = mr->alias; |
1789 |
ml->printed = false;
|
1790 |
QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue); |
1791 |
} |
1792 |
mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
|
1793 |
" (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
|
1794 |
"-" TARGET_FMT_plx "\n", |
1795 |
base + mr->addr, |
1796 |
base + mr->addr |
1797 |
+ (int128_nz(mr->size) ? |
1798 |
(hwaddr)int128_get64(int128_sub(mr->size, |
1799 |
int128_one())) : 0),
|
1800 |
mr->priority, |
1801 |
mr->romd_mode ? 'R' : '-', |
1802 |
!mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
|
1803 |
: '-',
|
1804 |
mr->name, |
1805 |
mr->alias->name, |
1806 |
mr->alias_offset, |
1807 |
mr->alias_offset |
1808 |
+ (int128_nz(mr->size) ? |
1809 |
(hwaddr)int128_get64(int128_sub(mr->size, |
1810 |
int128_one())) : 0));
|
1811 |
} else {
|
1812 |
mon_printf(f, |
1813 |
TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n", |
1814 |
base + mr->addr, |
1815 |
base + mr->addr |
1816 |
+ (int128_nz(mr->size) ? |
1817 |
(hwaddr)int128_get64(int128_sub(mr->size, |
1818 |
int128_one())) : 0),
|
1819 |
mr->priority, |
1820 |
mr->romd_mode ? 'R' : '-', |
1821 |
!mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
|
1822 |
: '-',
|
1823 |
mr->name); |
1824 |
} |
1825 |
|
1826 |
QTAILQ_INIT(&submr_print_queue); |
1827 |
|
1828 |
QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
1829 |
new_ml = g_new(MemoryRegionList, 1);
|
1830 |
new_ml->mr = submr; |
1831 |
QTAILQ_FOREACH(ml, &submr_print_queue, queue) { |
1832 |
if (new_ml->mr->addr < ml->mr->addr ||
|
1833 |
(new_ml->mr->addr == ml->mr->addr && |
1834 |
new_ml->mr->priority > ml->mr->priority)) { |
1835 |
QTAILQ_INSERT_BEFORE(ml, new_ml, queue); |
1836 |
new_ml = NULL;
|
1837 |
break;
|
1838 |
} |
1839 |
} |
1840 |
if (new_ml) {
|
1841 |
QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue); |
1842 |
} |
1843 |
} |
1844 |
|
1845 |
QTAILQ_FOREACH(ml, &submr_print_queue, queue) { |
1846 |
mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
|
1847 |
alias_print_queue); |
1848 |
} |
1849 |
|
1850 |
QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) { |
1851 |
g_free(ml); |
1852 |
} |
1853 |
} |
1854 |
|
1855 |
void mtree_info(fprintf_function mon_printf, void *f) |
1856 |
{ |
1857 |
MemoryRegionListHead ml_head; |
1858 |
MemoryRegionList *ml, *ml2; |
1859 |
AddressSpace *as; |
1860 |
|
1861 |
QTAILQ_INIT(&ml_head); |
1862 |
|
1863 |
QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
1864 |
mon_printf(f, "%s\n", as->name);
|
1865 |
mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head); |
1866 |
} |
1867 |
|
1868 |
mon_printf(f, "aliases\n");
|
1869 |
/* print aliased regions */
|
1870 |
QTAILQ_FOREACH(ml, &ml_head, queue) { |
1871 |
if (!ml->printed) {
|
1872 |
mon_printf(f, "%s\n", ml->mr->name);
|
1873 |
mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head); |
1874 |
} |
1875 |
} |
1876 |
|
1877 |
QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) { |
1878 |
g_free(ml); |
1879 |
} |
1880 |
} |