Statistics
| Branch: | Revision:

root / target-mips @ feature-archipelago

Name Size
Makefile.objs 128 Bytes
TODO 1.9 kB
cpu-qom.h 2.2 kB
cpu.c 3.3 kB
cpu.h 24.2 kB
dsp_helper.c 135 kB
gdbstub.c 4.4 kB
helper.c 22.2 kB
helper.h 27.4 kB
lmi_helper.c 14 kB
machine.c 10.6 kB
mips-defs.h 2.4 kB
op_helper.c 104.2 kB
translate.c 476.7 kB
translate_init.c 26.5 kB

Latest revisions

# Date Author Comment
736d120a 02/10/2014 05:46 pm Petar Jovanovic

target-mips: add user-mode FR switch support for MIPS32r5

Description of UFR feature:

Required in MIPS32r5 if floating point is implemented and user-mode FR
switching is supported. The UFR register allows user-mode to clear StatusFR
by executing a CTC1 to UFR with GPR0 as input, and read StatusFR by...

b4dd99a3 02/10/2014 05:46 pm Petar Jovanovic

target-mips: add support for CP0_Config5

Add CP0_Config5, define rw_bitmask and enable modifications.

Signed-off-by: Petar Jovanovic <>
Reviewed-by: Eric Johnson <>

b4160af1 02/10/2014 05:46 pm Petar Jovanovic

target-mips: add support for CP0_Config4

Add CP0_Config4, define rw_bitmask.

Signed-off-by: Petar Jovanovic <>
Reviewed-by: Eric Johnson <>

e527526d 02/10/2014 05:45 pm Petar Jovanovic

target-mips: add CPU definition for MIPS32R5

Add mips32r5-generic among CPU definitions for MIPS.
Define ISA_MIPS32R3 and ISA_MIPS32R5.

Signed-off-by: Petar Jovanovic <>
Reviewed-by: Eric Johnson <>

5f68f5ae 12/21/2013 05:42 pm Aurelien Jarno

target-mips: Use new qemu_ld/st opcodes

Reviewed-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>

8f84271d 12/09/2013 05:44 pm Stefan Weil

target-mips: Use macro ARRAY_SIZE where possible

This improves readability and simplifies the code.

Cc: Aurelien Jarno <>
Signed-off-by: Stefan Weil <>
Signed-off-by: Aurelien Jarno <>

4d66261f 12/09/2013 05:41 pm Petar Jovanovic

target-mips: fix 64-bit FPU config for user-mode emulation

FR bit should be initialized to 1 for MIPS64, under condition that this
bit is writable and that CPU has an FPU unit. It should be initialized to
zero for MIPS32.
This fixes different MIPS32 issues with FPU instructions whose behaviour...

1246b259 12/02/2013 07:03 pm Stefan Weil

misc: Replace 'struct QEMUTimer' by 'QEMUTimer'

Most code already used QEMUTimer without the redundant 'struct' keyword.

Signed-off-by: Stefan Weil <>
Reviewed-by: Andreas Färber <>
Signed-off-by: Michael Tokarev <>

ab1eb72b 10/11/2013 07:36 pm Anthony Liguori

Merge remote-tracking branch 'rth/tcg-pull' into staging

  1. By Richard Henderson
  2. Via Richard Henderson
    • rth/tcg-pull:
      exec: Add both big- and little-endian memory helpers
      tcg: Add qemu_ld_st_i32/64
      tcg: Add TCGMemOp
      configure: Remove CONFIG_QEMU_LDST_OPTIMIZATION...
f5daeec4 10/10/2013 09:43 pm Richard Henderson

tcg: Remove stray semi-colons from target-*/helper.h

During GEN_HELPER=1, these are actually stray top-level semi-colons
which are technically invalid ISO C, but GCC accepts as an extension.
If we added enough extension markers that we could dare use...

View revisions

Also available in: Atom