Revision ffec44f1 target-alpha/translate.c
| b/target-alpha/translate.c | ||
|---|---|---|
| 579 | 579 |
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| 580 | 580 |
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| 581 | 581 |
/* EXTWH, EXTLH, EXTQH */ |
| 582 |
static inline void gen_ext_h(int ra, int rb, int rc, int islit,
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| 583 |
uint8_t lit, uint8_t byte_mask)
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| 582 |
static void gen_ext_h(int ra, int rb, int rc, int islit, |
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| 583 |
uint8_t lit, uint8_t byte_mask) |
|
| 584 | 584 |
{
|
| 585 | 585 |
if (unlikely(rc == 31)) |
| 586 | 586 |
return; |
| ... | ... | |
| 604 | 604 |
} |
| 605 | 605 |
|
| 606 | 606 |
/* EXTBL, EXTWL, EXTLL, EXTQL */ |
| 607 |
static inline void gen_ext_l(int ra, int rb, int rc, int islit,
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| 608 |
uint8_t lit, uint8_t byte_mask)
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| 607 |
static void gen_ext_l(int ra, int rb, int rc, int islit, |
|
| 608 |
uint8_t lit, uint8_t byte_mask) |
|
| 609 | 609 |
{
|
| 610 | 610 |
if (unlikely(rc == 31)) |
| 611 | 611 |
return; |
| ... | ... | |
| 626 | 626 |
} |
| 627 | 627 |
|
| 628 | 628 |
/* INSBL, INSWL, INSLL, INSQL */ |
| 629 |
static inline void gen_ins_l(int ra, int rb, int rc, int islit,
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| 630 |
uint8_t lit, uint8_t byte_mask)
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| 629 |
static void gen_ins_l(int ra, int rb, int rc, int islit, |
|
| 630 |
uint8_t lit, uint8_t byte_mask) |
|
| 631 | 631 |
{
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| 632 | 632 |
if (unlikely(rc == 31)) |
| 633 | 633 |
return; |
| ... | ... | |
| 655 | 655 |
} |
| 656 | 656 |
} |
| 657 | 657 |
|
| 658 |
/* MSKWH, MSKLH, MSKQH */ |
|
| 659 |
static void gen_msk_h(int ra, int rb, int rc, int islit, |
|
| 660 |
uint8_t lit, uint8_t byte_mask) |
|
| 661 |
{
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|
| 662 |
if (unlikely(rc == 31)) |
|
| 663 |
return; |
|
| 664 |
else if (unlikely(ra == 31)) |
|
| 665 |
tcg_gen_movi_i64(cpu_ir[rc], 0); |
|
| 666 |
else if (islit) {
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|
| 667 |
gen_zapnoti (cpu_ir[rc], cpu_ir[ra], ~((byte_mask << (lit & 7)) >> 8)); |
|
| 668 |
} else {
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| 669 |
TCGv shift = tcg_temp_new(); |
|
| 670 |
TCGv mask = tcg_temp_new(); |
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| 671 |
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| 672 |
/* The instruction description is as above, where the byte_mask |
|
| 673 |
is shifted left, and then we extract bits <15:8>. This can be |
|
| 674 |
emulated with a right-shift on the expanded byte mask. This |
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| 675 |
requires extra care because for an input <2:0> == 0 we need a |
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| 676 |
shift of 64 bits in order to generate a zero. This is done by |
|
| 677 |
splitting the shift into two parts, the variable shift - 1 |
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| 678 |
followed by a constant 1 shift. The code we expand below is |
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| 679 |
equivalent to ~((B & 7) * 8) & 63. */ |
|
| 680 |
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| 681 |
tcg_gen_andi_i64(shift, cpu_ir[rb], 7); |
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| 682 |
tcg_gen_shli_i64(shift, shift, 3); |
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| 683 |
tcg_gen_not_i64(shift, shift); |
|
| 684 |
tcg_gen_andi_i64(shift, shift, 0x3f); |
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| 685 |
tcg_gen_movi_i64(mask, zapnot_mask (byte_mask)); |
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| 686 |
tcg_gen_shr_i64(mask, mask, shift); |
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| 687 |
tcg_gen_shri_i64(mask, mask, 1); |
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| 688 |
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| 689 |
tcg_gen_andc_i64(cpu_ir[rc], cpu_ir[ra], mask); |
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| 690 |
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| 691 |
tcg_temp_free(mask); |
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| 692 |
tcg_temp_free(shift); |
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| 693 |
} |
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| 694 |
} |
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| 695 |
|
|
| 658 | 696 |
/* MSKBL, MSKWL, MSKLL, MSKQL */ |
| 659 |
static inline void gen_msk_l(int ra, int rb, int rc, int islit,
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| 660 |
uint8_t lit, uint8_t byte_mask)
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| 697 |
static void gen_msk_l(int ra, int rb, int rc, int islit, |
|
| 698 |
uint8_t lit, uint8_t byte_mask) |
|
| 661 | 699 |
{
|
| 662 | 700 |
if (unlikely(rc == 31)) |
| 663 | 701 |
return; |
| ... | ... | |
| 712 | 750 |
ARITH3(sublv) |
| 713 | 751 |
ARITH3(addqv) |
| 714 | 752 |
ARITH3(subqv) |
| 715 |
ARITH3(mskwh) |
|
| 716 | 753 |
ARITH3(inswh) |
| 717 |
ARITH3(msklh) |
|
| 718 | 754 |
ARITH3(inslh) |
| 719 |
ARITH3(mskqh) |
|
| 720 | 755 |
ARITH3(insqh) |
| 721 | 756 |
ARITH3(umulh) |
| 722 | 757 |
ARITH3(mullv) |
| ... | ... | |
| 1440 | 1475 |
break; |
| 1441 | 1476 |
case 0x52: |
| 1442 | 1477 |
/* MSKWH */ |
| 1443 |
gen_mskwh(ra, rb, rc, islit, lit);
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|
| 1478 |
gen_msk_h(ra, rb, rc, islit, lit, 0x03);
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|
| 1444 | 1479 |
break; |
| 1445 | 1480 |
case 0x57: |
| 1446 | 1481 |
/* INSWH */ |
| ... | ... | |
| 1452 | 1487 |
break; |
| 1453 | 1488 |
case 0x62: |
| 1454 | 1489 |
/* MSKLH */ |
| 1455 |
gen_msklh(ra, rb, rc, islit, lit);
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|
| 1490 |
gen_msk_h(ra, rb, rc, islit, lit, 0x0f);
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|
| 1456 | 1491 |
break; |
| 1457 | 1492 |
case 0x67: |
| 1458 | 1493 |
/* INSLH */ |
| ... | ... | |
| 1464 | 1499 |
break; |
| 1465 | 1500 |
case 0x72: |
| 1466 | 1501 |
/* MSKQH */ |
| 1467 |
gen_mskqh(ra, rb, rc, islit, lit);
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|
| 1502 |
gen_msk_h(ra, rb, rc, islit, lit, 0xff);
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|
| 1468 | 1503 |
break; |
| 1469 | 1504 |
case 0x77: |
| 1470 | 1505 |
/* INSQH */ |
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