Revision 0077147e
| b/hw/omap_i2c.c | ||
|---|---|---|
| 24 | 24 |
struct omap_i2c_s {
|
| 25 | 25 |
qemu_irq irq; |
| 26 | 26 |
qemu_irq drq[2]; |
| 27 |
i2c_slave slave; |
|
| 28 | 27 |
i2c_bus *bus; |
| 29 | 28 |
|
| 30 | 29 |
uint8_t revision; |
| ... | ... | |
| 55 | 54 |
qemu_set_irq(s->drq[1], (s->stat >> 4) & 1); /* XRDY */ |
| 56 | 55 |
} |
| 57 | 56 |
|
| 58 |
/* These are only stubs now. */ |
|
| 59 |
static void omap_i2c_event(i2c_slave *i2c, enum i2c_event event) |
|
| 60 |
{
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struct omap_i2c_s *s = (struct omap_i2c_s *) i2c; |
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| 62 |
|
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if ((~s->control >> 15) & 1) /* I2C_EN */ |
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| 64 |
return; |
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| 65 |
|
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| 66 |
switch (event) {
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| 67 |
case I2C_START_SEND: |
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| 68 |
case I2C_START_RECV: |
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| 69 |
s->stat |= 1 << 9; /* AAS */ |
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| 70 |
break; |
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| 71 |
case I2C_FINISH: |
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s->stat |= 1 << 2; /* ARDY */ |
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break; |
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| 74 |
case I2C_NACK: |
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s->stat |= 1 << 1; /* NACK */ |
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break; |
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| 77 |
} |
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| 78 |
|
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omap_i2c_interrupts_update(s); |
|
| 80 |
} |
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| 81 |
|
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static int omap_i2c_rx(i2c_slave *i2c) |
|
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{
|
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struct omap_i2c_s *s = (struct omap_i2c_s *) i2c; |
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uint8_t ret = 0; |
|
| 86 |
|
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if ((~s->control >> 15) & 1) /* I2C_EN */ |
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return -1; |
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| 89 |
|
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| 90 |
if (s->txlen) |
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ret = s->fifo >> ((-- s->txlen) << 3) & 0xff; |
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| 92 |
else |
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s->stat |= 1 << 10; /* XUDF */ |
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s->stat |= 1 << 4; /* XRDY */ |
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|
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omap_i2c_interrupts_update(s); |
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return ret; |
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} |
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|
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static int omap_i2c_tx(i2c_slave *i2c, uint8_t data) |
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{
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struct omap_i2c_s *s = (struct omap_i2c_s *) i2c; |
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|
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if ((~s->control >> 15) & 1) /* I2C_EN */ |
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return 1; |
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| 106 |
|
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if (s->rxlen < 4) |
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s->fifo |= data << ((s->rxlen ++) << 3); |
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else |
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s->stat |= 1 << 11; /* ROVR */ |
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s->stat |= 1 << 3; /* RRDY */ |
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omap_i2c_interrupts_update(s); |
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return 1; |
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} |
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|
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| 117 | 57 |
static void omap_i2c_fifo_run(struct omap_i2c_s *s) |
| 118 | 58 |
{
|
| 119 | 59 |
int ack = 1; |
| ... | ... | |
| 406 | 346 |
|
| 407 | 347 |
case 0x28: /* I2C_OA */ |
| 408 | 348 |
s->addr[0] = value & 0x3ff; |
| 409 |
i2c_set_slave_address(&s->slave, value & 0x7f); |
|
| 410 | 349 |
break; |
| 411 | 350 |
|
| 412 | 351 |
case 0x2c: /* I2C_SA */ |
| ... | ... | |
| 494 | 433 |
s->irq = irq; |
| 495 | 434 |
s->drq[0] = dma[0]; |
| 496 | 435 |
s->drq[1] = dma[1]; |
| 497 |
s->slave.event = omap_i2c_event; |
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s->slave.recv = omap_i2c_rx; |
|
| 499 |
s->slave.send = omap_i2c_tx; |
|
| 500 | 436 |
s->bus = i2c_init_bus(); |
| 501 | 437 |
omap_i2c_reset(s); |
| 502 | 438 |
|
| ... | ... | |
| 518 | 454 |
s->irq = irq; |
| 519 | 455 |
s->drq[0] = dma[0]; |
| 520 | 456 |
s->drq[1] = dma[1]; |
| 521 |
s->slave.event = omap_i2c_event; |
|
| 522 |
s->slave.recv = omap_i2c_rx; |
|
| 523 |
s->slave.send = omap_i2c_tx; |
|
| 524 | 457 |
s->bus = i2c_init_bus(); |
| 525 | 458 |
omap_i2c_reset(s); |
| 526 | 459 |
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