Revision 01195b73

b/Makefile.target
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obj-i386-$(CONFIG_XEN_MAPCACHE) += xen-mapcache.o
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obj-$(CONFIG_NO_XEN_MAPCACHE) += xen-mapcache-stub.o
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obj-i386-$(CONFIG_XEN) += xen_platform.o
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# Inter-VM PCI shared memory
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CONFIG_IVSHMEM =
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ifeq ($(CONFIG_KVM), y)
b/hw/hw.h
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#define VMSTATE_INT32_LE(_f, _s)                                   \
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    VMSTATE_SINGLE(_f, _s, 0, vmstate_info_int32_le, int32_t)
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#define VMSTATE_UINT8_TEST(_f, _s, _t)                               \
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    VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_info_uint8, uint8_t)
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#define VMSTATE_UINT16_TEST(_f, _s, _t)                               \
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    VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_info_uint16, uint16_t)
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b/hw/pc_piix.c
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    pc_vga_init(pci_enabled? pci_bus: NULL);
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    if (xen_enabled()) {
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        pci_create_simple(pci_bus, -1, "xen-platform");
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    }
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    /* init basic PC hardware */
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    pc_basic_device_init(isa_irq, &rtc_state, xen_enabled());
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b/hw/pci_ids.h
109 109
#define PCI_DEVICE_ID_INTEL_82371AB      0x7111
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#define PCI_DEVICE_ID_INTEL_82371AB_2    0x7112
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#define PCI_DEVICE_ID_INTEL_82371AB_3    0x7113
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#define PCI_VENDOR_ID_XENSOURCE          0x5853
b/hw/xen_platform.c
1
/*
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 * XEN platform pci device, formerly known as the event channel device
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 *
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 * Copyright (c) 2003-2004 Intel Corp.
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 * Copyright (c) 2006 XenSource
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include <assert.h>
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#include "hw.h"
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#include "pc.h"
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#include "pci.h"
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#include "irq.h"
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#include "xen_common.h"
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#include "net.h"
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#include "xen_backend.h"
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#include "rwhandler.h"
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#include "trace.h"
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#include <xenguest.h>
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//#define DEBUG_PLATFORM
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#ifdef DEBUG_PLATFORM
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#define DPRINTF(fmt, ...) do { \
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    fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \
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} while (0)
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#else
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#define DPRINTF(fmt, ...) do { } while (0)
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#endif
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#define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */
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typedef struct PCIXenPlatformState {
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    PCIDevice  pci_dev;
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    uint8_t flags; /* used only for version_id == 2 */
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    int drivers_blacklisted;
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    uint16_t driver_product_version;
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    /* Log from guest drivers */
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    char log_buffer[4096];
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    int log_buffer_off;
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} PCIXenPlatformState;
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#define XEN_PLATFORM_IOPORT 0x10
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/* Send bytes to syslog */
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static void log_writeb(PCIXenPlatformState *s, char val)
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{
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    if (val == '\n' || s->log_buffer_off == sizeof(s->log_buffer) - 1) {
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        /* Flush buffer */
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        s->log_buffer[s->log_buffer_off] = 0;
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        trace_xen_platform_log(s->log_buffer);
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        s->log_buffer_off = 0;
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    } else {
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        s->log_buffer[s->log_buffer_off++] = val;
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    }
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}
77

  
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/* Xen Platform, Fixed IOPort */
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static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
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{
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    PCIXenPlatformState *s = opaque;
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    switch (addr - XEN_PLATFORM_IOPORT) {
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    case 0:
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        /* TODO: */
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        /* Unplug devices.  Value is a bitmask of which devices to
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           unplug, with bit 0 the IDE devices, bit 1 the network
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           devices, and bit 2 the non-primary-master IDE devices. */
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        break;
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    case 2:
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        switch (val) {
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        case 1:
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            DPRINTF("Citrix Windows PV drivers loaded in guest\n");
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            break;
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        case 0:
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            DPRINTF("Guest claimed to be running PV product 0?\n");
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            break;
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        default:
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            DPRINTF("Unknown PV product %d loaded in guest\n", val);
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            break;
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        }
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        s->driver_product_version = val;
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        break;
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    }
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}
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static void platform_fixed_ioport_writel(void *opaque, uint32_t addr,
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                                         uint32_t val)
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{
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    switch (addr - XEN_PLATFORM_IOPORT) {
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    case 0:
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        /* PV driver version */
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        break;
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    }
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}
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static void platform_fixed_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
119
{
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    PCIXenPlatformState *s = opaque;
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    switch (addr - XEN_PLATFORM_IOPORT) {
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    case 0: /* Platform flags */ {
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        hvmmem_type_t mem_type = (val & PFFLAG_ROM_LOCK) ?
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            HVMMEM_ram_ro : HVMMEM_ram_rw;
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        if (xc_hvm_set_mem_type(xen_xc, xen_domid, mem_type, 0xc0, 0x40)) {
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            DPRINTF("unable to change ro/rw state of ROM memory area!\n");
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        } else {
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            s->flags = val & PFFLAG_ROM_LOCK;
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            DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n",
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                    (mem_type == HVMMEM_ram_ro ? "ro":"rw"));
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        }
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        break;
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    }
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    case 2:
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        log_writeb(s, val);
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        break;
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    }
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}
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static uint32_t platform_fixed_ioport_readw(void *opaque, uint32_t addr)
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{
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    PCIXenPlatformState *s = opaque;
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    switch (addr - XEN_PLATFORM_IOPORT) {
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    case 0:
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        if (s->drivers_blacklisted) {
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            /* The drivers will recognise this magic number and refuse
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             * to do anything. */
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            return 0xd249;
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        } else {
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            /* Magic value so that you can identify the interface. */
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            return 0x49d2;
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        }
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    default:
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        return 0xffff;
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    }
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}
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static uint32_t platform_fixed_ioport_readb(void *opaque, uint32_t addr)
161
{
162
    PCIXenPlatformState *s = opaque;
163

  
164
    switch (addr - XEN_PLATFORM_IOPORT) {
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    case 0:
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        /* Platform flags */
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        return s->flags;
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    case 2:
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        /* Version number */
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        return 1;
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    default:
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        return 0xff;
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    }
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}
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static void platform_fixed_ioport_reset(void *opaque)
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{
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    PCIXenPlatformState *s = opaque;
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    platform_fixed_ioport_writeb(s, XEN_PLATFORM_IOPORT, 0);
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}
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static void platform_fixed_ioport_init(PCIXenPlatformState* s)
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{
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    register_ioport_write(XEN_PLATFORM_IOPORT, 16, 4, platform_fixed_ioport_writel, s);
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    register_ioport_write(XEN_PLATFORM_IOPORT, 16, 2, platform_fixed_ioport_writew, s);
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    register_ioport_write(XEN_PLATFORM_IOPORT, 16, 1, platform_fixed_ioport_writeb, s);
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    register_ioport_read(XEN_PLATFORM_IOPORT, 16, 2, platform_fixed_ioport_readw, s);
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    register_ioport_read(XEN_PLATFORM_IOPORT, 16, 1, platform_fixed_ioport_readb, s);
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}
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/* Xen Platform PCI Device */
193

  
194
static uint32_t xen_platform_ioport_readb(void *opaque, uint32_t addr)
195
{
196
    addr &= 0xff;
197

  
198
    if (addr == 0) {
199
        return platform_fixed_ioport_readb(opaque, XEN_PLATFORM_IOPORT);
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    } else {
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        return ~0u;
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    }
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}
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205
static void xen_platform_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
206
{
207
    PCIXenPlatformState *s = opaque;
208

  
209
    addr &= 0xff;
210
    val  &= 0xff;
211

  
212
    switch (addr) {
213
    case 0: /* Platform flags */
214
        platform_fixed_ioport_writeb(opaque, XEN_PLATFORM_IOPORT, val);
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        break;
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    case 8:
217
        log_writeb(s, val);
218
        break;
219
    default:
220
        break;
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    }
222
}
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224
static void platform_ioport_map(PCIDevice *pci_dev, int region_num, pcibus_t addr, pcibus_t size, int type)
225
{
226
    PCIXenPlatformState *d = DO_UPCAST(PCIXenPlatformState, pci_dev, pci_dev);
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228
    register_ioport_write(addr, size, 1, xen_platform_ioport_writeb, d);
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    register_ioport_read(addr, size, 1, xen_platform_ioport_readb, d);
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}
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static uint32_t platform_mmio_read(ReadWriteHandler *handler, pcibus_t addr, int len)
233
{
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    DPRINTF("Warning: attempted read from physical address "
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            "0x" TARGET_FMT_plx " in xen platform mmio space\n", addr);
236

  
237
    return 0;
238
}
239

  
240
static void platform_mmio_write(ReadWriteHandler *handler, pcibus_t addr,
241
                                uint32_t val, int len)
242
{
243
    DPRINTF("Warning: attempted write of 0x%x to physical "
244
            "address 0x" TARGET_FMT_plx " in xen platform mmio space\n",
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            val, addr);
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}
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static ReadWriteHandler platform_mmio_handler = {
249
    .read = &platform_mmio_read,
250
    .write = &platform_mmio_write,
251
};
252

  
253
static void platform_mmio_map(PCIDevice *d, int region_num,
254
                              pcibus_t addr, pcibus_t size, int type)
255
{
256
    int mmio_io_addr;
257

  
258
    mmio_io_addr = cpu_register_io_memory_simple(&platform_mmio_handler,
259
                                                 DEVICE_NATIVE_ENDIAN);
260

  
261
    cpu_register_physical_memory(addr, size, mmio_io_addr);
262
}
263

  
264
static int xen_platform_post_load(void *opaque, int version_id)
265
{
266
    PCIXenPlatformState *s = opaque;
267

  
268
    platform_fixed_ioport_writeb(s, XEN_PLATFORM_IOPORT, s->flags);
269

  
270
    return 0;
271
}
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273
static const VMStateDescription vmstate_xen_platform = {
274
    .name = "platform",
275
    .version_id = 4,
276
    .minimum_version_id = 4,
277
    .minimum_version_id_old = 4,
278
    .post_load = xen_platform_post_load,
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    .fields = (VMStateField []) {
280
        VMSTATE_PCI_DEVICE(pci_dev, PCIXenPlatformState),
281
        VMSTATE_UINT8(flags, PCIXenPlatformState),
282
        VMSTATE_END_OF_LIST()
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    }
284
};
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286
static int xen_platform_initfn(PCIDevice *dev)
287
{
288
    PCIXenPlatformState *d = DO_UPCAST(PCIXenPlatformState, pci_dev, dev);
289
    uint8_t *pci_conf;
290

  
291
    pci_conf = d->pci_dev.config;
292

  
293
    pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_XENSOURCE);
294
    pci_config_set_device_id(pci_conf, 0x0001);
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    pci_set_word(pci_conf + PCI_SUBSYSTEM_VENDOR_ID, PCI_VENDOR_ID_XENSOURCE);
296
    pci_set_word(pci_conf + PCI_SUBSYSTEM_ID, 0x0001);
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298
    pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
299

  
300
    pci_config_set_revision(pci_conf, 1);
301
    pci_config_set_prog_interface(pci_conf, 0);
302

  
303
    pci_config_set_class(pci_conf, PCI_CLASS_OTHERS << 8 | 0x80);
304

  
305
    pci_conf[PCI_INTERRUPT_PIN] = 1;
306

  
307
    pci_register_bar(&d->pci_dev, 0, 0x100,
308
            PCI_BASE_ADDRESS_SPACE_IO, platform_ioport_map);
309

  
310
    /* reserve 16MB mmio address for share memory*/
311
    pci_register_bar(&d->pci_dev, 1, 0x1000000,
312
            PCI_BASE_ADDRESS_MEM_PREFETCH, platform_mmio_map);
313

  
314
    platform_fixed_ioport_init(d);
315

  
316
    return 0;
317
}
318

  
319
static void platform_reset(DeviceState *dev)
320
{
321
    PCIXenPlatformState *s = DO_UPCAST(PCIXenPlatformState, pci_dev.qdev, dev);
322

  
323
    platform_fixed_ioport_reset(s);
324
}
325

  
326
static PCIDeviceInfo xen_platform_info = {
327
    .init = xen_platform_initfn,
328
    .qdev.name = "xen-platform",
329
    .qdev.desc = "XEN platform pci device",
330
    .qdev.size = sizeof(PCIXenPlatformState),
331
    .qdev.vmsd = &vmstate_xen_platform,
332
    .qdev.reset = platform_reset,
333
};
334

  
335
static void xen_platform_register(void)
336
{
337
    pci_qdev_register(&xen_platform_info);
338
}
339

  
340
device_init(xen_platform_register);
b/trace-events
407 407

  
408 408
# exec.c
409 409
disable qemu_put_ram_ptr(void* addr) "%p"
410

  
411
# hw/xen_platform.c
412
disable xen_platform_log(char *s) "xen platform: %s"

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