Archipelago » qemu

/* multiply/divide */

/* XXX: add eflags optimizations */

/* XXX: add non P4 style flags */

void OPPROTO op_mulb_AL_T0(void)

{

    unsigned int res;

    res = (uint8_t)EAX * (uint8_t)T0;

    EAX = (EAX & ~0xffff) | res;

    CC_DST = res;

    CC_SRC = (res & 0xff00);

}

void OPPROTO op_imulb_AL_T0(void)

{

    int res;

    res = (int8_t)EAX * (int8_t)T0;

    EAX = (EAX & ~0xffff) | (res & 0xffff);

    CC_DST = res;

    CC_SRC = (res != (int8_t)res);

}

void OPPROTO op_mulw_AX_T0(void)

{

    unsigned int res;

    res = (uint16_t)EAX * (uint16_t)T0;

    EAX = (EAX & ~0xffff) | (res & 0xffff);

    EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);

    CC_DST = res;

    CC_SRC = res >> 16;

}

void OPPROTO op_imulw_AX_T0(void)

{

    int res;

    res = (int16_t)EAX * (int16_t)T0;

    EAX = (EAX & ~0xffff) | (res & 0xffff);

    EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);

    CC_DST = res;

    CC_SRC = (res != (int16_t)res);

}

void OPPROTO op_mull_EAX_T0(void)

{

    uint64_t res;

    res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);

    EAX = (uint32_t)res;

    EDX = (uint32_t)(res >> 32);

    CC_DST = (uint32_t)res;

    CC_SRC = (uint32_t)(res >> 32);

}

void OPPROTO op_imull_EAX_T0(void)

{

    int64_t res;

    res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);

    EAX = (uint32_t)(res);

    EDX = (uint32_t)(res >> 32);

    CC_DST = res;

    CC_SRC = (res != (int32_t)res);

}

void OPPROTO op_imulw_T0_T1(void)

{

    int res;

    res = (int16_t)T0 * (int16_t)T1;

    T0 = res;

    CC_DST = res;

    CC_SRC = (res != (int16_t)res);

}

void OPPROTO op_imull_T0_T1(void)

{

    int64_t res;

    res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);

    T0 = res;

    CC_DST = res;

    CC_SRC = (res != (int32_t)res);

}

#ifdef TARGET_X86_64

void OPPROTO op_mulq_EAX_T0(void)

{

    helper_mulq_EAX_T0(T0);

}

void OPPROTO op_imulq_EAX_T0(void)

{

    helper_imulq_EAX_T0(T0);

}

void OPPROTO op_imulq_T0_T1(void)

{

    T0 = helper_imulq_T0_T1(T0, T1);

}

#endif