Revision 03875444 exec.c

b/exec.c
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#define TARGET_VIRT_ADDR_SPACE_BITS 42
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#elif defined(TARGET_PPC64)
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#define TARGET_PHYS_ADDR_SPACE_BITS 42
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#elif defined(TARGET_X86_64) && !defined(USE_KQEMU)
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#define TARGET_PHYS_ADDR_SPACE_BITS 40
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#elif defined(TARGET_I386) && !defined(USE_KQEMU)
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#define TARGET_PHYS_ADDR_SPACE_BITS 36
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#else
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/* Note: for compatibility with kqemu, we use 32 bits for x86_64 */
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#define TARGET_PHYS_ADDR_SPACE_BITS 32
......
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uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE] __attribute__((aligned (32)));
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uint8_t *code_gen_ptr;
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ram_addr_t phys_ram_size;
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int phys_ram_size;
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int phys_ram_fd;
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uint8_t *phys_ram_base;
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uint8_t *phys_ram_dirty;
......
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typedef struct PhysPageDesc {
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    /* offset in host memory of the page + io_index in the low 12 bits */
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    ram_addr_t phys_offset;
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    uint32_t phys_offset;
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} PhysPageDesc;
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#define L2_BITS 10
......
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 */
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#define L1_BITS (TARGET_VIRT_ADDR_SPACE_BITS - L2_BITS - TARGET_PAGE_BITS)
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#else
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#define L1_BITS (TARGET_PHYS_ADDR_SPACE_BITS - L2_BITS - TARGET_PAGE_BITS)
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#define L1_BITS (32 - L2_BITS - TARGET_PAGE_BITS)
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#endif
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#undef L1_BITS
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#undef L2_BITS
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#define L1_BITS 13
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#define L2_BITS 13
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#define L1_SIZE (1 << L1_BITS)
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#define L2_SIZE (1 << L2_BITS)
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......
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#endif
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}
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static inline PageDesc *page_find_alloc(target_ulong index)
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static inline PageDesc *page_find_alloc(unsigned int index)
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{
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    PageDesc **lp, *p;
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......
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    return p + (index & (L2_SIZE - 1));
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}
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static inline PageDesc *page_find(target_ulong index)
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static inline PageDesc *page_find(unsigned int index)
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{
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    PageDesc *p;
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......
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    PhysPageDesc *pd;
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    p = (void **)l1_phys_map;
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#if 0
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#if TARGET_PHYS_ADDR_SPACE_BITS > 32
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#if TARGET_PHYS_ADDR_SPACE_BITS > (32 + L1_BITS)
......
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        *lp = p;
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    }
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#endif
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#endif
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    lp = p + ((index >> L2_BITS) & (L1_SIZE - 1));
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    pd = *lp;
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    if (!pd) {
......
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    tb_set_jmp_target(tb, n, (unsigned long)(tb->tc_ptr + tb->tb_next_offset[n]));
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}
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static inline void tb_phys_invalidate(TranslationBlock *tb, target_ulong page_addr)
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static inline void tb_phys_invalidate(TranslationBlock *tb, unsigned int page_addr)
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{
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    CPUState *env;
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    PageDesc *p;
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    unsigned int h, n1;
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    target_phys_addr_t phys_pc;
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    target_ulong phys_pc;
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    TranslationBlock *tb1, *tb2;
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    /* remove the TB from the hash list */
......
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   the same physical page. 'is_cpu_write_access' should be true if called
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   from a real cpu write access: the virtual CPU will exit the current
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   TB if code is modified inside this TB. */
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void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end,
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void tb_invalidate_phys_page_range(target_ulong start, target_ulong end,
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                                   int is_cpu_write_access)
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{
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    int n, current_tb_modified, current_tb_not_found, current_flags;
......
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}
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/* len must be <= 8 and start must be a multiple of len */
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static inline void tb_invalidate_phys_page_fast(target_phys_addr_t start, int len)
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static inline void tb_invalidate_phys_page_fast(target_ulong start, int len)
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{
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    PageDesc *p;
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    int offset, b;
......
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}
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#if !defined(CONFIG_SOFTMMU)
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static void tb_invalidate_phys_page(target_phys_addr_t addr,
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static void tb_invalidate_phys_page(target_ulong addr,
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                                    unsigned long pc, void *puc)
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{
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    int n, current_flags, current_tb_modified;
......
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static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end,
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                             int memory);
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static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys,
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static void *subpage_init (target_phys_addr_t base, uint32_t *phys,
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                           int orig_memory);
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#define CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_addr2, \
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                      need_subpage)                                     \
......
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   page size. If (phys_offset & ~TARGET_PAGE_MASK) != 0, then it is an
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   io memory page */
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void cpu_register_physical_memory(target_phys_addr_t start_addr,
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                                  ram_addr_t size,
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                                  ram_addr_t phys_offset)
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                                  unsigned long size,
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                                  unsigned long phys_offset)
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{
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    target_phys_addr_t addr, end_addr;
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    PhysPageDesc *p;
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    CPUState *env;
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    ram_addr_t orig_size = size;
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    unsigned long orig_size = size;
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    void *subpage;
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    size = (size + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
......
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    for(addr = start_addr; addr != end_addr; addr += TARGET_PAGE_SIZE) {
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        p = phys_page_find(addr >> TARGET_PAGE_BITS);
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        if (p && p->phys_offset != IO_MEM_UNASSIGNED) {
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            ram_addr_t orig_memory = p->phys_offset;
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            unsigned long orig_memory = p->phys_offset;
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            target_phys_addr_t start_addr2, end_addr2;
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            int need_subpage = 0;
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......
2090 2079
}
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2092 2081
/* XXX: temporary until new memory mapping API */
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ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr)
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uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr)
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{
2095 2084
    PhysPageDesc *p;
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......
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}
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2103 2092
/* XXX: better than nothing */
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ram_addr_t qemu_ram_alloc(ram_addr_t size)
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ram_addr_t qemu_ram_alloc(unsigned int size)
2105 2094
{
2106 2095
    ram_addr_t addr;
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    if ((phys_ram_alloc_offset + size) >= phys_ram_size) {
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        fprintf(stderr, "Not enough memory (requested_size = %lu, max memory = %" PRIu64 ")\n",
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                size, (uint64_t)phys_ram_size);
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        fprintf(stderr, "Not enough memory (requested_size = %u, max memory = %d)\n",
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                size, phys_ram_size);
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        abort();
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    }
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    addr = phys_ram_alloc_offset;
......
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    return 0;
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}
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static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys,
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static void *subpage_init (target_phys_addr_t base, uint32_t *phys,
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                           int orig_memory)
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{
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    subpage_t *mmio;

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