Revision 03875444 exec.c
b/exec.c | ||
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74 | 74 |
#define TARGET_VIRT_ADDR_SPACE_BITS 42 |
75 | 75 |
#elif defined(TARGET_PPC64) |
76 | 76 |
#define TARGET_PHYS_ADDR_SPACE_BITS 42 |
77 |
#elif defined(TARGET_X86_64) && !defined(USE_KQEMU) |
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78 |
#define TARGET_PHYS_ADDR_SPACE_BITS 40 |
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79 |
#elif defined(TARGET_I386) && !defined(USE_KQEMU) |
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80 |
#define TARGET_PHYS_ADDR_SPACE_BITS 36 |
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81 | 77 |
#else |
82 | 78 |
/* Note: for compatibility with kqemu, we use 32 bits for x86_64 */ |
83 | 79 |
#define TARGET_PHYS_ADDR_SPACE_BITS 32 |
... | ... | |
92 | 88 |
uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE] __attribute__((aligned (32))); |
93 | 89 |
uint8_t *code_gen_ptr; |
94 | 90 |
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95 |
ram_addr_t phys_ram_size;
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|
91 |
int phys_ram_size;
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|
96 | 92 |
int phys_ram_fd; |
97 | 93 |
uint8_t *phys_ram_base; |
98 | 94 |
uint8_t *phys_ram_dirty; |
... | ... | |
117 | 113 |
|
118 | 114 |
typedef struct PhysPageDesc { |
119 | 115 |
/* offset in host memory of the page + io_index in the low 12 bits */ |
120 |
ram_addr_t phys_offset;
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116 |
uint32_t phys_offset;
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|
121 | 117 |
} PhysPageDesc; |
122 | 118 |
|
123 | 119 |
#define L2_BITS 10 |
... | ... | |
128 | 124 |
*/ |
129 | 125 |
#define L1_BITS (TARGET_VIRT_ADDR_SPACE_BITS - L2_BITS - TARGET_PAGE_BITS) |
130 | 126 |
#else |
131 |
#define L1_BITS (TARGET_PHYS_ADDR_SPACE_BITS - L2_BITS - TARGET_PAGE_BITS)
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127 |
#define L1_BITS (32 - L2_BITS - TARGET_PAGE_BITS)
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132 | 128 |
#endif |
133 | 129 |
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134 |
#undef L1_BITS |
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135 |
#undef L2_BITS |
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#define L1_BITS 13 |
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#define L2_BITS 13 |
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138 |
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139 | 130 |
#define L1_SIZE (1 << L1_BITS) |
140 | 131 |
#define L2_SIZE (1 << L2_BITS) |
141 | 132 |
|
... | ... | |
243 | 234 |
#endif |
244 | 235 |
} |
245 | 236 |
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246 |
static inline PageDesc *page_find_alloc(target_ulong index)
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237 |
static inline PageDesc *page_find_alloc(unsigned int index)
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247 | 238 |
{ |
248 | 239 |
PageDesc **lp, *p; |
249 | 240 |
|
... | ... | |
258 | 249 |
return p + (index & (L2_SIZE - 1)); |
259 | 250 |
} |
260 | 251 |
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261 |
static inline PageDesc *page_find(target_ulong index)
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252 |
static inline PageDesc *page_find(unsigned int index)
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|
262 | 253 |
{ |
263 | 254 |
PageDesc *p; |
264 | 255 |
|
... | ... | |
274 | 265 |
PhysPageDesc *pd; |
275 | 266 |
|
276 | 267 |
p = (void **)l1_phys_map; |
277 |
#if 0 |
|
278 | 268 |
#if TARGET_PHYS_ADDR_SPACE_BITS > 32 |
279 | 269 |
|
280 | 270 |
#if TARGET_PHYS_ADDR_SPACE_BITS > (32 + L1_BITS) |
... | ... | |
291 | 281 |
*lp = p; |
292 | 282 |
} |
293 | 283 |
#endif |
294 |
#endif |
|
295 | 284 |
lp = p + ((index >> L2_BITS) & (L1_SIZE - 1)); |
296 | 285 |
pd = *lp; |
297 | 286 |
if (!pd) { |
... | ... | |
522 | 511 |
tb_set_jmp_target(tb, n, (unsigned long)(tb->tc_ptr + tb->tb_next_offset[n])); |
523 | 512 |
} |
524 | 513 |
|
525 |
static inline void tb_phys_invalidate(TranslationBlock *tb, target_ulong page_addr)
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514 |
static inline void tb_phys_invalidate(TranslationBlock *tb, unsigned int page_addr)
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|
526 | 515 |
{ |
527 | 516 |
CPUState *env; |
528 | 517 |
PageDesc *p; |
529 | 518 |
unsigned int h, n1; |
530 |
target_phys_addr_t phys_pc;
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519 |
target_ulong phys_pc;
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531 | 520 |
TranslationBlock *tb1, *tb2; |
532 | 521 |
|
533 | 522 |
/* remove the TB from the hash list */ |
... | ... | |
678 | 667 |
the same physical page. 'is_cpu_write_access' should be true if called |
679 | 668 |
from a real cpu write access: the virtual CPU will exit the current |
680 | 669 |
TB if code is modified inside this TB. */ |
681 |
void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end,
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|
670 |
void tb_invalidate_phys_page_range(target_ulong start, target_ulong end,
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|
682 | 671 |
int is_cpu_write_access) |
683 | 672 |
{ |
684 | 673 |
int n, current_tb_modified, current_tb_not_found, current_flags; |
... | ... | |
791 | 780 |
} |
792 | 781 |
|
793 | 782 |
/* len must be <= 8 and start must be a multiple of len */ |
794 |
static inline void tb_invalidate_phys_page_fast(target_phys_addr_t start, int len)
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783 |
static inline void tb_invalidate_phys_page_fast(target_ulong start, int len)
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|
795 | 784 |
{ |
796 | 785 |
PageDesc *p; |
797 | 786 |
int offset, b; |
... | ... | |
820 | 809 |
} |
821 | 810 |
|
822 | 811 |
#if !defined(CONFIG_SOFTMMU) |
823 |
static void tb_invalidate_phys_page(target_phys_addr_t addr,
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812 |
static void tb_invalidate_phys_page(target_ulong addr,
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824 | 813 |
unsigned long pc, void *puc) |
825 | 814 |
{ |
826 | 815 |
int n, current_flags, current_tb_modified; |
... | ... | |
1997 | 1986 |
|
1998 | 1987 |
static int subpage_register (subpage_t *mmio, uint32_t start, uint32_t end, |
1999 | 1988 |
int memory); |
2000 |
static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys,
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|
1989 |
static void *subpage_init (target_phys_addr_t base, uint32_t *phys,
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|
2001 | 1990 |
int orig_memory); |
2002 | 1991 |
#define CHECK_SUBPAGE(addr, start_addr, start_addr2, end_addr, end_addr2, \ |
2003 | 1992 |
need_subpage) \ |
... | ... | |
2023 | 2012 |
page size. If (phys_offset & ~TARGET_PAGE_MASK) != 0, then it is an |
2024 | 2013 |
io memory page */ |
2025 | 2014 |
void cpu_register_physical_memory(target_phys_addr_t start_addr, |
2026 |
ram_addr_t size,
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|
2027 |
ram_addr_t phys_offset)
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|
2015 |
unsigned long size,
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|
2016 |
unsigned long phys_offset)
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|
2028 | 2017 |
{ |
2029 | 2018 |
target_phys_addr_t addr, end_addr; |
2030 | 2019 |
PhysPageDesc *p; |
2031 | 2020 |
CPUState *env; |
2032 |
ram_addr_t orig_size = size;
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|
2021 |
unsigned long orig_size = size;
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|
2033 | 2022 |
void *subpage; |
2034 | 2023 |
|
2035 | 2024 |
size = (size + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK; |
... | ... | |
2037 | 2026 |
for(addr = start_addr; addr != end_addr; addr += TARGET_PAGE_SIZE) { |
2038 | 2027 |
p = phys_page_find(addr >> TARGET_PAGE_BITS); |
2039 | 2028 |
if (p && p->phys_offset != IO_MEM_UNASSIGNED) { |
2040 |
ram_addr_t orig_memory = p->phys_offset;
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|
2029 |
unsigned long orig_memory = p->phys_offset;
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|
2041 | 2030 |
target_phys_addr_t start_addr2, end_addr2; |
2042 | 2031 |
int need_subpage = 0; |
2043 | 2032 |
|
... | ... | |
2090 | 2079 |
} |
2091 | 2080 |
|
2092 | 2081 |
/* XXX: temporary until new memory mapping API */ |
2093 |
ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr)
|
|
2082 |
uint32_t cpu_get_physical_page_desc(target_phys_addr_t addr)
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|
2094 | 2083 |
{ |
2095 | 2084 |
PhysPageDesc *p; |
2096 | 2085 |
|
... | ... | |
2101 | 2090 |
} |
2102 | 2091 |
|
2103 | 2092 |
/* XXX: better than nothing */ |
2104 |
ram_addr_t qemu_ram_alloc(ram_addr_t size)
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|
2093 |
ram_addr_t qemu_ram_alloc(unsigned int size)
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|
2105 | 2094 |
{ |
2106 | 2095 |
ram_addr_t addr; |
2107 | 2096 |
if ((phys_ram_alloc_offset + size) >= phys_ram_size) { |
2108 |
fprintf(stderr, "Not enough memory (requested_size = %lu, max memory = %" PRIu64 ")\n",
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|
2109 |
size, (uint64_t)phys_ram_size);
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|
2097 |
fprintf(stderr, "Not enough memory (requested_size = %u, max memory = %d)\n",
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|
2098 |
size, phys_ram_size); |
|
2110 | 2099 |
abort(); |
2111 | 2100 |
} |
2112 | 2101 |
addr = phys_ram_alloc_offset; |
... | ... | |
2449 | 2438 |
return 0; |
2450 | 2439 |
} |
2451 | 2440 |
|
2452 |
static void *subpage_init (target_phys_addr_t base, ram_addr_t *phys,
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2441 |
static void *subpage_init (target_phys_addr_t base, uint32_t *phys,
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|
2453 | 2442 |
int orig_memory) |
2454 | 2443 |
{ |
2455 | 2444 |
subpage_t *mmio; |
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